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2011-01-04Add VexGdq.H.J. Lu2-2/+13
2011-01-01Update copyright in comments to 2011.H.J. Lu1-2/+2
2011-01-01Update copyright to 2011.H.J. Lu2-1/+5
2011-01-01Rotate binutils ChangeLogs.H.J. Lu2-1005/+1013
2010-12-31 PR gas/11395Dave Anglin2-5/+13
2010-12-31Add x86-64 ILP32 support.H.J. Lu2-0/+10
2010-12-18include/opcode/Richard Sandiford3-0/+102
2010-12-11opcodes/Richard Sandiford2-22/+39
2010-12-09bfd/binutils/gas/gprof/ld/libiberty/opcodes: add .gitignoreMike Frysinger2-0/+6
2010-11-25Update translationsAlan Modra5-531/+532
2010-11-11 bfd/Nick Clifton3-59/+71
2010-11-10Updated translations.Nick Clifton2-220/+225
2010-11-05bfd/Tristan Gingold2-170/+166
2010-10-28 * mips-opc.c (mips_builtin_opcodes): Fix formatting of "ld".Maciej W. Rozycki2-1/+5
2010-10-282010-10-28 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-3/+7
2010-10-252010-10-25 Chao-ying Fu <fu@mips.com>Chao-ying Fu2-6/+10
2010-10-25 bfd/Nathan Sidwell2-0/+6
2010-10-21 * Makefile.am (CLEANFILES): Add stamp-lm32. Sort.Alan Modra3-6/+13
2010-10-18 opcodes/Maciej W. Rozycki2-2/+9
2010-10-16Add CpuNop to CPU_GENERIC64_FLAGS.H.J. Lu3-2/+8
2010-10-15gas: blackfin: fix encoding of BYTEOP2M insnMike Frysinger2-8/+12
2010-10-14Remove CheckRegSize from movq.H.J. Lu3-4/+9
2010-10-14Remove CheckRegSize from instructions with 0, 1 or fixed operands.H.J. Lu3-68/+74
2010-10-14Add CheckRegSize to instructions which require register size check.H.J. Lu5-7601/+7616
2010-10-11binutils/:Andreas Schwab2-3/+8
2010-10-112010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-5/+11
2010-10-11opcodes/Jan Kratochvil3-4/+11
2010-10-09cgen/Alan Modra14-407/+423
2010-10-08Fix build with -DDEBUG=7Alan Modra4-12/+26
2010-10-07gas/Bernd Schmidt2-2/+9
2010-10-02Remove duplicated RMAL.H.J. Lu2-1/+5
2010-09-30 * s390-mkopc.c (main): Exit with error 1 if sscanf failsPierre Muller2-1/+9
2010-09-30 * s390-mkopc.c (main): Change description array size to 80.Pierre Muller2-2/+7
2010-09-27Fix unportable shell quoting.Ralf Wildenhues2-1/+5
2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel4-4/+165
2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel4-14/+47
2010-09-272010-09-27 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann2-2/+11
2010-09-23 * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.Matthew Gretton-Dann2-16/+151
2010-09-23 * gas/config/tc-arm.c (arm_ext_adiv): New variable.Matthew Gretton-Dann2-0/+9
2010-09-23 * gas/config/tc-arm.c (arm_ext_v6z): Remove.Matthew Gretton-Dann2-3/+10
2010-09-23 * gas/config/tc-arm.c (arm_ext_mp): Add.Matthew Gretton-Dann2-0/+11
2010-09-22opcodes: blackfin: fix decoding of 32bit addresses on 64bit systemsMike Frysinger2-0/+7
2010-09-22opcodes: blackfin: fix decoding of all register move insnsMike Frysinger2-12/+34
2010-09-22opcodes: blackfin: fix decoding of many invalid insnsMike Frysinger2-21/+127
2010-09-22opcodes: blackfin: mark push/pop insns with a P6/P7 range as illegalMike Frysinger2-0/+7
2010-09-22opcodes: blackfin: fix decoding of vector shift insn w/saturationMike Frysinger2-1/+5
2010-09-22opcodes: blackfin: decode all ASTAT bitsMike Frysinger2-8/+25
2010-09-22opcodes: blackfin: decode insns with invalid register as illegalMike Frysinger2-14/+28
2010-09-22gas: blackfin: fix DBG/DBGCMPLX insn encodingMike Frysinger2-1/+5
2010-09-22opcodes/gas: blackfin: handle more ASTAT flagsMike Frysinger2-4/+16
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