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2000-08-06 * avr-dis.c (avr_operand): Use PARAMS macro in declaration.Denis Chertykov2-43/+94
Change return type from void to int. Check the combination of operands, return 1 if valid. Fix to avoid BUF overflow. Report undefined combinations of operands in COMMENT. Report internal errors to stderr. Output the adiw/sbiw constant operand in both decimal and hex. (print_insn_avr): Disassemble ldd/std with displacement of 0 as ld/st. Check avr_operand () return value, handle invalid combinations of operands like unknown opcodes.
2000-08-042000-08-04 Ben Elliston <bje@redhat.com>Ben Elliston5-0/+1406
* cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files. * cgen.sh: Likewise.
2000-08-02Fix memory leaks for IA-64 opcode idescs.Jim Wilson2-0/+5
gas/ * config/tc-ia64.c (emit_one_bundle): Call ia64_free_opcode before ia64_find_opcode. (md_assemble): Likewise. opcodes/ * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
2000-07-31Minor formatting fixesNick Clifton8-158/+145
2000-07-292000-07-28 Ben Elliston <bje@redhat.com>Ben Elliston5-157/+299
* Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New. (run-cgen, stamp-m32r, stamp-fr30): New targets. * Makefile.in: Regenerate. * configure.in: Add --enable-cgen-maint option. * configure: Regenerate.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+4
* Makefile.am (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt1-0/+22
* i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * configure.in: New bits for bfd_i860_arch. * configure: Regenerated.
2000-07-282000-07-22 Jason Eckhardt <jle@cygnus.com>Jason Eckhardt5-167/+454
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
2000-07-262000-07-26 Dave Brolley <brolley@redhat.com>Dave Brolley4-7/+20
* cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned. (cgen_hw_lookup_by_num): Ditto. (cgen_operand_lookup_by_name): Ditto. (print_address): Ditto. (print_keyword): Ditto. * cgen-dis.c (hash_insn_array): Mark unused parameters with ATTRIBUTE_UNUSED. * cgen-asm.c (hash_insn_array): Mark unused parameters with ATTRIBUTE_UNUSED. (cgen_parse_keyword): Ditto.
2000-07-20Revert spurious unrelated changes from last commit. Oops.Hans-Peter Nilsson2-4/+0
2000-07-20 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.Hans-Peter Nilsson10-15/+2286
(ALL_MACHINES): Add cris-dis.lo and cris-opc.lo. (cris-dis.lo, cris-opc.lo): New rules. * Makefile.in: Rebuild. * configure.in (bfd_cris_arch): New target. * configure: Rebuild. * disassemble.c (ARCH_cris): Define. (disassembler): Support ARCH_cris. * cris-dis.c, cris-opc.c: New files. * po/POTFILES.in, po/opcodes.pot: Regenerate.
2000-07-11 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.Jakub Jelinek2-2/+7
Reported by Bill Clarke <llib@computer.org>.
2000-07-10Fix a date.Alan Modra1-1/+1
2000-07-09* ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.Geoffrey Keating2-1/+6
Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
2000-07-09Add some prototypes, and fix a few warnings.Alan Modra2-7/+42
2000-07-05add MAINTAINERS filesDJ Delorie2-0/+5
2000-07-04* arm-dis.c (print_insn_arm): Output combinations of PSR flags.Alexandre Oliva2-21/+13
2000-07-03Tidy up formatting.Nick Clifton2-3/+10
Add -mall-opcodes, -mno-skip-bug, -mno-wrap.
2000-07-03Fix formatting.Nick Clifton3-28/+33
2000-07-01Fix 2000-06-22. grep after running dep.sedAlan Modra3-8/+16
2000-06-30Add entry omited when Stephane Carrez's h68hc11 code was chaecked in.Nick Clifton1-0/+12
2000-06-262000-06-26 Scott Bambrough <scottb@netwinder.org>Scott Bambrough2-1/+8
* arm-dis.c (regnames): Add an additional register set to match the set used by GCC. Make it the default.
2000-06-22Ensure /usr/include and the like stay out of dependencies.Alan Modra3-5/+19
2000-06-202000-06-20 H.J. Lu <hjl@gnu.org>H.J. Lu3-16/+23
* Makefile.am: Rebuild dependency. * Makefile.in: Rebuild.
2000-06-19Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add supportNick Clifton9-4/+1731
for m68hc11 and m68hc12 processors.
2000-06-16 * disassemble.c (disassembler): Refer to the PowerPC 620 usingNicholas Duffek2-1/+6
bfd_mach_ppc_620 instead of 620.
2000-06-16Fix typo.Alan Modra1-172/+166
2000-06-12 * h8300-dis.c: Fix formatting.Jeff Law2-32/+40
(bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl] correctly.
2000-06-09 * avr-dis.c (avr_operand): Bugfix for jmp/call address.Denis Chertykov2-1/+6
2000-06-07 * avr-dis.c: completely rewritten.Denis Chertykov2-587/+253
2000-06-02Fix formattingNick Clifton2-50/+57
2000-06-01Applied patch from Kazu Hirata <kazu@hxi.com> to fix disassembly of inc.lNick Clifton2-75/+56
and dec.l instructions
2000-05-31Add comment describoing why dgettext() is used in _() macro.Nick Clifton2-0/+18
2000-05-30Undo part of previous delta, so that _() calls dgettext() not gettext().Nick Clifton1-1/+1
2000-05-30Replace defines with those from intl/libgettext.h to quieten gcc warnings.Nick Clifton14-2771/+2603
2000-05-26Update dependencies.Alan Modra3-29/+46
2000-05-26* m10300-dis.c (disassemble): Don't assume 32-bit longs whenAlexandre Oliva2-13/+19
sign-extending operands.
2000-05-25Add ALONE flag to most of the short branch instructions.Donald Lindsay2-11/+16
2000-05-24 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.Diego Novillo2-2/+19
(STD_REGISTER_NAMES): New name for REGISTER_NAMES. (reg_names): Rename to std_reg_names. Change it to a char ** static variable. (std_reg_names): New name for reg_names. (set_mips_isa_type): Set reg_names to point to std_reg_names by default.
2000-05-22Regerbated after change to Makefile.amNick Clifton1-18/+22
2000-05-21Define LIBIBERTYNick Clifton2-0/+7
2000-05-16* cgen/opcodes fixFrank Ch. Eigler3-10/+12
* approved by nickc [opcodes/ChangeLog] 2000-05-16 Frank Ch. Eigler <fche@redhat.com> * fr30-desc.h: Partially regenerated to account for changed CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros. * m32r-desc.h: Ditto. [include/opcode/ChangeLog] 2000-05-16 Frank Ch. Eigler <fche@redhat.com> * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set. (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
2000-05-15Add support for _x and _s flags to MSR instructionNick Clifton3-7/+22
2000-05-12Fix disassembly of DLRS{H|B} instructionNick Clifton2-1/+6
2000-05-11Don't mask top 32 bits of 64-bit address.Alan Modra2-2/+9
2000-05-10* ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodesGeoffrey Keating2-363/+368
also available in common mode when powerpc syntax is being used.
2000-05-08Kill compiler warnings with ATTRIBUTE_UNUSED.Alan Modra2-5/+11
2000-05-06Support for tic54x target.Timothy Wall8-0/+1140
2000-05-03* ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, forJ.T. Conklin3-4/+247
vector unit operands. (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector unit instruction formats. (PPCVEC): New macro, mask for vector instructions. (powerpc_operands): Add table entries for above operand types. (powerpc_opcodes): Add table entries for vector instructions. * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask. (print_insn_little_powerpc): Likewise. (print_insn_powerpc): Prepend 'v' when printing vector registers.
2000-05-01 * avr-dis.c (reg_fmul_d): New. Extract destination register fromDenis Chertykov2-3/+130
FMUL instruction. (reg_fmul_r): New. Extract source register from FMUL instruction. (reg_muls_d): New. Extract destination register from MULS instruction. (reg_muls_r): New. Extract source register from MULS instruction. (reg_movw_d): New. Extract destination register from MOVW instruction. (reg_movw_r): New. Extract source register from MOVW instruction. (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU, EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
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