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Wed Nov 8 20:10:35 1995 Eric Freudenthal <freudenthal@nyu.edu>
* a29k-dis.c (print_insn): Cast insn24 to unsigned long when
shifting it.
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* configure: Rebuilt.
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* configure.in: Add case for bfd_i860_arch.
* configure: Rebuild.
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* m68k-dis.c (NEXTSINGLE): Change i to unsigned int.
(NEXTDOUBLE): Likewise.
(print_insn_m68k): Don't match fmoveml if there is more than one
register in the list.
(print_insn_arg): Handle a place of '8' for a type of 'L'.
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* m68k-dis.c (print_insn_arg): Handle new 'W' place.
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and likewise for all the dbxx opcodes.
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VR4100 specific instructions to the mips_opcodes structure.
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ugly Metrowerks bug in CW6, is fixed in CW7.
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<schwab@issan.informatik.uni-dortmund.de>
* m68k-dis.c (print_insn_m68k): Recognize all two-word instructions that take
no args by looking at the match mask.
(print_insn_arg): Always print "%" before register names.
[case 'c']: Use "nc" for the no-cache case, as recognized by gas.
[case '_']: Don't print "@#" before address.
[case 'J']: Use "%s" as format string, not register name.
[case 'B']: Treat place == 'C' like 'l' and 'L'.
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* alpha-opc.h (MEMORY_FUNCTION_FORMAT_MASK): added.
(alpha_insn_set): added definitions for VAX floating point
instructions (Unix compilers don't generate these, but handcoded
assembly might still use them).
* alpha-dis.c (print_insn_alpha): added support for disassembling
the miscellaneous instructions in the Alpha instruction set.
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no longer create sysdep.h, sed ppc-opc.c to work around a
serious Metrowerks C bug.
* mpw-make.in: Remove.
* mpw-make.sed: New file, used by mpw-configure to edit
Makefile.in into an MPW makefile.
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which use '0', '1', and '2' instead. Specify the proper size for
a pmove immediate operand. Correct the pmovefd patterns to be
moves to a register, not from a register.
* m68k-dis.c (print_insn_arg): Replace 'P' with '0', '1', '2'.
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%psr, %wim, %tbr as F_NOTV9.
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config.status.
(config.h, stamp-h): New targets.
* configure.in: Call AC_CONFIG_HEADER and AC_CANONICAL_SYSTEM
earlier. Don't bother to call AC_ARG_PROGRAM. Touch stamp-h when
rebuilding config.h.
* configure: Rebuild.
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operands to use "t,A(b)".
PR 7947.
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(.c.o, disassemble.o): Use $(ALL_CFLAGS).
(MOSTLYCLEAN): Add config.log.
(distclean): Don't remove config.log.
* configure.in: Substitute HDEFINES.
* configure: Rebuild.
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* configure: Rebuild.
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(print_insn, case 'G'): Use it.
(print_insn, case 'L'): Sign extend displacement.
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Subsitute CFLAGS and AR. Call AC_PROG_INSTALL. Don't substitute
host_makefile_frag or frags.
* aclocal.m4: New file.
* configure: Rebuild.
* Makefile.in (INSTALL): Set to @INSTALL@.
(INSTALL_PROGRAM): Set to @INSTALL_PROGRAM@.
(INSTALL_DATA): Set to @INSTALL_DATA@.
(AR): Set to @AR@.
(AR_FLAGS): Set to rc rather than qc.
(CC): Define as @CC@.
(CFLAGS): Set to @CFLAGS@.
(@host_makefile_frag@): Remove.
(config.status): Remove dependency upon @frags@.
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Use them rather than looking through target Makefile fragments.
* configure: Rebuild.
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Add clrx, iprefetch, signx, clruw, cas, casl, casx, casxl synthetic
sparc64 insns.
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(lookup_{name,value}): New functions.
(prefetch_table): New static local.
(sparc_{encode,decode}_prefetch): New functions.
* sparc-dis.c (print_insn): Handle '*' arg (prefetch function).
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(sparc_{encode,decode}_asi): New functions.
* sparc-dis.c (print_insn): Call sparc_decode_asi.
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and likewise for the other branches. Add bhs as an alias for bcc,
and likewise for the size variants. Add dbhs as an alias for
dbcc.
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(reg_names): Likewise.
(print_insn_arg): Don't explicitly print % before register names.
Add % before register names in static array names. In case 'r',
print data registers as `@(Dn)', not `Dn@'. When printing a
memory address, don't print @# before it.
(print_indexed): Change base_disp and outer_disp from int to
bfd_vma. Print using MIT syntax, not mutant invalid Motorola
syntax. Sign extend 8 byte displacement correctly.
(print_base): Print using MIT syntax. Print zpc when appropriate.
Change parameter disp from int to bfd_vma.
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F_REG_M, FPSCR_M, FPSCR_N, FPUL_M and FPUL_N.
* sh-opc.h (sh_arg_type): Add new operand types.
(sh_table): Add new opcodes from SH3E Floating Point ISA.
sh3e stuff. Sanitized out for now.
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Clean up tables.
* m68k-dis.c: Remove BREAK_UP_BIG_DECL stuff.
(opcode): Remove.
(print_insn_m68k): Change d to be const. Use m68k_numopcodes
rather than numopcodes. Use m68k_opcodes rather than removed
opcode function. Don't check F_ALIAS.
(print_insn_arg): Change first parameter to be const char *.
* Makefile.in (ALL_MACHINES): Add m68k-opc.o.
(m68k-opc.o): New target.
* configure.in: Build m68k-opc.o for bfd_m68k_arch.
* configure: Rebuild.
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between sparc32/sparc64 in one executable.
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(print_insn_sparc, print_insn_sparc64): Clean up comments regarding
switching between sparc32 and sparc64.
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(opcode_bits, opcode_hash_table, sparc64_p): New variables.
(opcodes_initialized): Renamed from opcodes_sorted.
(build_hash_table): New function.
(is_delayed_branch): Use hash table.
(print_insn): Renamed from print_insn_sparc, made static.
Build and use hash table.
(print_insn_sparc, print_insn_sparc64): New functions.
(compare_opcodes): If !sparc64, move sparc64 opcodes to end,
and vice-versa if sparc64.
* sparc-opc.c (all non-v9 insns): Use flag F_NOTV9 instead of F_ALIAS.
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* mips-opc.c (L1): Define.
(mips_opcodes): Add R4010 instructions: flushi, flushd, flushid,
addciu, madd, maddu, ffc, ffs, msub, msubu, selsi, selsr, waiti,
and wb.
Tue Jul 11 11:49:49 1995 Ian Lance Taylor <ian@cygnus.com>
* mips-opc.c (mips_opcodes): For the move pseudo-op, prefer daddu
if ISA 3 and addu otherwise, replacing or, since some MIPS chips
have multiple add units but only a single logical unit.
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shifted by 18, without any insertion or extraction function.
(insert_cr, extract_cr): Remove.
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