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2003-06-23gas/H.J. Lu2-17/+116
2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (md_assemble): Support Intel Precott New Instructions. * gas/config/tc-i386.h (CpuPNI): New. (CpuUnknownFlags): Add CpuPNI. gas/testsuite/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add prescott. * gas/i386/prescott.d: New file. * gas/i386/prescott.s: Likewise. include/opcode/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Support Intel Precott New Instructions. opcodes/ 2003-06-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in Intel Precott New Instructions. (PREGRP27): New. Added for "addsubpd" and "addsubps". (PREGRP28): New. Added for "haddpd" and "haddps". (PREGRP29): New. Added for "hsubpd" and "hsubps". (PREGRP30): New. Added for "movsldup" and "movddup". (PREGRP31): New. Added for "movshdup" and "movhpd". (PREGRP32): New. Added for "lddqu". (dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry. Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for entry 0xd0. Use PREGRP32 for entry 0xf0. (twobyte_has_modrm): Updated. (twobyte_uses_SSE_prefix): Likewise. (grps): Use PNI_Fixup in the "sidtQ" entry. (prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30, PREGRP31 and PREGRP32. (float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb. Use "fisttpll" in entry 1 in opcode 0xdd. Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-19 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.Christian Groessler4-793/+992
(print_insn_z8k): Correctly check return value from z8k_lookup_instr call. (unparse_instr): Handle CLASS_IRO case. * z8kgen.c: Fix function definitions. Fix formatting. (opt): Add brk opcode alias for non-simulator breakpoint. Add missing and fix existing in/out and sin/sout opcode definitions. (args): "@ri", "@ro" - add CLASS_IRO register usage for in/out opcodes. (internal): Check p->flags for non-zero before dereferencing it. (gas): Add CLASS_IRO line. Insert new OPC_xxx lines for the added opcodes and renumber the remaining lines repectively. (main): Remove "-d" command line switch. * z8k-opc.h: Regenerate with new z8kgen.c.
2003-06-11bfd/H.J. Lu2-11/+19
2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. binutils/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gas/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. gprof/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. ld/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise. opcodes/ 2003-06-06 H.J. Lu <hongjiu.lu@intel.com> * po/Make-in (DESTDIR): New. (install-data-yes): Support $(DESTDIR). (uninstall): Likewise.
2003-06-10* bfd/Makefile.am (config.status): Depend on version.h.Alan Modra4-15/+25
Run "make dep-am" in bfd/ and elsewhere, and regen files.
2003-06-10opcodes:Doug Evans24-36/+48
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. gas: * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
2003-06-10Add "attn", "lq" and "stq" power4 insns.Alan Modra2-42/+161
2003-06-10opcodes/Richard Sandiford2-1/+6
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round rts/l and rte/l register lists. gas/ * config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register lists. Allow single-register ranges. testsuite/ * gas/h8300/h8sx_rtsl.[sd]: New test. * gas/h8300/h8300.exp: Run it.
2003-06-05Add code to handle even-numbered only register operandsNick Clifton9-182/+364
2003-06-032003-06-03 Michael Snyder <msnyder@redhat.com>Michael Snyder2-190/+538
and Bernd Schmidt <bernds@redhat.com> and Alexandre Oliva <aoliva@redhat.com> * disassemble.c (disassembler): Add support for h8300sx. * h8300-dis.c: Ditto.
2003-06-03FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.Nick Clifton15-599/+961
Use maintainer mode to regenerate ports.
2003-05-242003-05-23 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-4/+12
gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
2003-05-20Regenerate - forgot to commit with last commitAndreas Jaeger1-2/+2
2003-05-182003-05-18 Jason Eckhardt <jle@rice.edu>Jason Eckhardt2-2/+10
gas: * config/tc-i860.c (i860_process_insn): Initialize fc after each opcode mismatch. include/opcode: * i860.h (form, pform): Add missing .dd suffix. opcodes: * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit, print it. bfd: * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-17 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.Andreas Jaeger2-2/+8
(libopcodes_la_DEPENDENCIES): Add libbfd.la. * Makefile.in: Regenerated.
2003-05-16New Romanian translationNick Clifton4-4/+456
2003-05-12Add support for h8300hn and h8300snNick Clifton2-2/+8
2003-05-09 * i386-dis.c (print_insn): Test intel_syntax against (char) -1 inAlan Modra2-1/+6
case char is unsigned.
2003-05-01 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.Christian Groessler1-0/+8
(unpack_instr): Fix representation of segmented addresses. (intr_name): Added, contains names of the parameters to the EI/DI instructions. (unparse_instr): Fix display of EI/DI parameters.
2003-05-01 * expr.h: Fix comments in operatorT typedef.Christian Groessler1-4/+26
* config/tc-z8k.c: Add 2003 to copyright message. Fold s_segm() and s_unseg() into one function s_segm(parm) which decides by the parameter. (md_begin): Don't set linkrelax. Only set Z8002 default if no command line argument was given to select the intended architecure. (get_interrupt_operand): Warn if NOP type code is emitted. (newfix): New parameter 'size', forward it to 'fix_new_exp'. (apply_fix): Call newfix with additional 'size' parameter. (build_bytes): Remove unused variable 'nib'. Detect overflow in 4 bit immediate arguments. (md_longopts): Add 'linkrelax' option. (md_parse_option): Adapt to new s_segm function. Set 'linkrelax' variable when 'linkrelax' command line option is specified. (md_show_usage): Display 'linkrelax' option. (md_apply_fix3): Fix cases R_IMM4L, R_JR, and R_IMM8. Add cases R_CALLR and R_REL16. * config/tc-z8k.h: Undef WARN_SIGNED_OVERFLOW_WORD.
2003-04-22 * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.Doug Evans26-172/+199
* frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate. * ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate. * m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate. * xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
2003-04-15Replace occurrances of 'Hitachi' with 'Renesas'.Nick Clifton2-16/+19
2003-04-08* ia64-ic.tbl (fr-readers): Add mem-writers-fp.Nick Clifton3-85/+97
* ia64-asmtab.c: Regenerate. * gas/ia64/dependency-1.s: New file: Test read before write dependency. * gas/ia64/dependency-1.d: New file: Expected assembly results. * gas/ia64/ia64.exp: Run the new test.
2003-04-08* mips-dis.c (mips_gpr_names_newabi): Reverted previous patch.Alexandre Oliva2-1/+5
2003-04-08* mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7.Alexandre Oliva2-1/+5
2003-04-04Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and ↵Svein Seldal2-152/+158
s/c3x/tic3x/. 2003 copyright update
2003-04-01Add Xtensa portNick Clifton6-189/+745
2003-04-01Fixes for iWMMXt contribution.Nick Clifton3-3/+8
2003-03-25Add iWMMXt supportNick Clifton3-20/+238
2003-03-22 * i386-dis.c (dis386): Recognize icebp (0xf1).Doug Evans2-1/+5
2003-03-21 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME toMartin Schwidefsky5-666/+717
S390_OPCODE_ZARCH. (print_insn_s390): Use new modes field of s390_opcodes. * s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove. (s390_opcode_mode_val, s390_opcode_cpu_val): New enums. (struct op_struct): Remove archbits. Add mode_bits and min_cpu. (insertOpcode): Replace archbits by min_cpu and mode_bits. (dumpTable): Write mode_bits and min_cpu instead of archbits. (main): Adapt to new format in s390-opcode.txt. * s390-opc.c (s390_opformats): Replace archbits by min_cpu and mode_bits. * s390-opc.txt: Replace archbits by min_cpu and mode_bits.
2003-03-17 Fix formatting. Update copyright date.Nick Clifton2-63/+66
2003-03-14ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403.Daniel Jacobowitz2-0/+5
2003-02-25 * hppa-dis.c: Formatting.Alan Modra2-142/+194
* hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
2003-02-25 * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not printAlan Modra2-2/+11
the space register when the value is zero.
2003-02-232003-02-23 Elias Athanasopoulos <elathan@phys.uoa.gr>Chris Demetriou2-3/+8
* mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned, use ARRAY_SIZE in loops.
2003-02-12003-02-12 Dave Brolley <brolley@redhat.com>Dave Brolley2-34/+39
* fr30-desc.c: Regenerate.
2003-02-06 * i386-dis.c (dq_mode, Edq): Define.Alan Modra2-121/+129
(dis386_twobyte): Correct movd operands. (OP_E): Handle dq_mode case.
2003-01-29(print_insn_sparc): When examining values added in to rs1, make sure thatNick Clifton2-46/+61
there are previous instructions.
2003-01-23Add SH2E supportNick Clifton3-201/+225
2003-01-23include/elf/ChangeLogAlan Modra4-3/+12
* sh.h: Split out various bits to bfd/elf32-sh64.h. include/opcode/ChangeLog * m68hc11.h (cpu6812s): Define. bfd/ChangeLog * elf-bfd.h (struct bfd_elf_section_data): Remove tdata. Change dynindx to an int. Rearrange for better packing. * elf.c (_bfd_elf_new_section_hook): Don't alloc if already done. * elf32-mips.c (bfd_elf32_new_section_hook): Define. * elf32-sh64.h: New. Split out from include/elf/sh.h. (struct _sh64_elf_section_data): New struct. (sh64_elf_section_data): Don't dereference sh64_info (was tdata). * elf32-sh64-com.c: Include elf32-sh64.h. * elf32-sh64.c: Likewise. (sh64_elf_new_section_hook): New function. (bfd_elf32_new_section_hook): Define. (sh64_elf_fake_sections): Adjust for sh64_elf_section_data change. (sh64_bfd_elf_copy_private_section_data): Likewise. (sh64_elf_final_write_processing): Likewise. * elf32-sparc.c (struct elf32_sparc_section_data): New. (elf32_sparc_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (elf32_sparc_relax_section): Adjust to use sec_do_relax. (elf32_sparc_relocate_section): Likewise. * elf64-mips.c (bfd_elf64_new_section_hook): Define. * elf64-mmix.c (struct _mmix_elf_section_data): New. (mmix_elf_section_data): Define. Use throughout file. (mmix_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-ppc.c (struct _ppc64_elf_section_data): New. (ppc64_elf_section_data): Define. Use throughout. (ppc64_elf_new_section_hook): New function. (bfd_elf64_new_section_hook): Define. * elf64-sparc.c (struct sparc64_elf_section_data): New. (sparc64_elf_new_section_hook): New function. (SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete. (sec_do_relax): Define. (sparc64_elf_relax_section): Adjust to use sec_do_relax. (sparc64_elf_relocate_section): Likewise. (bfd_elf64_new_section_hook): Define. * elfn32-mips.c (bfd_elf32_new_section_hook): Define. * elfxx-mips.c (struct _mips_elf_section_data): New. (mips_elf_section_data): Define. Use throughout. (_bfd_mips_elf_new_section_hook): New function. (mips_elf_create_got_section): Don't alloc used_by_bfd. * elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare. * elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. opcodes/ChangeLog * sh64-dis.c: Include elf32-sh64.h. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. gas/ChangeLog * config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed sh64_elf_section_data. * config/tc-sh64.h: Include elf32-sh64.h. * config/tc-m68hc11.c: Don't include stdio.h. (md_show_usage): Fix missing continuation. * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. ld/ChangeLog * emultempl/sh64elf.em: Include elf32-sh64.h. (sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed sh64_elf_section_data. (sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
2003-01-17 * alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrapRichard Henderson2-0/+9
PAL entry points.
2003-01-16 * Makefile.am: Run "make dep-am".Alan Modra4-84/+128
* Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2003-01-092003-01-08 Klee Dienes <kdienes@apple.com>Klee Dienes3-0/+7
* Makefile.am (ALL_MACHINES): Add msp430-dis.lo. * Makefile.in: Regenerate.
2003-01-08 * ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32.Alan Modra2-2/+6
2003-01-03 * iq2000-asm.c: New file.Stan Cox13-2/+9178
* iq2000-desc.c: Likewise. * iq2000-desc.h: Likewise. * iq2000-dis.c: Likewise. * iq2000-ibld.c: Likewise. * iq2000-opc.c: Likewise. * iq2000-opc.h: Likewise. * Makefile.am (HFILES): Add iq2000-desc.h, iq2000-opc.h. (CFILES): Add iq2000-asm.c, iq2000-desc.c, iq2000-dis.c, iq2000-ibld.c, iq2000-opc.c. (ALL_MACHINES): Add iq2000-asm.lo, iq2000-desc.lo, iq2000-dis.lo, iq2000-ibld.lo, iq2000-opc.lo. (CLEANFILES): Add stamp-iq2000. (IQ2000_DEPS): New macro. (stamp-iq2000): New target. * Makefile.in: Regenerate. * configure.in: Handle bfd_iq2000_arch. * configure: Regenerate.
2003-01-022003-01-02 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-9/+15
* mips-dis.c (print_insn_args): Use position extracted by "+A" to calculate size for "+B". Redo code for "+C" so it shares the same style as "+A" and "+B" now do.
2003-01-022003-01-02 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-290/+292
* mips-dis.c: Update copyright years. (print_insn_arg): Rename to... (print_insn_args): This, returning void. Process the whole string of args rather than a single one. Reindent. (print_insn_mips): Update to match the above.
2003-01-012002-12-31 Chris Demetriou <cgd@broadcom.com>Chris Demetriou2-5/+11
* mips-opc.c (mips_builtin_opcodes): Move "di" into the right order alphabetically, and make all hex constants use lower-case letters.
2002-12-31[ gas/ChangeLog ]Chris Demetriou3-43/+243
2002-12-31 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c (validate_mips_insn, mips_ip): Recognize the "+D" operand, which will be used only by the disassembler. [ gas/testsuite/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0sel-names-mips32.d: New test. * gas/mips/cp0sel-names-mips32r2.d: New test. * gas/mips/cp0sel-names-mips64.d: New test. * gas/mips/cp0sel-names-numeric.d: New test. * gas/mips/cp0sel-names-sb1.d: New test. * gas/mips/cp0sel-names.s: New test source file. * gas/mips/mips.exp: Run new tests. [ include/opcode/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips.h: Note that the "+D" operand type name is now used. [ opcodes/ChangeLog ] 2002-12-31 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0sel_name): New structure. (mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2) (mips_cp0sel_names_sb1): New arrays. (mips_arch_choice): New structure members "cp0sel_names" and "cp0sel_names_len". (mips_arch_choices): Add references to new cp0sel_names arrays as appropriate, and make all existing entries reference appropriate mips_XXX_names_numeric arrays rather than simply using NULL. (mips_cp0sel_names, mips_cp0sel_names_len): New variables. (lookup_mips_cp0sel_name): New function. (set_default_mips_dis_options): Set mips_cp0sel_names and mips_cp0sel_names_len as appropriate. Remove now-unnecessary checks for NULL register name arrays. (parse_mips_dis_option): Likewise. (print_insn_arg): Handle "+D" operand type. * mips-opc.c (mips_builtin_opcodes): Add new "+D" variants of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register names symbolically.
2002-12-31[ bfd/ChangeLog ]Chris Demetriou3-36/+195
2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
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