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2007-03-27Fix year.H.J. Lu1-4/+4
2007-03-272006-03-27 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+6
opcodes/ * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
2007-03-242007-03-24 Paul Brook <paul@codesourcery.com>Paul Brook2-2/+12
opcodes/ * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x. (print_insn_coprocessor): Handle %<bitfield>x.
2007-03-242007-03-24 Paul Brook <paul@codesourcery.com>Paul Brook2-3/+8
Mark Shinwell <shinwell@codesourcery.com> gas/ * config/tc-arm.c (operand_parse_code): Add OP_oRRw. (parse_operands): Don't expect comma if first operand missing. Handle OP_oRRw. (do_srs): Encode register number, checking it is r13. Update comment. (insns): Update SRS entries to take a register. gas/testsuite/ * gas/arm/archv6.s: Add new SRS tests. * gas/arm/archv6.d: Update expected output. * gas/arm/thumb32.s: Add new SRS tests. * gas/arm/thumb32.d: Update expected output. * gas/arm/srs-t2.d: New. * gas/arm/srs-t2.l: New. * gas/arm/srs-t2.s: New. * gas/arm/srs-arm.d: New. * gas/arm/srs-arm.l: New. * gas/arm/srs-arm.s: New. opcodes/ * arm-dis.c (arm_opcodes): Print SRS base register.
2007-03-23gas/H.J. Lu3-16/+42
2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Allow '.' in mnemonic. gas/testsuite/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.s: Add tests for rex.WRXB. * gas/i386/rex.d: Updated. * gas/i386/rex.d: Replace rex64XYZ with rex.WRXB. * gas/i386/x86-64-io-intel.d : Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. * i386-opc.c (i386_optab): Add rex.wrxb.
2007-03-21gas/H.J. Lu2-71/+80
2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively. include/opcode/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386.h (REX_MODE64): Renamed to ... (REX_W): This. (REX_EXTX): Renamed to ... (REX_R): This. (REX_EXTY): Renamed to ... (REX_X): This. (REX_EXTZ): Renamed to ... (REX_B): This. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REX_MODE64): Remove definition. (REX_EXTX): Likewise. (REX_EXTY): Likewise. (REX_EXTZ): Likewise. (USED_REX): Use REX_OPCODE instead of 0x40. Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
2007-03-21gas/H.J. Lu3-18/+39
2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * config/tc-i386.c (match_template): Properly handle 64bit mode "xchg %eax, %eax". gas/testsuite/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * gas/i386/nops.s: Add testcases for nop r/m. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax, %eax and %rax. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * i386-dis.c (PREGRP38): New. (dis386): Use PREGRP38 for 0x90. (prefix_user_table): Add PREGRP38. (print_insn): Set uses_REPZ_prefix to 1 for pause. (NOP_Fixup1): Properly handle REX bits. (NOP_Fixup2): Likewise. * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit. Allow register with nop.
2007-03-21* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,DJ Delorie8-286/+441
mem20): New. (src16-16-20-An-relative-*): New. (dst16-*-20-An-relative-*): New. (dst16-16-16sa-*): New (dst16-16-16ar-*): New (dst32-16-16sa-Unprefixed-*): New (jsri): Fix operands. (setzx): Fix encoding. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.h: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
2007-03-15gas/H.J. Lu3-3/+17
2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Use i386_regtab_size to scan i386_regtab. (parse_register): Use i386_regtab_size instead of ARRAY_SIZE on i386_regtab. opcodes/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.c: Include "libiberty.h". (i386_regtab): Remove the last entry. (i386_regtab_size): New. (i386_float_regtab_size): Likewise. * i386-opc.h (i386_regtab_size): New. (i386_float_regtab_size): Likewise.
2007-03-15gas/H.J. Lu8-22/+1924
2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am: Run "make dep-am". * Makefile.in: Regenerated. * config/tc-i386.c: Include "opcodes/i386-opc.h" instead of "opcode/i386.h". (md_begin): Check reg_name != NULL for the last entry in i386_regtab. * config/tc-i386.h: Move many entries to opcode/i386.h and opcodes/i386-opc.h. * configure.in (need_opcodes): Set true for i386. * configure: Regenerated. include/opcode/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * i386.h: Add entries from config/tc-i386.h and move tables to opcodes/i386-opc.h. opcodes/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (CFILES): Add i386-opc.c. (ALL_MACHINES): Add i386-opc.lo. Run "make dep-am". * Makefile.in: Regenerated. * configure.in: Add i386-opc.lo for bfd_i386_arch. * configure: Regenerated. * i386-dis.c: Include "opcode/i386.h". (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition. (FWAIT_OPCODE): Remove definition. (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition. (MAX_OPERANDS): Remove definition. * i386-opc.c: New file. * i386-opc.h: Likewise.
2007-03-152007-03-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+8
* Makefile.in: Regenerated.
2007-03-092007-03-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+11
* i386-dis.c (OP_Rd): Renamed to ... (OP_R): This. (Rd): Updated. (Rm): Likewise.
2007-03-08Regenerate.Alan Modra14-19/+69
2007-03-08 * Makefile.am: Run "make dep-am".Alan Modra4-34/+75
* Makefile.in: Regenerate. * po/POTFILES.in: Regenerate.
2007-03-062007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>Martin Schwidefsky4-1/+95
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR, INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New instruction formats added. (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF, MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format masks added. * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point instructions added. * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added. (main): z9-ec cpu type option added. * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added. 2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com> * config/tc-s390.c (md_parse_option): z9-ec option added. 2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/zarch-z9-ec.d: New file. * gas/s390/zarch-z9-ec.s: New file. * gas/s390/s390.exp: Run the z9-ec testcases.
2007-02-22* s390-opc.c (INSTR_SS_L2RDRD): New.DJ Delorie3-1/+9
(MASK_SS_L2RDRD): New. * s390-opc.txt (pka): Use it. * gas/s390/esa-g5.s: Adjust for corrected PKA syntax. * gas/s390/esa-g5.d: Adjust for corrected PKA syntax.
2007-02-20 [ gas/ChangeLog ]Thiemo Seufer3-4/+72
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2, ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support. (macro_build): Add case '2'. (macro): Expand M_BALIGN to nop, packrl.ph or balign. (validate_mips_insn): Add support for balign instruction. (mips_ip): Handle DSP R2 instructions. Support balign instruction. (OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE, md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2 command line options. (s_mipsset): Add support for .set dspr2 and .set nodspr2 directives. (md_show_usage): Add -mdspr2 and -mno-dspr2 help output. * doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2, .set dspr2, .set nodspr2. [ gas/testsuite/ChangeLog ] * gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for DSP R2. * gas/mips/mips.exp: Run new test. [ include/opcode/Changelog ] * mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction. (INSN_DSPR2): Add flag for DSP R2 instructions. (M_BALIGN): New macro. [ opcodes/ChangeLog ] * mips-dis.c (mips_arch_choices): Add DSP R2 support. (print_insn_args): Add support for balign instruction. * mips-opc.c (D33): New shortcut for DSP R2 instructions. (mips_builtin_opcodes): Add DSP R2 instructions. [ sim/mips/ChangeLog ] * Makefile.in (IGEN_INCLUDE): Add dsp2.igen. * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add dsp2 to sim_igen_machine. * configure: Regenerate. * dsp.igen (do_ph_op): Add MUL support when op = 2. (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph. (mulq_rs.ph): Use do_ph_mulq. (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen. * mips.igen: Add dsp2 model and include dsp2.igen. (MFHI, MFLO, MTHI, MTLO): Extend these instructions for for *mips32r2, *mips64r2, *dsp. (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions for *mips32r2, *mips64r2, *dsp2. * dsp2.igen: New file for MIPS DSP REV 2 ASE. [ sim/testsuite/sim/mips/ChangeLog ] * basic.exp: Run the dsp2 test. * utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro. * mips32-dsp2.s: New test.
2007-02-192007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>Martin Schwidefsky3-17/+22
* s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed. (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added. * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr, cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF. 2007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d (cfxbr, cfebr, cfdbr): Exchanged floating point and fixed point operands. * gas/s390/esa-g5.s: Likewise. * gas/s390/zarch-z900.d (cfdr, cfer, cfxr, cgdbr, cgebr, cgxbr, cgdr, cger, cgxr): Likewise. * gas/s390/zarch-z900.s: Likewise.
2007-02-192007-02-19 Andreas Krebbel <krebbel1@de.ibm.com>Martin Schwidefsky3-3/+17
* s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type. * s390-opc.c (s390_operands): Add RO_28 as optional gpr. (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc and sfpc.
2007-02-16PR binutils/4045Nick Clifton2-4/+22
* avr-dis.c (comment_start): New variable, contains the prefix to use when printing addresses in comments. (print_insn_avr): Set comment_start to an empty space if there is no symbol table available as the generic address printing code will prefix the numeric value of the address with 0x.
2007-02-13Remove extra space.H.J. Lu1-3/+3
2007-02-13Remove trailing zeros in array initializers.H.J. Lu1-86/+86
2007-02-13Add a space before `}' in struct initializer.H.J. Lu1-66/+66
2007-02-132007-02-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1725/+1684
* i386-dis.c: Updated to use an array of MAX_OPERANDS operands in struct dis386.
2007-02-06Fix entries for MeP submission.Dave Brolley1-5/+18
2007-02-052007-02-05 Dave Brolley <brolley@redhat.com>Dave Brolley13-4/+10882
* mep-*: New support for Toshiba Media Processor (MeP). * Makefile.am: Add support for MeP. * configure.in: Likewise. * disassemble.c: Likewise. * Makefile.in: Regenerated. * configure: Regenerated.
2007-02-05Fix year in entries.H.J. Lu1-2/+2
2007-02-05ld/testsuite/H.J. Lu2-6/+15
2076-02-05 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Undo the last change. * ld-x86-64/pcrel16.d: Likewise. opcodes/ 2076-02-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Undo the last change. Properly handle 64K wrap around within the same segment in 16bit mode.
2007-02-03Cosmetic change.H.J. Lu1-1/+1
2007-02-03ld/testsuite/H.J. Lu2-1/+9
2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Updated. * ld-x86-64/pcrel16.d: Likewise. opcodes/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Mask to 16bit only if there is a data16 prefix.
2007-02-022007-02-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* avr-dis.c (avr_operand): Correct PR number in comment.
2007-02-02Fix typos in year.H.J. Lu1-1/+1
2007-02-02binutils/H.J. Lu3-4/+45
2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * doc/binutils.texi (objdump): Document the new addr64 option for i386 disassembler. include/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * dis-asm.h (print_i386_disassembler_options): New. opcodes/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * disassemble.c (disassembler_usage): Call print_i386_disassembler_options for i386 disassembler. * i386-dis.c (print_i386_disassembler_options): New. (print_insn): Support the new addr64 option.
2007-02-02* ppc-dis.c (powerpc_dialect): Handle ppc440.Nick Clifton2-1/+12
* ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can be used.
2007-02-02 * ppc-opc.c (insert_bdm): -Many comment.Alan Modra2-31/+50
(valid_bo): Add "extract" param. Accept both powerpc and power4 BO fields when disassembling with -Many. (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
2007-01-09Move 2006 ChangeLog entries to ChangeLog-2006.H.J. Lu2-830/+838
2007-01-08bfd/Kazu Hirata2-92/+97
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido. * bfd-in2.h: Regenerate. * cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of bfd_mach_cpu32_fido. (m68k_arch_features): Use fido_a instead of cpu32. (bfd_m68k_compatible): Reject the combination of Fido and ColdFire. Accept the combination of CPU32 and Fido with a warning. * elf32-m68k.c (elf32_m68k_object_p, elf32_m68k_merge_private_bfd_data, elf32_m68k_print_private_bfd_data): Treat Fido as an architecture by itself. binutils/ * readelf.c (get_machine_flags): Treat Fido as an architecture by itself. gas/ * config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an architecture by itself. (m68k_ip): Don't issue a warning for tbl instructions on fido. (m68k_elf_final_processing): Treat Fido as an architecture by itself. include/elf/ * m68k.h (EF_M68K_FIDO): New. (EF_M68K_ARCH_MASK): OR EF_M68K_FIDO. (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove. include/opcode/ * m68k.h (m68010up): OR fido_a. opcodes/ * m68k-opc.c (m68k_opcodes): Replace cpu32 with cpu32 | fido_a except on tbl instructions.
2007-01-042007-01-04 Paul Brook <paul@codesourcery.com>Paul Brook2-4/+8
gas/ * config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form. gas/testsuite/ * gas/arm/archv6.s: Add more cpsie tests. * gas/arm/archv6.d: Ditto. opcodes/ * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
2007-01-04gas/testsuite/:Andreas Schwab2-2/+6
* gas/m68k/cpu32.[sd]: New test. * gas/m68k/all.exp: Run it. opcodes/: * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
2007-01-04 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,Julian Brown2-4/+9
vqrshl instructions.
2006-12-27gas/Kazu Hirata2-1/+8
* config/m68k-parse.h (m68k_register): Add CAC and MBB. * config/tc-m68k.c (fido_ctrl): New. (m68k_archs): Use fido_ctrl for -mfidoa. (m68k_cpus): Use fido_ctrl on fido-*-*. (m68k_ip): Add support for CAC and MBB. (init_table): Add CAC and MBB. opcodes/ * m68k-dis.c (print_insn_arg): Add support for cac and mbb.
2006-12-27 * m68k-opc.c (m68k_opcodes): Add sleep and trapx.Kazu Hirata2-0/+8
2006-12-15gas/testsuite/H.J. Lu2-1/+11
2006-12-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead of xmmword ptr. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.l: Updated. opcodes/ 2006-12-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (o_mode): New for 16-byte operand. (intel_operand_size): Generate "OWORD PTR " for o_mode. (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
2006-12-14gas/testsuite/H.J. Lu2-1/+21
2006-12-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-inval.s: Add cmpxchg16b. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.l: Updated. * gas/i386/x86_64.d: Likewise. opcodes/ 2006-12-14 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CMPXCHG8B_Fixup): New. (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
2006-12-112006-12-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-5/+14
* i386-dis.c (Eq): Replaced by ... (Mq): New. This. (Ma): Defined with OP_M instead of OP_E. (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq. (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
2006-12-11bfd/Daniel Jacobowitz2-1/+5
* configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (bfd.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in, doc/Makefile.in: Regenerated. binutils/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in, doc/Makefile.in: Regenerated. gas/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (as.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in, doc/Makefile.in: Regenerated. gprof/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (gprof.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in: Regenerated. ld/ * configure.in: Define GENINSRC_NEVER. * doc/Makefile.am (ld.info): Remove srcdir prefix. (MAINTAINERCLEANFILES): Add info file. (DISTCLEANFILES): Pretend to add info file. * po/Make-in (.po.gmo): Put gmo files in objdir. * configure, Makefile.in: Regenerated. opcodes/ * po/Make-in (.po.gmo): Put gmo files in objdir.
2006-12-102006-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-5/+29
* i386-dis.c (X86_64_1): New. (X86_64_2): Likewise. (X86_64_3): Likewise. (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64 tables. (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
2006-12-092006-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-21/+25
* i386-dis.c: Adjust white spaces.
2006-12-04opcodes/Jan Beulich2-0/+5
2006-12-04 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_J): Update used_prefixes in v_mode. gas/testsuite/ 2006-12-04 Jan Beulich <jbeulich@novell.com> * gas/i386/opcode-intel.d: Fix wrong expectation. Make white space expectations more consistent.
2006-12-01opcodes/Jan Beulich2-58/+39
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (SEG_Fixup): Delete. (Sv): Use OP_SEG. (putop): New suffix character 'D'. (dis386): Use it. (grps): Likewise. (OP_SEG): Handle bytemode other than w_mode. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.d: Adjust. * gas/i386/naked.d: Adjust. * gas/i386/opcode.d: Adjust.
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