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2014-08-26MIPS: Make the CODE10 operand code consistent between ISAsMaciej W. Rozycki2-5/+11
This change moves the microMIPS 10-bit uninterpreted immediate code embedded at bits 25..16 in the SYSCALL, WAIT, SDBBP and HYPCALL instructions from `B' over to `+J' which is the operand code used in the standard MIPS instruction set for a similar code embedded at bits 20..11, currently used by HYPCALL only in that set. opcodes/ * micromips-opc.c (decode_micromips_operand): Rename `B' to `+J'. (micromips_opcodes): Use "+J" in place of "B" for "hypcall", "sdbbp", "syscall" and "wait". include/opcode/ * mips.h: Document the move of `MICROMIPSOP_*_CODE10' from `B' over to `+J'.
2014-08-22ARM/opcodes: Fix negative hexadecimal offset disassemblyMaciej W. Rozycki2-0/+8
2014-08-21 Nathan Sidwell <nathan@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> opcodes/ * arm-dis.c (print_arm_address): Negate the GPR-relative offset returned if the U bit is set. 2014-08-21 Paul Brook <paul@codesourcery.com> gas/testsuite/ * gas/arm/arch7a-mp.d: Adjust according to `print_arm_address' offset fix. * gas/arm/arch7r-mp.d: Likewise.
2014-08-21MIPS/opcodes: Remove microMIPS 48-bit LI instructionMaciej W. Rozycki2-4/+5
The 48-bit LI instruction encoding has been removed from the microMIPS ISA and no implementation ever made that included it. * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out 48-bit "li" encoding.
2014-08-19This patch set mainly aims at improving the S/390 disassembler'sAndreas Arnez2-134/+184
readability and also fixes some minor issues. S/390: Split disassembler routine into smaller functions S/390: Fix disassembler's treatment of signed/unsigned operands S/390: Fix off-by-one error in disassembler initialization S/390: Simplify opcode search loop in disassembler S/390: Drop function pointer dereferences in disassembler S/390: Various minor simplifications in disassembler
2014-08-14opcodes: blackfin: convert ad-hoc ints to bfd_booleanMike Frysinger2-21/+31
These various int fields are being used as booleans, so change to the existing bfd_boolean style. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-14opcodes: blackfin: simplify decode_CC2stat_0 logicMike Frysinger2-41/+11
These multiple if statements can be condensed down into a single if statement and an array of strings. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-14opcodes: blackfin: avoid duplicate memory readsMike Frysinger2-6/+10
Rather than reading the same memory twice, pass the value back up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-13opcodes: blackfin: push down global stateMike Frysinger2-43/+83
The variables used to track insn state should be pushed down into the private_data structure to avoid pollution across calls. This also happens to fix the output when hitting comments/invalid insns which needs to tweak a gas test. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-13opcodes: blackfin: do not force align the PCMike Frysinger2-1/+14
If the user gives us an unaligned PC, then dump an error as such. Otherwise if you try to disassemble at an odd address, the output will look weird (it'll read one byte earlier). This can be seen in one of the gas tests where data is in the middle of .text, so move the data to .data like it should be in the first place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-08-13opcodes: blackfin: handle memory read errorsMike Frysinger2-19/+45
The current code ignores memory read errors which isn't a great idea. So add a helper function which takes care of error checking and update the code to use that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-07-29[MIPS] Rename COPROC related macrosMatthew Fortune3-134/+142
gas/ * config/tc-mips.c: Rename INSN_LOAD_COPROC_DELAY to INSN_LOAD_COPROC and INSN_COPROC_MOVE_DELAY to INSN_COPROC_MOVE throughout. include/opcode/ * mips.h (INSN_LOAD_COPROC_DELAY): Rename to... (INSN_LOAD_COPROC): New define. (INSN_COPROC_MOVE_DELAY): Rename to... (INSN_COPROC_MOVE): New define. opcodes/ * micromips-opc.c (COD): Rename throughout to... (CM): New define, update to use INSN_COPROC_MOVE. (LCD): Rename throughout to... (LC): New define, update to use INSN_LOAD_COPROC. * mips-opc.c: Likewise.
2014-07-29[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensionsMatthew Fortune3-24/+34
Specification: https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking include/ * elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. (Val_GNU_MIPS_ABI_FP_64): Redefine. (Val_GNU_MIPS_ABI_FP_XX): Define. (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. (AFL_EXT_LOONGSON_2F): Likewise. (bfd_mips_elf_swap_abiflags_v0_in): Prototype. (bfd_mips_elf_swap_abiflags_v0_out): Likewise. (bfd_mips_isa_ext): Likewise. bfd/ * elfxx-mips.c (ABI_O32_P, MIPS_ELF_ABIFLAGS_SECTION_NAME_P): New macro. (mips_elf_obj_tdata): Add abiflags and abiflags_valid fields. (bfd_mips_elf_swap_abiflags_v0_in): New function. (bfd_mips_elf_swap_abiflags_v0_out): Likewise. (_bfd_mips_elf_section_from_shdr): Handle SHT_MIPS_ABIFLAGS. (_bfd_mips_elf_fake_sections): Likewise. (_bfd_mips_elf_always_size_sections): Handle .MIPS.abiflags. (_bfd_mips_elf_additional_program_headers): Account for new PT_MIPS_ABIFLAGS program header. (_bfd_mips_elf_modify_segment_map): Create PT_MIPS_ABIFLAGS segment and associate with .MIPS.abiflags. (_bfd_mips_elf_gc_mark_extra_sections): New function. (bfd_mips_isa_ext, update_mips_abiflags_isa): New static function. (infer_mips_abiflags): Likewise. (_bfd_mips_elf_final_link): Handle .MIPS.abiflags. (mips_32bit_flags_p): Moved higher. (mips_elf_merge_obj_attributes, _bfd_mips_fp_abi_string): Error checking for FP ABIs. (_bfd_mips_elf_merge_private_bfd_data): Restructure and add abiflags checks. Check EF_MIPS_FP64 flag consistency. (print_mips_ases, print_mips_isa_ext): New static function. (print_mips_fp_abi_value, get_mips_reg_size): Likewise. (_bfd_mips_elf_print_private_bfd_data): Display abiflags data. (_bfd_mips_post_process_headers): Set EI_ABIVERSION = 3 for Val_GNU_MIPS_ABI_FP_64 or Val_GNU_MIPS_ABI_FP_64A. * elfxx-mips.h (_bfd_mips_elf_gc_mark_extra_sections): New prototype. * elf32-mips.c (elf_backend_gc_mark_extra_sections): Implement. * elfn32-mips.c (elf_backend_gc_mark_extra_sections): Implement. * elf64-mips.c (elf_backend_gc_mark_extra_sections): Implement. binutils/ * readelf.c (get_mips_segment_type): Display name for PT_MIPS_ABIFLAGS. (get_mips_section_type_name): Display name for SHT_MIPS_ABIFLAGS. (display_mips_gnu_attribute): Abstracted fp abi printing to... (print_mips_fp_abi_value): New static function. Handle new FP ABIs. (print_mips_ases, print_mips_isa_ext): New static functions. (get_mips_reg_size): Likewise. (process_mips_specific): Display abiflags data. elfcpp/ * elfcpp.h (PT_MIPS_ABIFLAGS): New program header type. gas/ * config/tc-mips.c (mips_flags_frag): New static global. (struct mips_set_options): Add oddspreg field. (file_mips_opts, mips_opts): Initialize oddspreg. (ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and Loongson-3a. (enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg and -mno-odd-spreg options. (md_begin): Create .MIPS.abiflags section. (fpabi_incompatible_with, fpabi_requires): New static function. (check_fpabi): Likewise. (mips_check_options): Handle fp=xx and oddspreg restrictions. (file_mips_check_options): Set oddspreg by default for fp=xx. (mips_oddfpreg_ok): Re-write function. (check_regno): Check odd numbered registers regardless of FPR size. For fp != 32 use as_bad instead of as_warn. (match_float_constant): Rewrite check regarding FP register width. Add support for generating constants when MXHC1 is present. Handle fp=xx to comply with the ABI. (macro): Update M_LI_DD similarly to match_float_constant. Generate MTHC1 when available. Check that correct code can be generated for fp=xx and fp=64 ABIs. (parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg options. (mips_convert_ase_flags): New static function. (mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64 to determine when to add the EF_MIPS_FP64 flag. Populate the .MIPS.abiflags section. (md_mips_end): Update .gnu_attribute based on command line and .module as applicable. Use check_fpabi to ensure .gnu.attribute and command line/.module options are consistent. * doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new -mfpxx, -modd-spreg and -mno-odd-spreg options. * doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg, gnu_attribute values and FP ABIs. ld/ * emulparams/elf32bmip.sh: Add .MIPS.abiflags. * emulparams/elf32bmipn32-defs.sh: Likewise. * emulparams/elf64bmip-defs.sh: Likewise. opcodes/ * micromips-opc.c (COD, LCD) New macros. (cfc1, ctc1): Remove FP_S attribute. (dmfc1, mfc1, mfhc1): Add LCD attribute. (dmtc1, mtc1, mthc1): Add COD attribute. * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute. binutils/testsuite/ * binutils-all/readelf.s: Account for .MIPS.abiflags and .gnu.attributes. * binutils-all/readelf.ss-tmips: Likewise. * binutils-all/strip-3.d: Likewise. gas/testsuite/ * gas/mips/attr-gnu-4-0.d: New. * gas/mips/attr-gnu-4-0.s: Likewise. * gas/mips/attr-gnu-4-1-mfp32.l: Likewise. * gas/mips/attr-gnu-4-1-mfp32.s: Likewise. * gas/mips/attr-gnu-4-1-mfp64.l: Likewise. * gas/mips/attr-gnu-4-1-mfp64.s: Likewise. * gas/mips/attr-gnu-4-1-mfpxx.s: Likewise. * gas/mips/attr-gnu-4-1-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-1-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-1-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-1-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-1.d: Likewise. * gas/mips/attr-gnu-4-1.s: Likewise. * gas/mips/attr-gnu-4-2-mdouble-float.l: Likewise. * gas/mips/attr-gnu-4-2-mdouble-float.s: Likewise. * gas/mips/attr-gnu-4-2-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-2-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-2.d: Likewise. * gas/mips/attr-gnu-4-2.s: Likewise. * gas/mips/attr-gnu-4-3-mhard-float.l: Likewise. * gas/mips/attr-gnu-4-3-mhard-float.s: Likewise. * gas/mips/attr-gnu-4-3.d: Likewise. * gas/mips/attr-gnu-4-3.s: Likewise. * gas/mips/attr-gnu-4-4.l: Likewise. * gas/mips/attr-gnu-4-4.s: Likewise. * gas/mips/attr-gnu-4-5-64.l: Likewise. * gas/mips/attr-gnu-4-5-64.s: Likewise. * gas/mips/attr-gnu-4-5.d: Likewise. * gas/mips/attr-gnu-4-5.l: Likewise. * gas/mips/attr-gnu-4-5.s: Likewise. * gas/mips/attr-gnu-4-6-64.l: Likewise. * gas/mips/attr-gnu-4-6-64.s: Likewise. * gas/mips/attr-gnu-4-6.d: Likewise. * gas/mips/attr-gnu-4-6.l: Likewise. * gas/mips/attr-gnu-4-6.s: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-6-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-6-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-6-noodd.l: Likewise. * gas/mips/attr-gnu-4-6-noodd.s: Likewise. * gas/mips/attr-gnu-4-7-64.l: Likewise. * gas/mips/attr-gnu-4-7-64.s: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-7-odd.l: Likewise. * gas/mips/attr-gnu-4-7-odd.s: Likewise. * gas/mips/attr-gnu-4-7.d: Likewise. * gas/mips/attr-gnu-4-7.l: Likewise. * gas/mips/attr-gnu-4-7.s: Likewise. * gas/mips/attr-none-double.d: Likewise. * gas/mips/attr-none-o32-fp64.d: Likewise. * gas/mips/attr-none-o32-fp64-nooddspreg.d * gas/mips/attr-none-o32-fpxx.d: Likewise. * gas/mips/attr-none-single-float.d: Likewise. * gas/mips/attr-none-soft-float.d: Likewise. * gas/mips/elf_arch_mips32r3.d: Likewise. * gas/mips/elf_arch_mips32r5.d: Likewise. * gas/mips/elf_arch_mips64r3.d: Likewise. * gas/mips/elf_arch_mips64r5.d: Likewise. * gas/mips/li-d.d: Likewise. * gas/mips/li-d.s: Likewise. * gas/mips/module-check-warn.l: Likewise. * gas/mips/module-check-warn.s: Likewise. * gas/mips/module-check.d: Likewise. * gas/mips/module-check.s: Likewise. * gas/mips/module-mfp32.d: Likewise. * gas/mips/module-mfp32.s: Likewise. * gas/mips/module-mfp64.d: Likewise. * gas/mips/module-mfp64.s: Likewise. * gas/mips/module-mfp64-noodd.d: Likewise. * gas/mips/module-mfp64-noodd.s: Likewise. * gas/mips/module-mfpxx.d: Likewise. * gas/mips/module-mfpxx.s: Likewise. * gas/mips/module-msingle-float.d: Likewise. * gas/mips/module-msingle-float.s: Likewise. * gas/mips/module-msoft-float.d: Likewise. * gas/mips/module-msoft-float.s: Likewise. * gas/mips/module-set-mfpxx.d: Likewise. * gas/mips/module-set-mfpxx.s: Likewise. * gas/mips/fpxx-oddfpreg.d: Likewise. * gas/mips/fpxx-oddfpreg.l: Likewise. * gas/mips/fpxx-oddfpreg.s: Likewise. * gas/mips/no-odd-spreg.d: Likewise. * gas/mips/odd-spreg.d: Likewise. * gas/elf/section2.e-mips: Adjust expected output. * gas/mips/attr-gnu-abi-fp-1.d: Likewise. * gas/mips/attr-gnu-abi-msa-1.d: Likewise. * gas/mips/call-nonpic-1.d: Likewise. * gas/mips/elf_arch_mips1.d: Likewise. * gas/mips/elf_arch_mips2.d: Likewise. * gas/mips/elf_arch_mips3.d: Likewise. * gas/mips/elf_arch_mips32.d: Likewise. * gas/mips/elf_arch_mips32r2.d: Likewise. * gas/mips/elf_arch_mips4.d: Likewise. * gas/mips/elf_arch_mips5.d: Likewise. * gas/mips/elf_arch_mips64.d: Likewise. * gas/mips/elf_arch_mips64r2.d: Likewise. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/elf_ase_micromips.d: Likewise. * gas/mips/elf_ase_mips16-2.d: Likewise. * gas/mips/elf_ase_mips16.d: Likewise. * gas/mips/module-defer-warn1.d: Likewise. * gas/mips/module-override.d: Likewise. * gas/mips/n32-consec.d: Likewise. * gas/mips/nan-2008-1.d: Likewise. * gas/mips/nan-2008-2.d: Likewise. * gas/mips/nan-2008-3.d: Likewise. * gas/mips/nan-2008-4.d: Likewise. * gas/mips/nan-legacy-1.d: Likewise. * gas/mips/nan-legacy-2.d: Likewise. * gas/mips/nan-legacy-3.d: Likewise. * gas/mips/nan-legacy-4.d: Likewise. * gas/mips/nan-legacy-5.d: Likewise. * gas/mips/tmips16-e.d: Likewise. * gas/mips/tmips16-f.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/tmipsel16-f.d: Likewise. * gas/testsuite/gas/mips/mips.exp: Add new tests. ld/testsuite/ * ld-mips-elf/abiflags-strip1-ph.d: New. * ld-mips-elf/abiflags-strip2-ph.d: Likewise. * ld-mips-elf/abiflags-strip3-ph.d: Likewise. * ld-mips-elf/abiflags-strip4-ph.d: Likewise. * ld-mips-elf/abiflags-strip5-ph.d: Likewise. * ld-mips-elf/abiflags-strip6-ph.d: Likewise. * ld-mips-elf/abiflags-strip7-ph.d: Likewise. * ld-mips-elf/abiflags-strip8-ph.d: Likewise. * ld-mips-elf/abiflags-strip9-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-06.d: Likewise. * ld-mips-elf/attr-gnu-4-07.d: Likewise. * ld-mips-elf/attr-gnu-4-08.d: Likewise. * ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-1-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-16.d: Likewise. * ld-mips-elf/attr-gnu-4-17.d: Likewise. * ld-mips-elf/attr-gnu-4-18.d: Likewise. * ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-2-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-26.d: Likewise. * ld-mips-elf/attr-gnu-4-27.d: Likewise. * ld-mips-elf/attr-gnu-4-28.d: Likewise. * ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-3-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-36.d: Likewise. * ld-mips-elf/attr-gnu-4-37.d: Likewise. * ld-mips-elf/attr-gnu-4-38.d: Likewise. * ld-mips-elf/attr-gnu-4-4-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-46.d: Likewise. * ld-mips-elf/attr-gnu-4-47.d: Likewise. * ld-mips-elf/attr-gnu-4-48.d: Likewise. * ld-mips-elf/attr-gnu-4-5-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-50.d: Likewise. * ld-mips-elf/attr-gnu-4-52.d: Likewise. * ld-mips-elf/attr-gnu-4-53.d: Likewise. * ld-mips-elf/attr-gnu-4-54.d: Likewise. * ld-mips-elf/attr-gnu-4-55.d: Likewise. * ld-mips-elf/attr-gnu-4-56.d: Likewise. * ld-mips-elf/attr-gnu-4-57.d: Likewise. * ld-mips-elf/attr-gnu-4-58.d: Likewise. * ld-mips-elf/attr-gnu-4-6-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-6.s: Likewise. * ld-mips-elf/attr-gnu-4-60.d: Likewise. * ld-mips-elf/attr-gnu-4-61.d: Likewise. * ld-mips-elf/attr-gnu-4-62.d: Likewise. * ld-mips-elf/attr-gnu-4-63.d: Likewise. * ld-mips-elf/attr-gnu-4-64.d: Likewise. * ld-mips-elf/attr-gnu-4-65.d: Likewise. * ld-mips-elf/attr-gnu-4-66.d: Likewise. * ld-mips-elf/attr-gnu-4-67.d: Likewise. * ld-mips-elf/attr-gnu-4-68.d: Likewise. * ld-mips-elf/attr-gnu-4-7-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-7.s: Likewise. * ld-mips-elf/attr-gnu-4-70.d: Likewise. * ld-mips-elf/attr-gnu-4-71.d: Likewise. * ld-mips-elf/attr-gnu-4-72.d: Likewise. * ld-mips-elf/attr-gnu-4-73.d: Likewise. * ld-mips-elf/attr-gnu-4-74.d: Likewise. * ld-mips-elf/attr-gnu-4-75.d: Likewise. * ld-mips-elf/attr-gnu-4-76.d: Likewise. * ld-mips-elf/attr-gnu-4-77.d: Likewise. * ld-mips-elf/attr-gnu-4-78.d: Likewise. * ld-mips-elf/attr-gnu-4-8.s: Likewise. * ld-mips-elf/attr-gnu-4-81.d: Likewise. * ld-mips-elf/empty.s: Likewise. * ld-mips-elf/attr-gnu-4-00.d: Adjust expected output. * ld-mips-elf/attr-gnu-4-01.d: Likewise. * ld-mips-elf/attr-gnu-4-02.d: Likewise. * ld-mips-elf/attr-gnu-4-03.d: Likewise. * ld-mips-elf/attr-gnu-4-04.d: Likewise. * ld-mips-elf/attr-gnu-4-05.d: Likewise. * ld-mips-elf/attr-gnu-4-10.d: Likewise. * ld-mips-elf/attr-gnu-4-11.d: Likewise. * ld-mips-elf/attr-gnu-4-14.d: Likewise. * ld-mips-elf/attr-gnu-4-15.d: Likewise. * ld-mips-elf/attr-gnu-4-2.s: Likewise. * ld-mips-elf/attr-gnu-4-20.d: Likewise. * ld-mips-elf/attr-gnu-4-22.d: Likewise. * ld-mips-elf/attr-gnu-4-24.d: Likewise. * ld-mips-elf/attr-gnu-4-25.d: Likewise. * ld-mips-elf/attr-gnu-4-3.s: Likewise. * ld-mips-elf/attr-gnu-4-30.d: Likewise. * ld-mips-elf/attr-gnu-4-33.d: Likewise. * ld-mips-elf/attr-gnu-4-34.d: Likewise. * ld-mips-elf/attr-gnu-4-35.d: Likewise. * ld-mips-elf/attr-gnu-4-40.d: Likewise. * ld-mips-elf/attr-gnu-4-41.d: Likewise. * ld-mips-elf/attr-gnu-4-42.d: Likewise. * ld-mips-elf/attr-gnu-4-43.d: Likewise. * ld-mips-elf/attr-gnu-4-44.d: Likewise. * ld-mips-elf/attr-gnu-4-45.d: Likewise. * ld-mips-elf/attr-gnu-4-5.s: Likewise. * ld-mips-elf/attr-gnu-4-51.d: Likewise. * ld-mips-elf/attr-gnu-8-00.d: Likewise. * ld-mips-elf/attr-gnu-8-01.d: Likewise. * ld-mips-elf/attr-gnu-8-02.d: Likewise. * ld-mips-elf/attr-gnu-8-10.d: Likewise. * ld-mips-elf/attr-gnu-8-11.d: Likewise. * ld-mips-elf/attr-gnu-8-20.d: Likewise. * ld-mips-elf/attr-gnu-8-22.d: Likewise. * ld-mips-elf/jalx-2.dd: Likewise. * ld-mips-elf/mips16-pic-1.gd: Likewise. * ld-mips-elf/mips16-pic-2.gd: Likewise. * ld-mips-elf/mips16-pic-3.gd: Likewise. * ld-mips-elf/mips16-pic-4a.gd: Likewise. * ld-mips-elf/multi-got-no-shared.d: Likewise. * ld-mips-elf/nan-2008.d: Likewise. * ld-mips-elf/nan-legacy.d: Rework test. * ld-mips-elf/pic-and-nonpic-3a.gd: Likewise. * ld-mips-elf/pic-and-nonpic-3b.gd: Likewise. * ld-mips-elf/pic-and-nonpic-5b.gd: Likewise. * ld-mips-elf/pic-and-nonpic-6.ld: Likewise. * ld-mips-elf/rel32-n32.d: Likewise. * ld-mips-elf/rel32-o32.d: Likewise. * ld-mips-elf/rel64.d: Likewise. * ld-mips-elf/tls-multi-got-1.r: Likewise. * ld-elf/group.ld: Discard .MIPS.abiflags and .gnu.attributes. * ld-elf/orphan-region.ld: Likewise. * ld-elf/orphan.ld: Likewise. * ld-mips-elf/compressed-plt-1.ld: Likewise. * ld-mips-elf/dyn-sec64.ld: Likewise. * ld-mips-elf/got-dump-1.ld: Likewise. * ld-mips-elf/got-dump-2.ld: Likewise. * ld-mips-elf/got-page-1.ld: Likewise. * ld-mips-elf/mips-dyn.ld: Likewise. * ld-mips-elf/mips-lib.ld: Likewise. * ld-mips-elf/pic-and-nonpic-3a.ld: Likewise. * ld-mips-elf/pic-and-nonpic-3b.ld: Likewise. * ld-mips-elf/pic-and-nonpic-4b.ld: Likewise. * ld-mips-elf/pic-and-nonpic-5b.ld: Likewise. * ld-mips-elf/region1.t: Likewise. * ld-mips-elf/stub-dynsym-1.ld: Likewise. * ld-mips-elf/tls-hidden3.ld: Likewise. * ld-mips-elf/vxworks1.ld: Likewise. * ld-scripts/overlay-size.t: Likewise. * ld-mips-elf/elf-rel-got-n32-embed.d: Remove .MIPS.abiflags from objects. * ld-mips-elf/elf-rel-got-n32.d: Likewise. * ld-mips-elf/elf-rel-got-n64-embed.d: Likewise. * ld-mips-elf/elf-rel-got-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-got-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise. * ld-mips-elf/mips-elf.exp: Add new tests.
2014-07-22Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar8-5910/+9526
gas/ * config/tc-i386.c (cpu_arch): Add .avx512dq, CPU_AVX512DQ_FLAGS. * doc/c-i386.texi: Document avx512dq/.avx512dq. gas/testsuite/ * gas/i386/avx512dq-intel.d: New. * gas/i386/avx512dq.d: New. * gas/i386/avx512dq.s: New. * gas/i386/avx512dq_vl-intel.d: New. * gas/i386/avx512dq_vl.d: New. * gas/i386/avx512dq_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512dq-intel.d: New. * gas/i386/x86-64-avx512dq.d: New. * gas/i386/x86-64-avx512dq.s: New. * gas/i386/x86-64-avx512dq_vl-intel.d: New. * gas/i386/x86-64-avx512dq_vl.d: New. * gas/i386/x86-64-avx512dq_vl.s: New. opcodes/ * i386-dis-evex.h: Updated. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A50, PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66, PREFIX_EVEX_0F3A67. (VEX_LEN enum): Add VEX_LEN_0F92_P_2, VEX_LEN_0F93_P_2, VEX_W_0F92_P_2_LEN_0, VEX_W_0F93_P_2_LEN_0. (VEX_W enum): Add EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F78_P_2, EVEX_W_0F79_P_2, EVEX_W_0F7A_P_2, EVEX_W_0F7B_P_2, EVEX_W_0F3838_P_1, EVEX_W_0F3839_P_1, EVEX_W_0F3A16_P_2, EVEX_W_0F3A22_P_2, EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2, EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2. (prefix_table): Add entries for new instructions. (vex_len_table): Ditto. (vex_w_table): Ditto. (OP_E_memory): Update xmmq_mode handling. * i386-gen.c (cpu_flag_init): Add CPU_AVX512DQ_FLAGS. (cpu_flags): Add CpuAVX512DQ. * i386-init.h: Regenerared. * i386-opc.h (CpuAVX512DQ): New. (i386_cpu_flags): Add cpuavx512dq. * i386-opc.tbl: Add AVX512DQ instructions. * i386-tbl.h: Regenerate.
2014-07-22Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar8-5277/+12632
gas/ * config/tc-i386.c (cpu_arch): Add .avx512bw, CPU_AVX512BW_FLAGS. * doc/c-i386.texi: Document avx512bw/.avx512bw. gas/testsuite/ * gas/i386/avx512bw-intel.d: New. * gas/i386/avx512bw-opts-intel.d: New. * gas/i386/avx512bw-opts.d: New. * gas/i386/avx512bw-opts.s: New. * gas/i386/avx512bw-wig.s: New. * gas/i386/avx512bw-wig1-intel.d: New. * gas/i386/avx512bw-wig1.d: New. * gas/i386/avx512bw.d: New. * gas/i386/avx512bw.s: New. * gas/i386/avx512bw_vl-intel.d: New. * gas/i386/avx512bw_vl-opts-intel.d: New. * gas/i386/avx512bw_vl-opts.d: New. * gas/i386/avx512bw_vl-opts.s: New. * gas/i386/avx512bw_vl-wig.s: New. * gas/i386/avx512bw_vl-wig1-intel.d: New. * gas/i386/avx512bw_vl-wig1.d: New. * gas/i386/avx512bw_vl.d: New. * gas/i386/avx512bw_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512bw-intel.d: New. * gas/i386/x86-64-avx512bw-opts-intel.d: New. * gas/i386/x86-64-avx512bw-opts.d: New. * gas/i386/x86-64-avx512bw-opts.s: New. * gas/i386/x86-64-avx512bw-wig.s: New. * gas/i386/x86-64-avx512bw-wig1-intel.d: New. * gas/i386/x86-64-avx512bw-wig1.d: New. * gas/i386/x86-64-avx512bw.d: New. * gas/i386/x86-64-avx512bw.s: New. * gas/i386/x86-64-avx512bw_vl-intel.d: New. * gas/i386/x86-64-avx512bw_vl-opts-intel.d: New. * gas/i386/x86-64-avx512bw_vl-opts.d: New. * gas/i386/x86-64-avx512bw_vl-opts.s: New. * gas/i386/x86-64-avx512bw_vl-wig.s: New. * gas/i386/x86-64-avx512bw_vl-wig1-intel.d: New. * gas/i386/x86-64-avx512bw_vl-wig1.d: New. * gas/i386/x86-64-avx512bw_vl.d: New. * gas/i386/x86-64-avx512bw_vl.s: New. opcodes/ * i386-dis-evex.h: Add new instructions (prefixes bellow). * i386-dis.c (fetch_data): Add EdqwS, Edb, Edw, MaskBDE. (enum): Add dqw_swap_mode, db_mode, dw_mode, mask_bd_mode, REG_EVEX_0F71. (PREFIX enum): Add PREFIX_VEX_0F4A, PREFIX_VEX_0F99, PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A33, PREFIX_EVEX_0F60, PREFIX_EVEX_0F61, PREFIX_EVEX_0F63, PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68, PREFIX_EVEX_0F69, PREFIX_EVEX_0F6B, PREFIX_EVEX_0F71_REG_2, PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6, PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5, PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA, PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE, PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3, PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8, PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC, PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1, PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8, PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD, PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B, PREFIX_EVEX_0F3810, PREFIX_EVEX_0F381C, PREFIX_EVEX_0F381D, PREFIX_EVEX_0F3820, PREFIX_EVEX_0F3826, PREFIX_EVEX_0F382B, PREFIX_EVEX_0F3830, PREFIX_EVEX_0F3838, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3875, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879, PREFIX_EVEX_0F387A, PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387D, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F3A0F, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15, PREFIX_EVEX_0F3A20, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A42. (VEX_LEN enum): Add VEX_LEN_0F41_P_2, VEX_LEN_0F42_P_2, VEX_LEN_0F44_P_2, VEX_LEN_0F45_P_2, VEX_LEN_0F46_P_2, VEX_LEN_0F47_P_2, VEX_LEN_0F4A_P_0, VEX_LEN_0F4A_P_2, VEX_LEN_0F4B_P_0, VEX_LEN_0F90_P_2, VEX_LEN_0F91_P_2, VEX_LEN_0F92_P_3, VEX_LEN_0F93_P_3, VEX_LEN_0F98_P_2, VEX_LEN_0F99_P_0, VEX_LEN_0F99_P_2, VEX_LEN_0F3A31_P_2, VEX_LEN_0F3A33_P_2, VEX_W_0F41_P_2_LEN_1, VEX_W_0F42_P_2_LEN_1, VEX_W_0F44_P_2_LEN_0, VEX_W_0F45_P_2_LEN_1, VEX_W_0F46_P_2_LEN_1, VEX_W_0F47_P_2_LEN_1, VEX_W_0F4A_P_0_LEN_1, VEX_W_0F4A_P_2_LEN_1, VEX_W_0F4B_P_0_LEN_1, VEX_W_0F90_P_2_LEN_0, VEX_W_0F91_P_2_LEN_0, VEX_W_0F92_P_3_LEN_0, VEX_W_0F93_P_3_LEN_0, VEX_W_0F98_P_2_LEN_0, VEX_W_0F99_P_0_LEN_0, VEX_W_0F99_P_2_LEN_0, VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A33_P_2_LEN_0. (VEX_W enum): Add EVEX_W_0F6B_P_2, EVEX_W_0F6F_P_3, EVEX_W_0F7F_P_3, EVEX_W_0F3810_P_1, EVEX_W_0F3810_P_2, EVEX_W_0F3811_P_2, EVEX_W_0F3812_P_2, EVEX_W_0F3820_P_1, EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2, EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F382B_P_2, EVEX_W_0F3830_P_1, EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F387A_P_2, EVEX_W_0F387B_P_2, EVEX_W_0F387D_P_2, EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2, EVEX_W_0F3A42_P_2. (prefix_table): Add entries for new instructions. (vex_table) : Ditto. (vex_len_table): Ditto. (vex_w_table): Ditto. (intel_operand_size): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling. (OP_E_register): Add dqw_swap_mode, dw_mode, db_mode, mask_bd_mode handling. (OP_E_memory): Add dqw_mode, dw_mode, dqw_swap_mode, dqb_mode, db_mode handling. (OP_G): Add db_mode, dw_mode, dqw_swap_mode, mask_bd_mode handling. (OP_EX): Add dqw_swap_mode handling. (OP_VEX): Add mask_bd_mode handling. (OP_Mask): Add mask_bd_mode handling. * i386-gen.c (cpu_flag_init): Add CPU_AVX512BW_FLAGS. (cpu_flags): Add CpuAVX512BW. * i386-init.h: Regenerated. * i386-opc.h (CpuAVX512BW): New. (i386_cpu_flags): Add cpuavx512bw. * i386-opc.tbl: Add AVX512BW instructions. * i386-tbl.h: Regenerate.
2014-07-22Add support for AVX512VL versions of AVX512CD instructions.Ilya Tocar3-0/+214
gas/testsuite/ * gas/i386/avx512cd_vl-intel.d: New. * gas/i386/avx512cd_vl.d: New. * gas/i386/avx512cd_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512cd_vl-intel.d: New. * gas/i386/x86-64-avx512cd_vl.d: New. * gas/i386/x86-64-avx512cd_vl.s: New. opcodes/ * i386-opc.tbl: Add AVX512VL and AVX512CD instructions. * i386-tbl.h: Regenerate.
2014-07-22Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar7-4322/+20266
gas/ * config/tc-i386.c (cpu_arch): Add .avx512vl, CPU_AVX512VL_FLAGS. (build_vex_prefix): Don't abort on VEX.W. (check_VecOperands): Support BROADCAST_1TO4 and BROADCAST_1TO2. (check_VecOperations): Ditto. * doc/c-i386.texi: Document avx512vl/.avx512vl. gas/testsuite/ * gas/i386/avx512f_vl-intel.d: New. * gas/i386/avx512f_vl-opts-intel.d: New. * gas/i386/avx512f_vl-opts.d: New. * gas/i386/avx512f_vl-opts.s: New. * gas/i386/avx512f_vl-wig.s: New. * gas/i386/avx512f_vl-wig1-intel.d: New. * gas/i386/avx512f_vl-wig1.d: New. * gas/i386/avx512f_vl.d: New. * gas/i386/avx512f_vl.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. * gas/i386/x86-64-avx512f_vl-intel.d: New. * gas/i386/x86-64-avx512f_vl-opts-intel.d: New. * gas/i386/x86-64-avx512f_vl-opts.d: New. * gas/i386/x86-64-avx512f_vl-opts.s: New. * gas/i386/x86-64-avx512f_vl-wig.s: New. * gas/i386/x86-64-avx512f_vl-wig1-intel.d: New. * gas/i386/x86-64-avx512f_vl-wig1.d: New. * gas/i386/x86-64-avx512f_vl.d: New. * gas/i386/x86-64-avx512f_vl.s: New. opcodes/ * i386-dis.c (intel_operand_size): Support 128/256 length in vex_vsib_q_w_dq_mode. (OP_E_memory): Add ymmq_mode handling, handle new broadcast. * i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS. (cpu_flags): Add CpuAVX512VL. * i386-init.h: Regenerated. * i386-opc.h (CpuAVX512VL): New. (i386_cpu_flags): Add cpuavx512vl. (BROADCAST_1TO4, BROADCAST_1TO2): Define. * i386-opc.tbl: Add AVX512VL instructions. * i386-tbl.h: Regenerate.
2014-07-20or1k: add missing l.msync, l.psync and l.psync instructions.Stefan Kristiansson6-48/+95
Even though the opcodes were defined for these instructions, the actual instruction definitions were lacking. cpu/ * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. opcodes/ * or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
2014-07-08Fix disasm of vmovsd/vmovss with different length values.Ilya Tocar2-2/+7
gas/testsuite * gas/i386/evex-lig256-intel.d: Updated. * gas/i386/evex-lig256.d: Updated. * gas/i386/evex-lig512-intel.d: Updated. * gas/i386/evex-lig512-intel.d: Updated. * gas/i386/x86-64-evex-lig256-intel.d: Updated. * gas/i386/x86-64-evex-lig256.d: Updated. * gas/i386/x86-64-evex-lig512-intel.d: Updated. * gas/i386/x86-64-evex-lig512-intel.d: Updated. opcodes * i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss. (EVEX_W_0F10_P_3_M_1): Fix vmovsd.
2014-07-04Rename configure.in to configure.acAlan Modra4-2/+8
bfd/ * configure.ac: Rename from configure.in. * Makefile.in: Regenerate. * config.in: Regenerate. * doc/Makefile.in: Regenerate. opcodes/ * configure.ac: Rename from configure.in. * Makefile.in: Regenerate. * config.in: Regenerate. binutils/ * configure.ac: Rename from configure.in. * Makefile.in: Regenerate. * config.in: Regenerate. * doc/Makefile.in: Regenerate. gas/ * configure.ac: Rename from configure.in. * Makefile.in: Regenerate. * config.in: Regenerate. * doc/Makefile.in: Regenerate. gprof/ * configure.ac: Rename from configure.in. * configure.ac: Rename from configure.in. * Makefile.in: Regenerate. * gconfig.in: Regenerate. ld/ * configure.ac: Rename from configure.in. * Makefile.in: Regenerate. * config.in: Regenerate.
2014-07-04Use modern AC_INIT in configure.inAlan Modra5-45/+41
This removes usage of the obsolete AC_INIT and AM_INIT_AUTOMAKE in all binutils configure.in files. The BFD version is now in bfd/version.m4 rather than bfd/configure.in, which allows automake to automatically track this dependency. bfd/ * version.m4: New file. * configure.in: Include version.m4. (AC_INIT): Update. * Makefile.am (RELEASE): Delete. (bfdver.h): Depend on development.sh, use instead of RELEASE. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. opcodes/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. binutils/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gas/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * configure.com: Get bfd version from bfd/version.m4. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. gprof/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate. ld/ * configure.in: Include bfd/version.m4. (AC_INIT, AM_INIT_AUTOMAKE): Use modern form. (BFD_VERSION): Delete. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in. * configure: Regenerate. * Makefile.in: Regenerate.
2014-07-01Add support for the AVR Tiny series of microcontrollers.Barney Stratford2-2/+26
* archures.c: add avrtiny architecture for avr target. * bfd-in2.h: Regenerate. * cpu-avr.c (arch_info_struct): add avrtiny arch info. * elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16 added for 16 bit LDS/STS instruction of avrtiny arch. (avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to BFD_RELOC_AVR_LDS_STS_16. (bfd_elf_avr_final_write_processing): select machine number avrtiny arch. (elf32_avr_object_p): set machine number for avrtiny arch. * libbfd.h: Regenerate. * reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc. * config/tc-avr.c (mcu_types): Add avrtiny arch. Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20 and attiny40. (md_show_usage): Add avrtiny arch in usage message. (avr_operand): validate and issue error for invalid register for avrtiny. add new reloc exp for 16 bit lds/sts instruction. (md_apply_fix): check 16 bit lds/sts operand for out of range and encode. (md_assemble): check ISA for arch and issue diagnostic. * include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number. (R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number. * include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA. (AVR_ISA_2xxxa): define ISA without LPM. (AVR_ISA_AVRTINY): define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. * opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts. (print_insn_avr): do not select opcode if insn ISA is avrtiny and machine is not avrtiny. * Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source. (eavrtiny.c): add rules for avrtiny emulation source. * Makefile.in: Regenerate. * configure.tgt: Add avrtiny to avr target emulations. * scripttempl/avrtiny.sc: New file. linker script template for avrtiny arch. * emulparams/avrtiny.sh: New file. emulation parameters for avrtiny arch.
2014-06-26Fix a compile time warning on 32-bit hosts.Philippe De Muyter2-3/+8
* or1k-desc.h (spr_field_masks): Add U suffix to the end of long constants.
2014-06-12Whitespace fixes for cpu/or1k.opcAlan Modra9-136/+140
* or1k.opc: Whitespace fixes.
2014-06-10Only print prefixes before fwaitH.J. Lu2-2/+10
gas/testsuite/ * gas/i386/prefix.s: Add another fwait test. * gas/i386/prefix.d: Updated. opcodes/ * i386-dis.c (fwait_prefix): New. (ckprefix): Set fwait_prefix. (print_insn): Properly print prefixes before fwait.
2014-06-07Allow both signed and unsigned fields in PowerPC cmpli insnAlan Modra2-5/+12
There are legitimate reasons to allow a signed value in a cmpli insn field, for example to test for a "stw r1,lock@sdarel(r13)" instruction in user code, a kernel might use subis r3,r3,STW_R1_0R13@ha # subtract off high part cmplwi r3,lock@sdarel # is low part accessing lock? Since the lock@sdarel may take a range of -32768 to 32767, the allowed range of cmpli immediate must be at least [-32768,65535]. bfd/ * elf32-ppc.c (ppc_elf_relocate_section): Treat field of cmpli insn as a bitfield; Use complain_overflow_bitfield. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. opcodes/ * ppc-opc.c (UISIGNOPT): Define and use with cmpli. gas/ * config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields in 64-bit mode. gold/ * powerpc.cc (relocate): Treat field of cmpli insn as a bitfield.
2014-06-05Make it easy to make --disable-werror the default for both binutils and gdbJoel Brobecker4-4/+16
The goal of this patch is to provide an easy way to make --disable-werror the default when building binutils, or the parts of binutils that need to get built when building GDB. In development mode, we want to continue making -Werror the default with GCC. But, when making releases, I think we want to make it as easy as possible for regular users to successfully build from sources. GDB already has this kind of feature to turn -Werror as well as the use of the libmcheck library. As GDB Release Manager, I take advantage of it to turn those off after having cut the branch. I'd like to be able to do the same for the binutils bits. And perhaps Tristan will want to do the same for his releases too (not sure, binutils builders might be a little savvier than GDB builders). This patch introduces a new file, called development.sh, which just sets a variable called $development. In our development branches (Eg. "master"), it's set to true. But setting it to false would allow us to change the default behavior of various development-related features to be turned off; in this case, it turns off the use of -Werror by default (use --enable-werror to turn it back on). bfd/ChangeLog: * development.sh: New file. * warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh. Make -Werror the default with GCC only if DEVELOPMENT is true. * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add $(srcdir)/development.sh. * Makefile.in, configure: Regenerate. binutils/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gas/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gold/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): New. * Makefile.in, configure: Regenerate. gprof/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. ld/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. opcodes/ChangeLog: * Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on bfd's development.sh. * Makefile.in, configure: Regenerate. gdb/ChangeLog: * development.sh: Delete. * Makefile.in (config.status): Adjust dependency on development.sh. * configure.ac: Adjust development.sh source call. * configure: Regenerate. gdb/gdbserver/ChangeLog: * configure.ac: Adjust development.sh source call. * Makefile.in (config.status): Adjust dependency on development.sh. * configure: Regenerate. Tested on x86_64-linux by building two ways: One with DEVELOPMENT set to true, and one with DEVELOPMENT set to false. In the first case, I could see the use of -Werror, while it disappeared in the second case.
2014-06-03Fix the disassembly of MSP430 extended index addressing mode.Nick Clifton2-11/+16
* msp430-dis.c (msp430_doubleoperand): Use extension_word to decide when extended addressing is being used.
2014-06-02This fixes a thinko in the LEON support recently added to the assembler.Eric Botcazou2-2/+7
opcodes/ * sparc-opc.c (cas): Disable for LEON. (casl): Likewise.
2014-05-20Remove unnecessary header from m68k-dis.cAlan Modra2-2/+4
* m68k-dis.c: Don't include setjmp.h.
2014-05-09Properly display extra data/address size prefixesH.J. Lu2-55/+22
X86 disassembler checks data and address size prefixes when displaying instruction mnemonic and operands. For the extra data and address size prefixes, their names depend only on the address mode, not the data and address size prefixes. This patch changes x86 disassembler not to check the data and address size prefix when printing extra data and address size prefixes. gas/testsuite/ * gas/i386/nops-1-core2.d: Replace data32 with data16. * gas/i386/nops-4a-i686.d: Likewise. * gas/i386/nops-5-i686.d: Likewise. * gas/i386/nops-5.d: Likewise. * gas/i386/x86-64-cbw-intel.d: Likewise. * gas/i386/x86-64-cbw.d: Likewise. * gas/i386/x86-64-io-intel.d: Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-nops-1-core2.d: Likewise. * gas/i386/x86-64-nops-1-g64.d: Likewise. * gas/i386/x86-64-nops-1-nocona.d: Likewise. * gas/i386/x86-64-nops-1.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. * gas/i386/x86-64-nops-3.d: Likewise. * gas/i386/x86-64-nops-4-core2.d: Likewise. * gas/i386/x86-64-nops-4.d: Likewise. * gas/i386/x86-64-nops-5-k8.d: Likewise. * gas/i386/x86-64-nops-5.d: Likewise. * gas/i386/x86-64-stack-intel.d: Likewise. * gas/i386/x86-64-stack-suffix.d: Likewise. * gas/i386/x86-64-stack.d: Likewise. * gas/i386/ilp32/x86-64-cbw-intel.d: Likewise. * gas/i386/ilp32/x86-64-cbw.d: Likewise. * gas/i386/ilp32/x86-64-io-intel.d: Likewise. * gas/i386/ilp32/x86-64-io-suffix.d: Likewise. * gas/i386/ilp32/x86-64-io.d: Likewise. * gas/i386/ilp32/x86-64-nops-1-core2.d: * gas/i386/ilp32/x86-64-nops-1-nocona.d: Likewise. * gas/i386/ilp32/x86-64-nops-1.d: Likewise. * gas/i386/ilp32/x86-64-nops-2.d: Likewise. * gas/i386/ilp32/x86-64-nops-3.d: Likewise. * gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise. * gas/i386/ilp32/x86-64-nops-4.d: Likewise. * gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise. * gas/i386/ilp32/x86-64-nops-5.: Likewise. * gas/i386/ilp32/x86-64-stack-intel.d: Likewise. * gas/i386/ilp32/x86-64-stack-suffix.: Likewise. * gas/i386/ilp32/x86-64-stack.d: Likewise. ld/testsuite/ * ld-x86-64/tlsbin.dd: Replace data32 with data16. * ld-x86-64/tlsdesc-nacl.pd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlsld1.dd: Likewise. * ld-x86-64/tlsld3.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. opcodes/ 2014-05-09 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (ADDR16_PREFIX): Removed. (ADDR32_PREFIX): Likewise. (DATA16_PREFIX): Likewise. (DATA32_PREFIX): Likewise. (prefix_name): Updated. (print_insn): Simplify data and address size prefixes processing.
2014-05-08or1k: add support for l.swa/l.lwa atomic instructionsStefan Kristiansson6-46/+122
This adds support for the load-link/store-conditional l.lwa/l.swa atomic instructions. The support is added in such way, that the cpu description not only describes the mnemonics, but also the functionality. A couple of fixes to typos in nearby/related code are also snuck into this. cpu/ * or1korbis.cpu (h-atomic-reserve): New hardware. (h-atomic-address): Likewise. (insn-opcode): Add opcodes for LWA and SWA. (atomic-reserve): New operand. (atomic-address): Likewise. (l-lwa, l-swa): New instructions. (l-lbs): Fix typo in comment. (store-insn): Clear atomic reserve on store to atomic-address. Fix register names in fmt field. opcodes/ * or1k-desc.c: Regenerated. * or1k-desc.h: Likewise. * or1k-opc.c: Likewise. * or1k-opc.h: Likewise. * or1k-opinst.c: Likewise.
2014-05-07Add MIPS r3 and r5 support.Andrew Bennett3-2/+55
This patch firstly adds support for mips32r3 mips32r5, mips64r3 and mips64r5. Secondly it adds support for the eretnc instruction. ChangeLog: bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3, mips32r5 and mips64r5. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (arch_info_struct): Likewise. * elfxx-mips.c (mips_set_isa_flags): Likewise. gas/ * tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3 and mips64r5. (ISA_HAS_64BIT_FPRS): Likewise. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5. (ISA_HAS_DROR): Likewise. (options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and OPTION_MIPS64R5. (mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and mips64r5. (md_parse_option): Likewise. (s_mipsset): Likewise. (mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. Also change p5600 entry to be mips32r5. * configure.in: Add support for mips32r3, mips32r5, mips64r3 and mips64r5. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and -mips64r5 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3, mips32r5, mips64r3 and mips64r5 isas to the testsuite. * gas/mips/r5.s: New test. * gas/mips/r5.d: Likewise. include/opcode/ * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define. (INSN_UPTO64R3): New define. (INSN_UPTO64R5): New define. (ISA_MIPS32R3): New define. (ISA_MIPS32R5): New define. (ISA_MIPS64R3): New define. (ISA_MIPS64R5): New define. (CPU_MIPS32R3): New define. (CPU_MIPS32R5): New define. (CPU_MIPS64R3): New define. (CPU_MIPS64R5): New define. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction. (I34): New define. (I36): New define. (I66): New define. (I68): New define. * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and mips64r5. (parse_mips_dis_option): Update MSA and virtualization support to allow mips64r3 and mips64r5.
2014-05-07Fix an issue with "Rearrange MIPS INSN* masks" patch.Andrew Bennett2-3/+5
This fixes an issue with Mark Shinwell's "Rearrange MIPS INSN* masks" patch (https://sourceware.org/ml/binutils/2007-11/msg00231.html). In the patch the pref instruction had its membership flags changed from I4|I32|G3 to I4_32|G3. Unfortunately G3 was defined as being I4, which made the actual expanded flags as: I4|I32|I4 and therefore the membership flags should have been I4_32. Since the patch was committed G3 was redefined to be I4|EE. This fix just removes I4 from G3 making the expanded membership flags for pref as I4_32|EE. ChangeLog: opcodes/ * mips-opc.c (G3): Remove I4.
2014-05-05Properly handle multiple opcode prefixesH.J. Lu2-114/+161
This patch updates multiple opcode prefix processing: 1. Always print prefix together with bad opcode. 2. Since the last seen segment register prefix is active, we only print the active segment register in the memory operand. 3. The 0xf2 and 0xf3 prefixes take precedence over the 0x66 prefix as the opcode prefix. Also the last of the 0xf2 and 0xf3 prefixes wins. 4. Ignore invalid 0xf2/0xf3 prefixes if they aren't mandatory. gas/testsuite/ PR binutils/16893 * gas/i386/katmai.d: Expect "gs" as prefix. * gas/i386/long-1.s: Replace movapd with movss. * gas/i386/x86-64-long-1.s: Likewise. * gas/i386/long-1-intel.d: Updated. * gas/i386/long-1.d: Likewise. * gas/i386/x86-64-long-1-intel.d: Likewise. * gas/i386/x86-64-long-1.d: Likewise. * gas/i386/prefix.s: Add tests for multiple 0x66, 0x67, 0xf0, 0xf2 and 0xf3 prefixes. * gas/i386/prefix.d: Updated. opcodes/ PR binutils/16893 * i386-dis.c (twobyte_has_mandatory_prefix): New variable. (end_codep): Likewise. (mandatory_prefix): Likewise. (active_seg_prefix): Likewise. (ckprefix): Set active_seg_prefix to the active segment register prefix. (seg_prefix): Removed. (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ for prefix index. Ignore the index if it is invalid and the mandatory prefix isn't required. (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits in used_prefixes here. Don't print unused prefixes. Check active_seg_prefix for the active segment register prefix. Restore the DFLAG bit in sizeflag if the data size prefix is unused. Check the unused mandatory PREFIX_XXX prefixes (append_seg): Only print the segment register which gets used. (OP_E_memory): Check active_seg_prefix for the segment register prefix. (OP_OFF): Likewise. (OP_OFF64): Likewise. (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
2014-05-02Use sigsetjmp/siglongjmp in opcodesH.J. Lu11-18/+110
sigsetjmp/siglongjmp without saving the signal mask is faster than setjmp/longjmp on systems where the signal mask is saved. This patch uses sigsetjmp/siglongjmp without saving the signal mask if possible. PR binutils/16886 * config.in: Regenerated. * configure: Likewise. * configure.in: Check if sigsetjmp is available. * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP. * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn): Replace setjmp with OPCODES_SIGSETJMP. * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP. * sysdep.h (OPCODES_SIGJMP_BUF): New macro. (OPCODES_SIGSETJMP): Likewise. (OPCODES_SIGLONGJMP): Likewise. * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP. * xtensa-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP. * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF. (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP. (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
2014-05-01Handle prefixes before fwaitH.J. Lu2-1/+12
0x9b (fwait) is both an instruction and an opcode prefix. When 0x9b is treated as an instruction, we need to handle any prefixes before it. This patch handles it properly. gas/testsuite/ PR binutils/16891 * gas/i386/opcode.s: Add test for fwait with prefix. * gas/i386/opcode-intel.d: Updated. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. opcodes/ PR binutils/16891 * i386-dis.c (print_insn): Handle prefixes before fwait.
2014-04-26Regenerate files for openrisk -> or1k changeAlan Modra2-9/+9
bfd/ * po/SRC-POTFILES.in: Regenerate. * configure: Regenerate. gas/ * po/POTFILES.in: Regenerate. opcodes/ * po/POTFILES.in: Regenerate.
2014-04-23Add support for the MIPS eXtended Physical Address (XPA) ASE.Andrew Bennett3-4/+40
ChangeLog: binutils/ * doc/binutils.texi: Document the disassemble MIPS XPA instructions command line option. gas/ * config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA. (md_longopts): Add xpa and no-xpa command line options. (mips_ases): Add MIPS XPA ASE. (mips_cpu_info_table): Update p5600 entry to allow the XPA ASE. * doc/as.texinfo: Document the MIPS XPA command line options. * doc/c-mips.texi: Document the MIPS XPA command line options, and assembler directives. gas/testsuite/ * gas/mips/mips.exp: Add xpa tests. * gas/mips/xpa.s: New test. * gas/mips/xpa.d: Likewise. include/ * opcode/mips.h (ASE_XPA): New define. opcodes/ * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2 to allow the MIPS XPA ASE. (parse_mips_dis_option): Process the -Mxpa option. * mips-opc.c (XPA): New define. (mips_builtin_opcodes): Add MIPS XPA instructions and move the locations of the ctc0 and cfc0 instructions.
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson20-3851/+5200
with support for the new or1k configuration.
2014-04-04Add support for Intel SGX instructionsIlya Tocar7-3852/+3910
Add Intel SGX instructions support to assembler and disassembler. gas/ * config/tc-i386.c (cpu_arch): Add .se1. * doc/c-i386.texi: Document .se1/se1. gas/testsuite/ * gas/i386/i386.exp: Run SE1 tests. * gas/i386/se1.d: New file. * gas/i386/se1.s: Ditto. * gas/i386/x86-64-se1.d: Ditto. * gas/i386/x86-64-se1.s: Ditto. opcodes/ * i386-dis.c (rm_table): Add encls, enclu. * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS, (cpu_flags): Add CpuSE1. * i386-opc.h (enum): Add CpuSE1. (i386_cpu_flags): Add cpuse1. * i386-opc.tbl: Add encls, enclu. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2014-04-02Add new sign-extension instructions to moxie portAnthony Green2-2/+7
2014-03-26[AArch64 disassembler] Add missing checks of undefine encodings onYufeng Zhang2-3/+14
st1/st2/st3/st4 instructions. opcodes/ * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined instructions. binutils/testsuite/ * binutils-all/aarch64/aarch64.exp: New test driver for AArch64. * binutils-all/aarch64/unallocated-encoding.s: New testcase. * binutils-all/aarch64/unallocated-encoding.d: Ditto.
2014-03-20Fix memory size for gather/scatter instructionsIlya Tocar5-27/+60
For gathers with indices larger than elements (e. g.) vpgatherqd ymm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] We currently treat memory size as a size of index register, while it is actually should be size of destination register: vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123] This patch fixes it. opcodes/ * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps, vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd, vscatterqps. * i386-tbl.h: Regenerate. gas/testsuite/ * gas/i386/avx512pf-intel.d: Change memory size for vgatherpf0qps, vgatherpf1qps, vscatterpf0qps, vscatterpf1qps. * gas/i386/avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/avx512f-intel.d: Change memory size for vgatherqps, vpgatherqd, vpscatterqd, vscatterqps. * gas/i386/avx512f.s: Ditto. * gas/i386/x86-64-avx512f-intel.d: Ditto. * gas/i386/x86-64-avx512f.s: Ditto.
2014-03-19This patch adds support for the hyperprivileged registers %hstick_offsetJose E. Marchesi2-1/+6
and %hstick_enable to the Sparc assembler. * config/tc-sparc.c (hpriv_reg_table): Added entries for %hstick_offset and %hstick_enable. * doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and %hstick_enable hyperprivileged registers. * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and %hstick_enable added. * gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable. * gas/sparc/rdhpr.d: Likewise. * gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable. * gas/sparc/wrhpr.d: Likewise.
2014-03-19Fix typo in changelog entry.Nick Clifton1-1/+1
2014-03-19Fix RX gas testsuite failures by accounting for new variations in the ↵Nick Clifton3-614/+627
disassembler's output. * rx-decode.opc (bwl): Allow for bogus instructions with a size field of 3. (sbwl, ubwl, SCALE): Likewise. * rx-decode.c: Regenerate. * gas/rx/mov.d: Update expected disassembly.
2014-03-12autoreconfAlan Modra2-1/+5
Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes. Regenerate gas/config.in.
2014-03-05Update copyright yearsAlan Modra263-394/+270
2014-03-04Fix changelog formatting in last commit -- sorryRichard Sandiford1-1/+1
2014-03-04bfd/Richard Sandiford2-1/+5
2014-02-04 Heiher <r@hev.cc> * elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for Loongson-3A. (mips_mach_extensions): Make bfd_mach_mips_loongson_3a an extension of bfd_mach_mipsisa64r2. opcodes/ 2014-02-04 Heiher <r@hev.cc> * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A. gas/ 2014-02-04 Heiher <r@hev.cc> * config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for Loongson-3A.
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