Age | Commit message (Collapse) | Author | Files | Lines |
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* m68k-opc.c (m68k_opcodes): Fix coldfire msac.w instructions with parallel loads.
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registers instead of register number.
* gas/ia64/regs.d: Expect symbolic names for cr registers due to
improved disassembler.
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which are not included in the "Preliminary Decimal Floating-Point
Architecture" document.
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2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Replace no_xsuf with
no_ldsuf.
(match_template): Likewise.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Replace No_xSuf with
No_ldSuf.
* i386-opc.tbl: Likewise.
* i386-opc.h (No_xSuf): Renamed to ...
(No_ldSuf): This.
(FWait): Updated.
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2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Check addrprefixop0 to
see if the address size override prefix changes the size of the
first operand.
(check_byte_reg): Don't warn if byteokintel is set.
(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
is set.
(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
is set.
gas/testsuite/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.d: New.
* gas/i386/i386.s: Likewise.
* gas/i386/i386.exp: Run i386.
* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
movzbw, movzwl and movzwq.
* gas/i386/x86_64.d: Updated.
opcodes/
2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
ToQword and AddrPrefixOp0.
* i386-opc.h (ByteOkIntel): New.
(ToDword): Likewise.
(ToQword): Likewise.
(AddrPrefixOp0): Likewise.
(IsPrefix): Updated.
(i386_opcode_modifier): Add byteokintel, todword, toqword
and addrprefixop0.
* i386-opc.tbl (cvtss2si): Add ToQword.
(cvttss2si): Likewise.
(cvtsd2si): Add ToDword.
(cvttsd2si): Likewise.
(monitor): Add AddrPrefixOp0.
(invlpga): Likewise.
(vmload): Likewise.
(vmrun): Likewise.
(vmsave): Likewise.
(pextrb): Add ByteOkIntel.
(pinsrb): Likewise.
* i386-tbl.h: Regenerated.
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* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1.
(USE_REG_TABLE): Likewise.
(USE_MOD_TABLE): Likewise.
(USE_RM_TABLE): Likewise.
(USE_PREFIX_TABLE): Likewise.
(USE_X86_64_TABLE): Likewise.
(USE_3BYTE_TABLE): Likewise.
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* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New.
(MOD_0F51): Likewise.
(MOD_0FD7): Likewise.
(MOD_0FE7_PREFIX_2): Likewise.
(MOD_0F382A_PREFIX_2): Likewise.
(MOD_0F71_REG_2): Updated.
(MOD_0FF0_PREFIX_3): Likewise.
(MOD_62_32BIT): Likewise.
(dis386_twobyte): Use MOD_0F51 and MOD_0FD7.
(prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2.
(mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3,
MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
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2007-10-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/katmai.s: Remove cmpps opcode test.
* gas/i386/simd.s: Add tests for cmpss and cmpsd.
* gas/i386/x86-64-simd.s: Likewise.
* gas/i386/katmai.d: Updated.
* gas/i386/simd-intel.d: Likewise.
* gas/i386/simd-suffix.d: Likewise.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd-suffix.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
opcodes/
2007-10-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_SIMD_Suffix): Renamed to ...
(CMP_Fixup): This. Rewrite.
(OPSIMD): Renamed to ...
(CMP): This. Updated.
(prefix_table): Update PREFIX_0FC2 entry.
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* i386-dis.c (prefix_table): Reordered by opcode.
(mod_table): Likewise.
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* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
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* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
coldfire.
gas/testsuite/
* gas/m68k/mcf-movsr.s: New.
* gas/m68k/mcf-movsr.d: New.
* gas/m68k/all.exp: Add mcf-movsr test.
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dquaiq. to use the TE and FRT macros.
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* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
according to major opcode number.
opcodes/
* ppc-opc.c (TE): Correct signedness.
(powerpc_opcodes): Sort psq_st and psq_stu according to major
opcode number.
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* i386-dis.c (dis386_twobyte): Reformat.
(prefix_table): Likewise.
(three_byte_table): Likewise.
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macro expansion.
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2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_operands): Check the firstxmm0
field in opcode_modifier for instruction with a implicit
xmm0 as the first operand.
opcodes/
2007-10-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add FirstXmm0.
* i386-opc.h (FirstXmm0): New.
(IsPrefix): Updated.
(i386_opcode_modifier): Add firstxmm0.
* i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0.
(blendvps): Likewise.
(pblendvb): Likewise.
* i386-tbl.h: Regenerated.
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* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
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* i386-dis.c (v_mode): Defined as previous one + 1.
(w_mode): Likewise.
(d_mode): Likewise.
(q_mode): Likewise.
(t_mode): Likewise.
(x_mode): Likewise.
(m_mode): Likewise.
(cond_jump_mode): Likewise.
(loop_jcxz_mode): Likewise.
(dq_mode): Likewise.
(dqw_mode): Likewise.
(f_mode): Likewise.
(const_1_mode): Likewise.
(stack_v_mode): Likewise.
(z_mode): Likewise.
(o_mode): Likewise.
(dqb_mode): Likewise.
(dqd_mode): Likewise.
(es_reg): Likewise.
(cs_reg): Likewise.
(ss_reg): Likewise.
(ds_reg): Likewise.
(fs_reg): Likewise.
(gs_reg): Likewise.
(eAX_reg): Likewise.
(eCX_reg): Likewise.
(eDX_reg): Likewise.
(eBX_reg): Likewise.
(eSP_reg): Likewise.
(eBP_reg): Likewise.
(eSI_reg): Likewise.
(eDI_reg): Likewise.
(al_reg): Likewise.
(cl_reg): Likewise.
(dl_reg): Likewise.
(bl_reg): Likewise.
(ah_reg): Likewise.
(ch_reg): Likewise.
(dh_reg): Likewise.
(bh_reg): Likewise.
(ax_reg): Likewise.
(cx_reg): Likewise.
(dx_reg): Likewise.
(bx_reg): Likewise.
(sp_reg): Likewise.
(bp_reg): Likewise.
(si_reg): Likewise.
(di_reg): Likewise.
(rAX_reg): Likewise.
(rCX_reg): Likewise.
(rDX_reg): Likewise.
(rBX_reg): Likewise.
(rSP_reg): Likewise.
(rBP_reg): Likewise.
(rSI_reg): Likewise.
(rDI_reg): Likewise.
(z_mode_ax_reg): Likewise.
(indir_dx_reg): Likewise.
(DREX_OC1): Updated.
(DREX_NO_OC0): Likewise.
(DREX_MASK): Likewise.
(MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not
less than DREX_OC1.
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2007-10-08 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix.
* gas/i386/simd-suffix.d: New.
* gas/i386/x86-64-simd-suffix.d: Likewise.
* gas/i386/x86-64-opcode.d: Updated.
* gas/i386/x86-64-simd.d: Likewise.
opcodes/
2007-10-08 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c: Updated comments for 'Y'.
(putop): Don't add 'q' for 'Y' if suffix_always isn't true.
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* opcodes/mips-dis.c (mips_cp0_names_r3000): New definition.
(mips_cp0_names_r4000): Likewise.
(mips_arch_choices): Link to the above as appropriate.
gas/testsuite/:
* gas/mips/cp0-names-r3000.d: New test for R3000 CP0 symbolic
disassembly.
* gas/mips/cp0-names-r4000.d: New test for R4000/R4400 symbolic
CP0 disassembly.
* mips/mips.exp: Run the new tests.
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../bfd/libbfd.la.
* configure: Regenerate.
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2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run smx.
* gas/i386/smx.d: New.
* gas/i386/smx.s: Likewise.
opcodes/
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Add getsec.
* i386-gen.c (cpu_flags): Add CpuSMX.
* i386-opc.h (CpuSMX): New.
(CpuSSSE3): Updated.
(i386_cpu_flags): Add cpusmx.
* i386-opc.tbl: Add getsec.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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* i386-dis.c (reg_table): Use "{ XX }" on "(bad)".
(prefix_table): Likewise.
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2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/simd.s: Add tests for unpckhpd and unpckhps.
* gas/i386/x86-64-simd.s: Likewise.
* gas/i386/simd-intel.d: Updated.
* gas/i386/simd.d: Likewise.
* gas/i386/x86-64-simd-intel.d: Likewise.
* gas/i386/x86-64-simd.d: Likewise.
opcodes/
2007-10-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Use EXx instead of EXq on
unpckhpX and unpckhpX.
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2007-10-04 David Daney <ddaney@avtrex.com>
* mips-opc.c (mips_builtin_opcodes): Mark lwxc1 as working on FP_S
registers.
gas/testsuite/
2007-10-04 David Daney <ddaney@avtrex.com>
* gas/mips/odd-float.d, gas/mips/odd-float.s: New test.
* gas/mips/mips.exp: Run it.
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* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps"
instead of "movlpX" and "movhlpX", respectively.
(MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of
"movhpX" and "movlhpX", respectively.
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(WIN32LIBADD): Rename to SHARED_LIBADD
(SHARED_DEPENDENCIES): New exported variable.
(enable_shared): Add dependency upon libbfd.la for non-cygwin based shared library builds.
* Makefile.am (libopcodes_la_DEPENDENCIES): Append SHARED_DEPENDENCIES.
(libopcodes_la_LIBADD): Rename WIN32LIBADD to SHARED_LIBADD.
(libopcodes_la_LDFLAGS): Rename WIN32LDFLAGS to SHARED_LDFLAGS.
* configure: Regenerate.
* Makefile.in: Regenerate.
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* arc-opc.c (insert_offset): Fix spelling mistake in error message.
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* i386-dis.c (OP_REG): Set add to 0 only when needed.
(OP_C): Likewise.
(OP_D): Likewise.
(OP_MMX): Likewise.
(OP_XMM): Likewise.
(OP_EM): Likewise.
(OP_MXC): Likewise.
(OP_EX): Likewise.
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* i386-opc.tbl: Update SSE comments.
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* i386-dis.c (THREE_BYTE_0FBA): Renamed to ...
(THREE_BYTE_0F7B): This.
(dis386_twobyte): Updated.
(three_byte_table): Updated comments.
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* 386-dis.c (prefix_table): Reformat comment.
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* 386-dis.c (USE_GROUPS): Renamed to ...
(USE_REG_TABLE): This.
(USE_OPC_EXT_TABLE): Renamed to ...
(USE_MOD_TABLE): This.
(USE_OPC_EXT_RM_TABLE): Renamed to ...
(USE_RM_TABLE): This.
(USE_XXX_TABLE): Reordered.
(GRP): Renamed to ...
(REG_TABLE): This.
(OPC_EXT_TABLE): Renamed to ...
(MOD_TABLE): This.
(OPC_EXT_RM_TABLE): Renamed to ...
(RM_TABLE): This.
(GRP_XXX): Renamed to ...
(REG_XXX): This.
(PREGRP_XXX): Renamed to ...
(PREFIX_XXX): This.
(OPC_EXT_XXX): Renamed to ...
(MOD_XXX): This.
(OPC_EXT_RM_XXX): Renamed to ...
(RM_XXX): This.
(grps): Renamed to ...
(reg_table): This
(prefix_user_table): Renamed to ...
(prefix_table): This
(opc_ext_table): Renamed to ...
(mod_table): This
(opc_ext_rm_table): Renamed to ...
(rm_table): This
(OPC_EXT_RM_XXX): Likewise.
(dis386): Updated.
(dis386_twobyte): Likewise.
(reg_table): Likewise.
(prefix_table): Likewise.
(x86_64_table): Likewise.
(three_byte_table): Likewise.
(mod_table): Likewise.
(rm_table): Likewise.
(get_valid_dis386): Likewise.
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* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ...
(USE_PREFIX_TABLE): This.
(X86_64_SPECIAL): Renamed to ...
(USE_X86_64_TABLE): This.
(IS_3BYTE_OPCODE): Renamed to ...
(USE_3BYTE_TABLE): This.
(GRPXXX): Removed.
(PREGRPXXX): Likewise.
(X86_64_XXX): Likewise.
(THREE_BYTE_XXX): Likewise.
(OPC_EXT_XXX): Likewise.
(OPC_EXT_RM_XXX): Likewise.
(DIS386): New.
(GRP): Likewise.
(PREGRP): Likewise.
(X86_64_TABLE): Likewise.
(THREE_BYTE_TABLE): Likewise.
(OPC_EXT_TABLE): Likewise.
(OPC_EXT_RM_TABLE): Likewise.
(GRP_XXX): Likewise.
(PREGRP_XXX): Likewise.
(X86_64_XXX): Likewise.
(THREE_BYTE_XXX): Likewise.
(OPC_EXT_XXX): Likewise.
(OPC_EXT_RM_XXX): Likewise.
(dis386): Updated.
(dis386_twobyte): Likewise.
(grps): Likewise.
(prefix_user_table): Likewise.
(x86_64_table): Likewise.
(three_byte_table): Likewise.
(opc_ext_table): Likewise.
(opc_ext_rm_table): Likewise.
(get_valid_dis386): Likewise.
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* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2.
(x86_64_table): Likewise.
(opc_ext_table): Likewise.
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2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/5072
* gas/i386/i386.exp: Run x86-64-opcode-inval and
x86-64-opcode-inval-intel.
* gas/i386/x86-64-opcode-inval-intel.d: New.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval.s: Likewise.
opcodes/
2007-09-27 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/5072
* i386-dis.c: Update comments on '{', '}' and '|' to support
only AT&T and Intel modes.
(X86_64_4...X86_64_27): New.
(dis386): Updated. Use X86_64_4...X86_64_21.
(dis386_twobyte): Updated.
(float_mem): Likewise.
(x86_64_table): Add X86_64_4...X86_64_27.
(opc_ext_table): Updated. Use X86_64_22 and X86_64_27.
(putop): Updated handling of '{', '}' and '|' to support only
AT&T and Intel modes.
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* config/m68k-parse.h (m68k_register): Use MBO instead of MBB.
(last_movec_reg): Change to MBO.
* config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB.
(m68k_ip): Use MBO instead of MBO.
(init_table): Use MBO instead of MBO. Add an entry for mbo.
gas/testsuite/
* gas/m68k/fido.s: Add tests for %mbo.
* gas/m68k/fido.d: Update accordingly.
opcodes/
* m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
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translated properly.
* ia64-gen.c (print_dependency_table): Likewise.
* mips-dis.c (print_insn_args): Likewise.
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2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-addr32.d: Adjust expectations.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (OP_E_extended): Distinguish rip- and eip-
relative addressing. Update used_prefixes based on whether any
base or index register was printed.
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2007-09-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (build_modrm_byte): Also check for RegEip
when considering IP-relative addressing.
gas/testsuite/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Adjust for %eip-relative addressing no
longer generating errors.
* gas/i386/reloc64.d, gas/i386/reloc64.l: Update.
* gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix
for %eip-realtive addressing case.
opcodes/
2007-09-26 Jan Beulich <jbeulich@novell.com>
* i386-opc.h (RegEip): Define.
(RegEiz): Adjust.
* i386-reg.tbl: Add eip. Mark rip and eip with RegRex64.
* i386-tbl.h: Re-generate.
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2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use i.tm.opcode_length to
check opcode length.
opcodes/
2007-09-25 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_i386_opcodes): Process opcode_length.
* i386-opc.h (template): Add opcode_length.
* 386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
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* i386-opc.h: Adjust whitespaces.
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* mep-desc.c: Regenerated.
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2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/sib.s: Add more eiz tests.
* gas/i386/x86-64-sib.s: Add more riz tests.
* gas/i386/sib-intel.d: Updated.
* gas/i386/sib.d: Likewise.
* gas/i386/x86-64-sib-intel.d: Likewise.
* gas/i386/x86-64-sib.d: Likewise.
opcodes/
2007-09-20 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
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