aboutsummaryrefslogtreecommitdiff
path: root/opcodes
AgeCommit message (Collapse)AuthorFilesLines
2008-03-26gas/testsuite/:Bernd Schmidt2-790/+934
From Robin Getz <rgetz@blackfin.uclinux.org> * gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in recent changes in opcodes/bfin-dis.c. gas/bfin/arithmetic.s: Likewise. gas/bfin/bit.d: Likewise. gas/bfin/bit2.d: Likewise. gas/bfin/control_code.d: Likewise. gas/bfin/control_code2.d: Likewise. gas/bfin/event.d: Likewise. gas/bfin/event2.d: Likewise. gas/bfin/flow.d: Likewise. gas/bfin/flow2.d: Likewise. gas/bfin/load.d: Likewise. gas/bfin/logical.d: Likewise. gas/bfin/logical2.d: Likewise. gas/bfin/move.d: Likewise. gas/bfin/move2.d: Likewise. gas/bfin/parallel.d: Likewise. gas/bfin/parallel2.d: Likewise. gas/bfin/parallel3.d: Likewise. gas/bfin/parallel4.d: Likewise. gas/bfin/shift.d: Likewise. gas/bfin/shift2.d: Likewise. gas/bfin/stack.d: Likewise. gas/bfin/stack2.d: Likewise. gas/bfin/store.d: Likewise. gas/bfin/vector.d: Likewise. gas/bfin/vector2.d: Likewise. gas/bfin/video.d: Likewise. gas/bfin/video2.d: Likewise. opcodes/: * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d, c_imm32, c_huimm32e): Define. (constant_formats): Add flags for printing decimal, leading spaces, and exact symbols. (comment, parallel): Add global flags in all disassembly. (fmtconst): Take advantage of new flags, and print default in hex. (fmtconst_val): Likewise. (decode_macfunc): Be consistant with spaces, tabs, comments, capitalization in disassembly, fix minor coding style issues. (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise. (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0, decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0, decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0, decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0, decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0, decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0, decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0, _print_insn_bfin, print_insn_bfin): Likewise.
2008-03-26gas/Bernd Schmidt2-1/+5
* config/bfin-parse.y (check_macfunc_option): Allow (IU) option for multiply and multiply-accumulate to data register instruction. (check_macfuncs): Don't check if accumulator matches the data register here. (assign_macfunc): Check if accumulator matches the data register in each rule that moves to the data register. gas/testsuite/ * gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check for IU option. * gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add check for mismatch of accumulator and data register. opcodes/ * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for multiply and multiply-accumulate to data register instruction.
2008-03-26opcodes:Bernd Schmidt2-4/+192
From Robin Getz <robin.getz@analog.com> * bfin-dis.c (bu32): Typedef. (enum const_forms_t): Add c_uimm32 and c_huimm32. (constant_formats[]): Add uimm32 and huimm16. (fmtconst_val): New. (uimm32): Define. (huimm32): Define. (imm16_val): Define. (luimm16_val): Define. (struct saved_state): Define. (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG, A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG, LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define. (get_allreg): New. (decode_LDIMMhalf_0): Print out the whole register value. gas/testsuite: From Jie Zhang <jie.zhang@analog.com> * gas/bfin/load.d: Update.
2008-03-192008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>Andreas Krebbel3-106/+328
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added. (s390_cond_extensions): Reduced extensions to the compare related. (main): z10 cpu type option added. (expandConditionalJump): Renamed to ... (insertExpandedMnemonic): ... this. * opcodes/s390-opc.c: Re-group the operand format makros. (INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI, INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU, INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0, INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU, INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU, INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI, INSTR_SIL_RDU): New instruction formats added. (MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI, MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0, MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI, MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR, MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD, MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format masks added. (s390_opformats): New formats added "ris", "rrs", "sil". * opcodes/s390-opc.txt: Add the conditional jumps with the extensions removed from automatic expansion in s390-mkopc.c manually. (asi - trtre): Add new System z10 EC instructions. * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added. 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> * config/tc-s390.c (md_parse_option): z10 option added. 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/zarch-z10.d: New file. * gas/s390/zarch-z10.s: New file. * gas/s390/s390.exp: Run the z10 testcases.
2008-03-17 * configure.ac: m4_include config/proginstall.m4.Ralf Wildenhues4-24/+56
* configure: Regenerate. config/ * proginstall.m4: New file, with fixed AC_PROG_INSTALL. bfd/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. bfd/doc/ * Makefile.in: Regenerate. intl/ * aclocal.m4: Regenerate. * configure: Likewise. gas/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. * doc/Makefile.in: Likewise. ld/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. opcodes/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. binutils/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise. * doc/Makefile.in: Likewise. gprof/ * aclocal.m4: Regenerate. * configure: Likewise. * Makefile.in: Likewise.
2008-03-13bfd/Alan Modra4-29/+31
* Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * po/SRC-POTFILES.in: Regenerate. bfd/doc/ * Makefile.in: Regenerate. binutils/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * configure: Regenerate. gas/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * configure: Regenerate. opcodes/ * Makefile.am: Run "make dep-am". * Makefile.in: Regenerate. * configure: Regenerate.
2008-03-06 * ppc-opc.c (powerpc_opcodes): Order and format.Alan Modra2-2837/+2873
2008-03-062008-03-06 Florian Krohm <fkrohm@us.ibm.com>Andreas Krebbel2-25/+24
* s390-opc.c (INSTR_RSL_R0RD): Fix operands. * s390-opc.txt (cmpsc): Duplicate entry removed. (dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr, cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr, fier, cu42, cu41): Fix operand format. 2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr, dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix operand format. * gas/s390/esa-g5.s: Likewise. * gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr, cxgr): Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand. * gas/s390/zarch-z9-109.s: Likewise.
2008-03-01gas/testsuite/H.J. Lu3-8/+13
2008-03-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect branches. * gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect branches. * gas/i386/x86-64-branch.d: Updated. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-03-01 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64. * i386-tbl.h: Regenerated.
2008-02-23gas/testsuite/H.J. Lu3-8/+14
2008-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/jump.s: Add tests for far branches. * gas/i386/jump16.s: Likewise. * gas/i386/jump.d: Updated. * gas/i386/jump16.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. * gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect branches. opcodes/ 2008-02-23 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Disallow 16-bit near indirect branches for x86-64. * i386-tbl.h: Regenerated.
2008-02-21opcodes/Jan Beulich3-9/+16
2008-02-21 Jan Beulich <jbeulich@novell.com> * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword and Fword for far indirect jmp. Allow Reg16 and Word for near indirect jmp on x86-64. Disallow Fword for lcall. * i386-tbl.h: Re-generate.
2008-02-18 * cr16.h (cr16_num_optab): Declared.Nick Clifton2-1/+6
* cr16-opc.c (cr16_num_optab): Defined
2008-02-16gas/H.J. Lu3-0/+12
2008-02-16 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (inoutportreg): New. (process_immext): New. (md_assemble): Use it. (update_imm): Use imm16 and imm32s. (i386_att_operand): Use inoutportreg. opcodes/ 2008-02-16 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG. * i386-init.h: Regenerated.
2008-02-14PR binutils/5524Nick Clifton3-2/+31
* configure.in (SHARED_LIBADD): Select the correct host specific file extension for shared libraries. * configure: Regenerate.
2008-02-13gas/Jan Beulich4-0/+14
2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (parse_real_register): Don't return 'FLAT' if not in Intel mode. (i386_intel_operand): Ignore segment overrides in immediate and offset operands. (intel_e11): Range-check i.mem_operands before use as array index. Filter out FLAT for uses other than as segment override. (intel_get_token): Remove broken promotion of "FLAT:" to mean "offset FLAT:". gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/i386/intelok.s: Replace invalid offset expression with valid ones. * gas/i386/x86_64.s: Likewise. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-opc.h (RegFlat): New. * i386-reg.tbl (flat): Add. * i386-tbl.h: Re-generate.
2008-02-13gas/Jan Beulich4-4/+22
2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (intel_e09): Also special-case 'bound'. gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests. * gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e, gas/i386/opcode-intel.d: Adjust. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-dis.c (a_mode): New. (cond_jump_mode): Adjust. (Ma): Change to a_mode. (intel_operand_size): Handle a_mode. * i386-opc.tbl: Allow Dword and Qword for bound. * i386-tbl.h: Re-generate.
2008-02-13gas/Jan Beulich5-346/+475
2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (allow_pseudo_reg): New. (parse_real_register): Check for NULL just once. Allow all register table entries when allow_pseudo_reg is non-zero. Don't allow any registers without type when allow_pseudo_reg is zero. (tc_x86_regname_to_dw2regnum): Replace with ... (tc_x86_parse_to_dw2regnum): ... this. (tc_x86_frame_initial_instructions): Adjust for above change. * config/tc-i386.h (tc_regname_to_dw2regnum): Remove. (tc_parse_to_dw2regnum): New. (tc_x86_regname_to_dw2regnum): Replace with ... (tc_x86_parse_to_dw2regnum): ... this. * dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ... (cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust error handling. gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/cfi/cfi-i386.s: Add code testing use of all registers. Fix a few comments. * gas/cfi/cfi-x86_64.s: Likewise. * gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-gen.c (process_i386_registers): Process new fields. * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to unsigned char. Add dw2_regnum and Dw2Inval. * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo register names. * i386-tbl.h: Re-generate.
2008-02-12Correct last 2 ChangeLog entries.H.J. Lu1-2/+2
2008-02-12gas/H.J. Lu3-0/+11
2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .xsave. (md_show_usage): Add .xsave. * doc/c-i386.texi: Add xsave to -march=. gas/testsuite/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add xgetbv. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. * i386-init.h: Updated.
2008-02-12gas/testsuite/H.J. Lu7-1495/+1581
2002-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave and x86-64-xsave-intel. * gas/i386/x86-64-xsave-intel.d: New file. * gas/i386/x86-64-xsave.d: Likewise. * gas/i386/x86-64-xsave.s: Likewise. * gas/i386/xsave-intel.d: Likewise. * gas/i386/xsave.d: Likewise. * gas/i386/xsave.s: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flags): Add CpuXsave. * i386-opc.h (CpuXsave): New. (Cpu64): Updated. (i386_cpu_flags): Add cpuxsave. * i386-dis.c (MOD_0FAE_REG_4): New. (RM_0F01_REG_2): Likewise. (MOD_0FAE_REG_5): Updated. (RM_0F01_REG_3): Likewise. (reg_table): Use MOD_0FAE_REG_4. (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated for xrstor. (rm_table): Add RM_0F01_REG_2. * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-02-11Fix formatting of most recent entry.Ben Elliston1-0/+1
2008-02-11opcodes/Jan Beulich3-122/+127
2008-02-11 Jan Beulich <jbeulich@novell.com> * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz). * i386-tbl.h: Re-generate.
2008-02-04bfd/H.J. Lu2-0/+15
2008-02-04 Kai Tietz <kai.tietz@onevision.com> H.J. Lu <hongjiu.lu@intel.com> PR 5715 * warning.m4: Enable -Wno-format by default when using gcc on mingw. * configure: Regenerated. binutils/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. gas/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. ld/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. opcodes/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated.
2008-02-04 * mips-dis.c: Update copyright.Adam Nemet3-2/+16
(mips_arch_choices): Add Octeon. * mips-opc.c: Update copyright. (IOCT): New macro. (mips_builtin_opcodes): Add Octeon instruction synciobdma.
2008-01-29 * ppc-opc.c: Support optional L form mtmsr.Alan Modra2-2/+6
2008-01-24gas/testsuite/H.J. Lu2-7/+11
2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-sib.s: Add tests for r12. * gas/i386/x86-64-sib-intel.d: Updated. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-23gas/H.J. Lu3-2/+7
2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_show_usage): Replace tabs with spaces. gas/testsuite/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10. * gas/i386/x86-64-arch-1.d: New. * gas/i386/x86-64-arch-1.s: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. * i386-init.h: Regenerated.
2008-01-232008-01-23 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-0/+13
* ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr, ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
2008-01-22gas/H.J. Lu6-1921/+1929
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_target_format): Remove cpummx2. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: New. * gas/i386/arch-11.s: Likewise. * gas/i386/arch-12.d: Likewise. * gas/i386/arch-12.s: Likewise. * gas/i386/i386.exp: Run arch-11 and arch-12. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuMMX2. (cpu_flags): Likewise. * i386-opc.h (CpuMMX2): Removed. (CpuSSE): Updated. * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-22gas/H.J. Lu3-0/+18
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. (cpu_sub_arch_name): Remove const. (cpu_arch): Add .vmx and .smx. (set_cpu_arch): Append cpu_sub_arch_name. (md_parse_option): Support -march=CPU[,+EXTENSION...]. (md_show_usage): Updated. * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. * doc/as.texinfo: Update i386 -march option. * doc/c-i386.texi: Update -march= for ISA. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10-1.l: New. * gas/i386/arch-10-1.s: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-2.s: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-3.s: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10-4.s: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2, arch-10-3 and arch-10-4. * gas/i386/nops-2.s: Use movsbl instead of cmove. * gas/i386/nops-2-i386.d: Updated. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and CPU_SMX_FLAGS. * i386-init.h: Regenerated.
2008-01-16gas/testsuite/H.J. Lu3-2/+7
2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/prescott.s: Add tests for movddup in Intel syntax. * gas/i386/x86-64-prescott.s: Likewise. * gas/i386/prescott.d: Updated. * gas/i386/x86-64-prescott.d: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Use Qword on movddup. * i386-tbl.h: Regenerated.
2008-01-15gas/H.J. Lu3-0/+44
2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Also zap movzx and movsx suffix for AT&T syntax. gas/testsuite/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add more tests for movsx and movzx. * gas/i386/x86_64.s: Likewise. * gas/i386/inval.s: Remove tests for movsxw and movzxw. * gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw, movsxl, movzxb and movzxw. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. * i386-tbl.h: Regenerated.
2008-01-152008-01-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-9/+29
* i386-dis.c (Mx): New. (PREFIX_0FC3): Likewise. (PREFIX_0FC7_REG_6): Updated. (dis386_twobyte): Use PREFIX_0FC3. (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on movntss.
2008-01-15gas/H.J. Lu6-5555/+5674
2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_reg_size): New. (match_mem_size): Likewise. (operand_size_match): Likewise. (operand_type_match): Also clear all size fields. (match_template): Skip Intel syntax when in AT&T syntax. Call operand_size_match to check operand size. (i386_att_operand): Set the mem field to 1 for memory operand. (i386_intel_operand): Likewise. gas/testsuite/ 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add tests for movsx, movzx and movnti. * gas/i386/inval.s: Likewise. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.s: Likewise. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add IntelSyntax. (operand_types): Add Mem. * i386-opc.h (IntelSyntax): New. * i386-opc.h (Mem): New. (Byte): Updated. (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Add intelsyntax. (i386_operand_type): Add mem. * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more instructions. * i386-reg.tbl: Add size for accumulator. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-142008-01-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* i386-opc.h (Byte): Fix a typo.
2008-01-12gas/testsuite/H.J. Lu7-8463/+11435
2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * gas/i386/i386.s: Add tests for fnstsw and fstsw. * gas/i386/inval.s: Likewise. * gas/i386/x86_64.s: Likewise. * gas/i386/intel.s: Use word instead of dword on ss. * gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in and out. * gas/i386/prefix.s: Remove invalid fstsw. * gas/i386/inval.l: Updated. * gas/i386/intelbad.l: Likewise. * gas/i386/i386.d: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. * gas/i386/prefix.d: Updated. gas/ 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * config/tc-i386.c (_i386_insn): Update comment. (operand_type_match): Also clear unspecified. (operand_type_register_match): Likewise. (parse_operands): Initialize unspecified. (i386_intel_operand): Likewise. (match_template): Check memory and accumulator operand size. (i386_att_operand): Clear unspecified on register operand. (intel_e11): Likewise. (intel_e09): Set operand size and clean unspecified for "XXX PTR". opcodes/ 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * i386-gen.c (operand_type_init): Add Dword to OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, Qword and Xmmword. (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, Xmmword, Unspecified and Anysize. (set_bitfield): Make Mmword an alias of Qword. Make Oword an alias of Xmmword. * i386-opc.h (CheckSize): Removed. (Byte): Updated. (Word): Likewise. (Dword): Likewise. (Qword): Likewise. (Xmmword): Likewise. (FWait): Updated. (OTMax): Likewise. (i386_opcode_modifier): Remove checksize, byte, word, dword, qword and xmmword. (Fword): New. (TBYTE): Likewise. (Unspecified): Likewise. (Anysize): Likewise. (i386_operand_type): Add byte, word, dword, fword, qword, tbyte xmmword, unspecified and anysize. * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, Tbyte, Xmmword, Unspecified and Anysize. * i386-reg.tbl: Add size for accumulator. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-10gas/testsuite/H.J. Lu2-11/+19
2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/nops.s: Add more tests with opcodes from 0x0f19 to 0x0f1f. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. opcodes/ 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. (REG_0F18): Updated. (reg_table): Updated. (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
2008-01-092008-01-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+5
* i386-gen.c (set_bitfield): Use fail () on error.
2008-01-082008-01-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+24
* i386-gen.c (lineno): New. (filename): Likewise. (set_bitfield): Report filename and line numer on error. (process_i386_opcodes): Set filename and update lineno. (process_i386_registers): Likewise.
2008-01-05gas/H.J. Lu5-77/+172
2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic. * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic only. (md_assemble): Remove Intel mode workaround. (match_template): Check support for old gcc, AT&T mnemonic and Intel Syntax. (md_parse_option): Don't set intel_mnemonic to 0 for OPTION_MOLD_GCC. gas/testsuite/ 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp, fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp. * gas/i386/intel.d: Updated. * gas/i386/intel.e: Likewise. opcodes/ 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to ATTSyntax. * i386-opc.h (IntelMnemonic): Renamed to .. (ATTSyntax): This (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax and intelsyntax. * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. * i386-tbl.h: Regenerated.
2008-01-042008-01-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu6-6/+15
* i386-gen.c: Update copyright to 2008. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-04gas/testsuite/H.J. Lu3-24/+30
2008-01-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rexw.d: New. * gas/i386/rexw.s: Likewise. * gas/i386/x86-64-sse4_1-intel.d: Updated. * gas/i386/x86-64-sse4_1.d: Likewise. opcodes/ 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, pextrb, pextrw, pinsrb, pinsrw and pmovmskb. * i386-tbl.h: Regenerated.
2008-01-04gas/H.J. Lu6-1521/+1530
2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (cpu_arch_flags_not): Removed. (cpu_flags_not): Likewise. (cpu_flags_match): Updated to check 64bit and arch. (set_code_flag): Remove cpu_arch_flags_not. (set_16bit_gcc_code_flag): Likewise. (set_cpu_arch): Likewise. (md_begin): Likewise. (parse_insn): Call cpu_flags_match to check 64bit and arch. (match_template): Likewise. gas/testsuite/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-9.d: New file. * gas/i386/arch-9.s: Likewise. * gas/i386/i386.exp: Run arch-9. opcodes/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and CpuSSE4_2_Or_ABM. (cpu_flags): Likewise. * i386-opc.h (CpuSSE4_1_Or_5): Removed. (CpuSSE4_2_Or_ABM): Likewise. (CpuLM): Updated. (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 and CpuPadLock, respectively. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-03gas/H.J. Lu4-1889/+1894
2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Use the xmmword field instead of no_xsuf. opcodes/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove No_xSuf. * i386-opc.h (No_xSuf): Removed. (CheckSize): Updated. * i386-tbl.h: Regenerated.
2008-01-03gas/testsuite/H.J. Lu6-1475/+1495
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-5.d: New file. * gas/i386/arch-5.s: Likewise. * gas/i386/arch-6.d: Likewise. * gas/i386/arch-6.s: Likewise. * gas/i386/arch-7.d: Likewise. * gas/i386/arch-7.s: Likewise. * gas/i386/arch-8.d: Likewise. * gas/i386/arch-8.s: Likewise. * gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and CPU_SSE5_FLAGS. (cpu_flags): Add CpuSSE4_2_Or_ABM. * i386-opc.h (CpuSSE4_2_Or_ABM): New. (CpuLM): Updated. (i386_cpu_flags): Add cpusse4_2_or_abm. * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of CpuABM|CpuSSE4_2 on popcnt. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-03Add a missing ','.H.J. Lu1-1/+1
2008-01-03gas/testsuite/H.J. Lu2-8/+12
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add tests for movq. * gas/i386/x86_64.s: Likewise. * gas/i386/i386.d Updated. * gas/i386/x86_64.d: Likewise. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h: Update comments.
2008-01-03Fix a typo.H.J. Lu1-1/+1
2008-01-022008-01-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-13/+20
* i386-gen.c (opcode_modifiers): Use Qword instead of QWord. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise.
2008-01-02gas/H.J. Lu5-1982/+2031
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX. Check memory size in Intel mode. (process_suffix): Handle XMMWORD_MNEM_SUFFIX. (intel_e09): Likewise. * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New. gas/testsuite/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * gas/i386/intel.s: Use QWORD on movq instead of DWORD. * gas/i386/inval.s: Add tests for movq. * gas/i386/x86-64-inval.s: Likewise. * gas/i386/inval.l: Updated. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, Byte, Word, Dword, QWord and Xmmword. * i386-opc.h (No_xSuf): New. (CheckSize): Likewise. (Byte): Likewise. (Word): Likewise. (Dword): Likewise. (QWord): Likewise. (Xmmword): Likewise. (FWait): Updated. (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, Dword, QWord and Xmmword. * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is used. * i386-tbl.h: Regenerated.
generated by cgit v1.1 at 2024-12-03 04:17:16 +0000