Age | Commit message (Collapse) | Author | Files | Lines |
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gas/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (arch_entry): Add negated bit to
disambiguate flag names starting with "no".
(cpu_arch): Add negated bit definitions. Add
".nop" CPU extension.
(i386_align_code): Use new .cpunop bit to decide
when to generate alignment using nops.
(set_cpu_arch): Use negated bit instead to decide
when to use cpu_flags or vs. cpu_flags_and_not.
(md_parse_option): Likewise.
gas/testsuite/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* gas/i386/arch-10-1.l: Add nopl instruction.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10.d: Add nopl instruction, and +nopl extension
flag to as flags.
* gas/i386/nops-5-i686.d: Change alignment code generated for
-mtune=i686.
* gas/i386/nops-5.d: Change alignment code generated for
.arch i686.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
opcodes/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
to processor flags for PENTIUMPRO processors and later.
* i386-opc.h (enum): Add CpuNop.
(i386_cpu_flags): Add cpunop bit.
* i386-opc.tbl: Change nop cpu_flags.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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2010-08-06 Quentin Neill <quentin.neill@amd.com>
* i386-opc.h (enum): Fix typos in comments.
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(disassemble_init_for_target <ARCH_m32c>): Comment on endian.
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2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
* i386-tbl.h: Regenerated.
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gas/testsuite/
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run arch-4.
* gas/i386/arch-4.d: New.
* gas/i386/arch-4.s: Likewise.
* gas/i386/intel.d: Replace ud2a/ud2b with ud2/ud1.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
opcodes/
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
* i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
* i386-tbl.h: Regenerated.
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* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
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2010-07-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c: Add 0F to VEX opcode enums.
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(rx_decode_opcode): Likewise.
* rx-decode.c: Regenerate.
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gas/testsuite
* gas/arm/barrier.s: New file.
* gas/arm/barrier.d: New file.
* gas/arm/barrier-thumb.s: New file.
* gas/arm/barrier-thumb.d: New file.
* gas/arm/barrier-bad.s: New file.
* gas/arm/barrier-bad.d: New file.
* gas/arm/barrier-bad.l: New file.
* gas/arm/barrier-bad-thumb.s: New file.
* gas/arm/barrier-bad-thumb.d: New file.
* gas/arm/barrier-bad-thumb.l: New file.
gas/config
* tc-arm.c (OP_oBARRIER): Remove.
(OP_oBARRIER_I15): Add.
(po_barrier_or_imm): Add macro.
(parse_operands): Improve OP_oBARRIER_I15 operand parsing.
(do_barrier): Check correct immediate range.
(do_t_barrier): Likewise.
(barrier_opt_names): Add entries for more symbolic operands.
(insns): Replace OP_oBARRIER with OP_oBARRIER_I15 for barriers.
opcodes/
* arm-dis.c (print_insn_arm): Add cases for printing more
symbolic operands.
(print_insn_thumb32): Likewise.
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determination.
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* config/tc-mips.c (nops_for_insn_or_target): Replace
MIPS16_INSN_BRANCH with MIPS16_INSN_UNCOND_BRANCH and
MIPS16_INSN_COND_BRANCH.
include/opcode/
* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
(MIPS16_INSN_BRANCH): Rename to...
(MIPS16_INSN_COND_BRANCH): ... this.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Remove branch instruction
type and delay slot determination.
(print_insn_mips16): Extend branch instruction type and delay
slot determination to cover all instructions.
* mips16-opc.c (BR): Remove macro.
(UBR, CBR): New macros.
(mips16_opcodes): Update branch annotation for "b", "beqz",
"bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
and "jrc".
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gas/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/rdrnd.s: Replace rdrnd with rdrand.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
opcodes/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (mod_table): Replace rdrnd with rdrand.
* i386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
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2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (CpuFSGSBase): Fix a typo in comments.
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* config/tc-ppc.c (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t
before inverting.
binutils/:
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
ppc_cpu_t before inverting.
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* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
Renumber other PPC_OPCODE defines.
gas/
* config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags.
(ppc_setup_opcodes): Likewise. Simplify opcode selection.
opcodes/
* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
(PPC64, MFDEC2): Update.
(NON32, NO371): Define.
(powerpc_opcode): Update to not use old opcode flags, and avoid
-m601 duplicates.
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* m32c-ibld.c: Regenerate.
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(PPCPWR2): Add PPC_OPCODE_COMMON.
(powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
"fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
"rac" from -mcom.
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gas/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd
and .f16c.
* doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c.
gas/testsuite/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/arch-10.s: Add xsaveopt.
* gas/i386/x86-64-arch-2.s: Likwise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/f16c-intel.d: New.
* gas/i386/f16c.d: Likewise.
* gas/i386/f16c.s: Likewise.
* gas/i386/fsgs-intel.d: Likewise.
* gas/i386/fsgs.d: Likewise.
* gas/i386/fsgs.s: Likewise.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/rdrnd.s: Likewise.
* gas/i386/x86-64-f16c-intel.d: Likewise.
* gas/i386/x86-64-f16c.d: Likewise.
* gas/i386/x86-64-f16c.s: Likewise.
* gas/i386/x86-64-fsgs-intel.d: Likewise.
* gas/i386/x86-64-fsgs.d: Likewise.
* gas/i386/x86-64-fsgs.s: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
* gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel,
rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs,
x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel.
* gas/i386/x86-64-xsave.s: Add tests for xsaveopt64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (PREFIX_0FAE_REG_0): New.
(PREFIX_0FAE_REG_1): Likewise.
(PREFIX_0FAE_REG_2): Likewise.
(PREFIX_0FAE_REG_3): Likewise.
(PREFIX_VEX_3813): Likewise.
(PREFIX_VEX_3A1D): Likewise.
(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
PREFIX_VEX_3A1D.
(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
cpuf16c.
* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
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and mtocrf on EFS.
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* cpu/mep.opc (mep_examine_ivc2_insns): Delete set but unused var.
opcodes/
* mep-dis.c: Regenerate.
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(parse_address_main): Fix Neon load/store alignment parsing.
* gas/testsuite/gas/arm/neon-ldst-align-bad.l: Update for Neon alignment syntax fix.
* gas/testsuite/gas/arm/neon-ldst-align-bad.s: Likewise.
* gas/testsuite/gas/arm/neon-ldst-es.d: Likewise.
* gas/testsuite/gas/arm/neon-ldst-es.s: Likewise.
* opcodes/arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
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* m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
* gas/m68k/p11673.s: New test.
* gas/m68k/all.exp: Run the new test.
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PR binutils/11676
* m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
2010-06-16 Nick Clifton <nickc@redhat.com>
PR binutils/11676
* gas/m68k/pr11676.s: New test.
* gas/m68k/pr11676.d: Expected disassembly.
* gas/m68k/all.exp: Run the new test.
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* config/tc-ppc.c (md_assemble): Emit APUinfo section for
PPC_OPCODE_E500.
gas/testsuite/
* gas/ppc/e500.s: Add eieio, mbar and lwsync
* gas/ppc/e500.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_E500): Define.
opcodes/
* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
* ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
touch floating point regs and are enabled by COM, PPC or PPCCOM.
Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
Treat lwsync as msync on e500.
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of movs.
* gas/testsuite/gas/arm/thumb.d: Likewise.
* gas/testsuite/gas/arm/thumb.s: Likewise.
* gas/testsuite/gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly.
* gas/testsuite/gas/arm/thumb2_it_auto.d: Liekwise.
* gas/testsuite/gas/arm/thumb32.d: Likewise.
* ld/testsuite/ld-arm/arm-call.d: Handle change in lsls/movs disassembly.
* ld/testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-m.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* ld/testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d: Likewise.
* ld/testsuite/ld-arm/thumb2-bl-bad.d: Likewise.
* opcodes/arm-dis.c (thumb-opcodes): Add disassembly for movs.
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constants is the same on 32-bit and 64-bit hosts.
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.short directives so that they can be reassembled.
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David Ung <davidu@mips.com>
* mips-opc.c: Change membership to I1 for instructions ssnop and
ehb.
2010-05-26 Catherine Moore <clm@codesoucery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* gas/mips/set-arch.d: Expect ehb.
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2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (sib): New.
(get_sib): Likewise.
(print_insn): Call get_sib.
OP_E_memory): Use sib.
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* config/tc-mips.c (is_opcode_valid): Remove expansionp.
(macro_build): Change invocation of is_opcode_valid.
(mips_ip): Likewise.
gas/testsuite/
* gas/mips/mips-no-jalx.l: Delete.
* gas/mips/mips-no-jalx.s: Delete.
* gas/mips/mips-jalx-2.d: New.
* gas/mips/mips-jalx-2.s: New.
* gas/mips/mips.exp (mips-jalx-2): Run new test.
(mips-no-jalx): Remove deleted test.
include/
* opcode/mips.h (INSN_MIPS16): Remove.
opcodes/
* mips-dis.c (mips_arch): Remove INSN_MIPS16.
* mips-opc.c (I16): Remove.
(mips_builtin_op): Reclassify jalx.
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divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
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gas/
* config/tc-arm.c (aeabi_set_public_attributes): Set Tag_DIV_use.
gas/testsuite/
* gas/arm/attr-cpu-directive.d: Add Tag_DIV_use.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-marvell-f.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/eabi_attr_1.d: Likewise.
ld/testsuite/
* ld-arm/attr-merge-2.attr: Add Tag_DIV_use.
* ld-arm/attr-merge-2a.s: Likewise.
* ld-arm/attr-merge-2b.s: Likewise.
* ld-arm/attr-merge-3a.s: Likewise.
* ld-arm/attr-merge-3b.s: Likewise.
* ld-arm/attr-merge-4.attr: Likewise.
* ld-arm/attr-merge-5.attr: Likewise.
* ld-arm/attr-merge-6.attr: Likewise.
* ld-arm/attr-merge-7.attr: Likewise.
* ld-arm/attr-merge-arch-1.attr: Likewise.
* ld-arm/attr-merge-arch-2.attr: Likewise.
* ld-arm/attr-merge-unknown-2.d: Likewise.
* ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld-arm/attr-merge-unknown-3.d: Likewise.
* ld-arm/attr-merge-vfp-1.d: Likewise.
* ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld-arm/attr-merge-vfp-2.d: Likewise.
* ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld-arm/attr-merge-vfp-3.d: Likewise.
* ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld-arm/attr-merge-vfp-4.d: Likewise.
* ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld-arm/attr-merge-vfp-5.d: Likewise.
* ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-00.d: Likewise.
* ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-02.d: Likewise.
* ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-04.d: Likewise.
* ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-20.d: Likewise.
* ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-22.d: Likewise.
* ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-40.d: Likewise.
* ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld-arm/attr-merge-wchar-44.d: Likewise.
* ld-arm/attr-merge.attr: Likewise.
2010-04-07 Jie Zhang <jie@codesourcery.com>
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Set
Tag_ABI_HardFP_use to 1 if a single precision FPU is selected.
gas/testsuite/
* gas/arm/attr-mfpu-vfpxd.d: New test.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Merge
Tag_ABI_HardFP_use correctly.
ld/testsuite/
* ld-arm/attr-merge-vfp-6.d: New test.
* ld-arm/attr-merge-vfp-6r.d: New test.
* ld-arm/attr-merge-vfpv3xd.s: New test.
* ld-arm/arm-elf.exp: Add attr-merge-vfp-6 and attr-merge-vfp-6r.
2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
format.
(print_insn_thumb16): Add support for new %W format.
* gas/arm/thumb32.d: Fix expected disassembly of ldmia
instruction.
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2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
bfd/doc/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
binutils/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
* doc/Makefile.in: Ditto.
gas/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
* doc/Makefile.in: Ditto.
gprof/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
ld/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
opcodes/
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
* aclocal.m4: Ditto.
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Updated Bulgarian translation.
Updated Finnish translations.
Updated French translations.
Updated Vietnamese translations.
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2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
bits in opcode.
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2010-04-09 Nick Clifton <nickc@redhat.com>
* aoutx.h (aout_link_input_bfd): Remove unused variable sym_count.
* elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Remove unused
variables htab and hdr_info and mark info parameter as unused.
* elf.c (prep_headers): Remove unused variable i_phdrp.
(_bfd_elf_write_object_contents): Remove unused variable i_ehdrp.
* elf32-i386.c (elf_i386_relocate_section): Mark variabled warned
as unused.
* peXXigen.c (pe_print_reloc): Remove unused variable datasize.
* verilog.c (verilog_write_section): Remove unused variable
address.
binutils/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* dwarf.c (process_debug_info): Remove unused variable
cu_abbrev_offset_ptr.
(display_debug_lines_decoded): Remove unused variable prev_line.
* elfedit.c (process_archive): Remove unused variable
file_name_size.
* ieee.c (ieee_start_compilation_unit): Remove unused variable
nindx.
(ieee_set_type): Remove unused variables info, targetindx and
baseindx.
* objdump.c (disassmble_byte): Remove unused variable done_dot.
* rddbg.c (read_section_stabs_debugging_info): Remove unused
variable other.
* readelf.c (dump_section_as_strings): Remove unused variable
addr.
(process_archive): Remove unused variable file_name_size.
* stabs.c (parse_stab_string): Mark desc parameter as unused.
Remove unused variable lineno.
(parse_stab_struct_type): Remove unused variable orig.
(stab_demangle_type): Remove unused variables constp, volatilep
and hold.
gas/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* as.c (create_obj_attrs_section): Remove unused variable addr.
* listing.c (listing_listing): Remove unused variable message.
* read.c: Remove unnecessary register type qualifiers.
(s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is
defined.
ld/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* ldlang.c (wild_sort): Remove unused variable section_name.
opcodes/ChangeLog
2010-04-09 Nick Clifton <nickc@redhat.com>
* i386-dis.c (print_insn): Remove unused variable op.
(OP_sI): Remove unused variable mask.
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* ppc-opc.c (RBOPT): New define.
("dccci"): Enable for PPCA2. Make operands optional.
("iccci"): Likewise. Do not deprecate for PPC476.
gas/testsuite/
* gas/ppc/476.d ("dccci", "dci", "iccci"): Add tests.
* gas/ppc/476.s: Likewise.
* gas/ppc/a2.d ("dccci", "dci", "iccci", "ici"): Add tests.
* gas/ppc/a2.s: Likewise.
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* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
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