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2009-10-24 cpu/Doug Evans17-502/+24
* m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. cgen-ops.h -> cgen/basic-ops.h. include/opcode/ * cgen-bitset.h: Delete, moved to ../cgen/bitset.h. * cgen.h: Update. Improve multi-inclusion macro name. include/cgen/ * basic-modes.h: New file. Moved here from opcodes/cgen-types.h. * basic-ops.h: New file. Moved here from opcodes/cgen-ops.h. * bitset.h: New file. Moved here from ../opcode/cgen-bitset.h. Update license to GPL v3. opcodes/ * cgen-ops.h: Delete, moved to ../include/cgen/basic-ops.h. * cgen-types.h: Delete, moved to ../include/cgen/basic-modes.h. * cgen-bitset.c: Update. * fr30-desc.h: Regenerate. * frv-desc.h: Regenerate. * ip2k-desc.h: Regenerate. * iq2000-desc.h: Regenerate. * lm32-desc.h: Regenerate. * m32c-desc.h: Regenerate. * m32c-opc.h: Regenerate. * m32r-desc.h: Regenerate. * mep-desc.h: Regenerate. * mt-desc.h: Regenerate. * openrisc-desc.h: Regenerate. * xc16x-desc.h: Regenerate. * xstormy16-desc.h: Regenerate.
2009-10-23* rx-decode.opc (decode_opcode): Fix flags for MUL, SUNTIL, and SWHILE.DJ Delorie3-619/+624
* rx-decode.c: Regenerated.
2009-10-20gas/H.J. Lu2-34/+114
2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * doc/c-i386.texi: Mention movabs. gas/testsuite/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * gas/i386/immed64.d: Updated. * gas/i386/l1om.d: Likewise. * gas/i386/x86-64-disp-intel.d: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/x86_64.d: Likewise. opcodes/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * i386-dis.c: Document LB, LS and LV macros. (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction with the 64-bit displacement or immediate operand. (putop): Handle LB, LS and LV macros.
2009-10-19 * lm32-opinst.c: Regenerate.Doug Evans7-69/+74
* m32c-desc.c: Regenerate. * m32r-opinst.c: Regenerate. * openrisc-ibld.c: Regenerate. * xc16x-desc.c: Regenerate. * xc16x-desc.h: Regenerate.
2009-10-17 * Makefile.am (CGEN_CPUS): Add iq2000, lm32.Doug Evans3-64/+75
(FR30_DEPS, FRV_DEPS, IQ2000_DEPS): Move so all cgen *_DEPS are sorted alphabetically. (stamp-fr30, stamp-frv, stamp-iq2000, stamp-xc16x): Move so all cgen stamp-* rules are sorted alphabetically. * Makefile.in: Regenerate.
2009-10-162009-10-16 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-301/+313
* i386-opc.h: Use enum instead of nested macros.
2009-10-162009-10-16 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-795/+799
* i386-dis.c: Simplify enums.
2009-10-152009-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-843/+878
Ineiev <ineiev@gmail.com> PR binutils/10767 * i386-dis.c: Use enum instead of nested macros.
2009-10-152009-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+4
* i386-dis.c (MAX_BYTEMODE): Removed.
2009-10-14 PR 969Alan Modra2-2/+7
* m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
2009-10-132009-10-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-5/+11
* i386-dis.c (print_insn): Always clear need_vex, need_vex_reg and vex_w_done.
2009-10-07* opcodes/microblaze-dis.c: Add include for microblaze-dis.h,Michael Eager3-6/+42
eliminate local extern decls. * opcodes/microblaze-dis.h: New.
2009-10-06Updated Finnish translationNick Clifton2-164/+247
2009-10-05 * opc2c.c: Include "libiberty.h" and <errno.h>.Nick Clifton5-630/+656
(orig_filename): Constify. (dump_lines): Fix line number directive. (main): Set orig_filename to basename of input file. Use xstrerror. * Makefile.am (rx-dis.lo): Remove explicit dependencies. ($(srcdir)/rx-decode.c): Use @MAINT@. Use $(EXEEXT_FOR_BUILD) instead of $(EXEEXT). (opc2c$(EXEEXT_FOR_BUILD)): Renamed from opc2c$(EXEEXT) and use $(LINK_FOR_BUILD). Link with libiberty. (MOSTLYCLEANFILES): Add opc2c$(EXEEXT_FOR_BUILD). (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c. * Makefile.in: Regenerated. * rx-decode.c: Regenerated.
2009-10-03Revert the last change.H.J. Lu3-21/+10
2009-10-032009-10-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu3-10/+21
* Makefile.am ($(srcdir)/rx-decode.c): Add @MAINT@. (rx-dis.lo): Remove a space. (pc2c$(EXEEXT)): Remove a space. Use $(LINK_FOR_BUILD) instead of gcc. (MAINTAINERCLEANFILES): Add $(srcdir)/rx-decode.c. * Makefile.in: Regenerated.
2009-10-03 * arm-dis.c (print_insn): Check symtab_size not *symtab.Alan Modra2-2/+5
2009-10-022009-10-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu3-76/+81
* i386-opc.tbl: Drop Disp64 on jump and loop instructions. * i386-tbl.h: Regenerated.
2009-10-02typo fixAlan Modra1-17/+17
2009-10-02gas/Peter Bergner3-84/+103
* config/tc-ppc.c (md_show_usage): Document -m476. * doc/c-ppc.texi (PowerPC-Opts): Document -m476. gas/testsuite/ * gas/ppc/476.s: New test. * gas/ppc/476.d: Likewise. * gas/ppc/ppc.exp: Run the 476 test. include/opcode/ * ppc.h (PPC_OPCODE_476): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "476" entry. * ppc-opc.c (PPC476): Define. (powerpc_opcodes): Update mnemonics where required for 476.
2009-10-01gas/Peter Bergner3-3/+9
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2". * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/a2.d: Rename "ppca2" to "a2". include/opcode/ * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2. opcodes/ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2. * ppc-dis.c (ppc_opts): Likewise. Rename "ppca2" to "a2".
2009-10-012009-10-01 M R Swami Reddy <MR.Swami.Reddy@nsc.com>M R Swami Reddy2-1/+5
* crx-dis.c (match_opcode): Truncate mcode to 32-bit.
2009-09-29bfdNick Clifton10-0/+16842
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29opcodes/Peter Bergner2-12/+5
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes. gas/testsuite/ * gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux", "stxvw4ux"): Remove tests. * gas/ppc/vsx.d: Likewise. * gas/ppc/power7.s: Likewise. * gas/ppc/power7.d: Likewise.
2009-09-252009-09-25 Michael Eager <eager@eagercon.com>Michael Eager2-18/+15
* microblaze-dis.c (get_insn_microblaze, microblaze_get_target_address, microblaze_decode_insn): Add declarations. (get_delay_slots_microblaze): Remove.
2009-09-25 Update soruces to make alpha, arc and arm targets compile cleanlyNick Clifton4-7/+16
with -Wc++-compat: * config/tc-alpha.c: Add casts. (extended_bfd_reloc_code_real_type): New type. Used to avoid enumeration conversion warnings. (struct alpha_fixup, void assemble_insn, assemble_insn) (assemble_tokens): Use new type. * ecoff.c: Add casts. (mark_stabs): Use enumeration names. * config/obj-elf.c: Add cast * config/tc-arc.c: Add casts. * config/obj-aout.h (text_section,data_section,bss_section): Make extern. * config/obj-elf.c: Add cast. * config/tc-arm.c: Add casts. (X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE) (cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the need for keywords as arguments. * ecoff.c: Add casts. * ecofflink.c: Add casts. * elf64-alpha.c: Add casts. (struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move to top level. (SKIP_HOWTO): Use enum name. * elf32-arm.c: Add casts. (elf32_arm_vxworks_bed): Update code to avoid multiple declarations. (struct map_stub): Move to top level. * arc-dis.c Fix casts. * arc-ext.c: Add casts. * arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous enum. * emultempl/armelf.em: Add casts.
2009-09-24gas/H.J. Lu5-3394/+3429
2009-09-24 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_vex_prefix): Check vex == 2 instead of vex256. opcodes/ 2009-09-24 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove Vex256. (set_bitfield): Handle XXX=V. * i386-opc.h (Vex): Update comments. (Vex256): Removed. (VexNDS): Updated. (i386_opcode_modifier): Change vex to 2 bits. Remove vex256. * i386-opc.tbl: Replace "Vex|Vex256" with Vex=2. * i386-tbl.h: Regenerated.
2009-09-23Updated French and Vietnamese translations.Nick Clifton2-125/+208
2009-09-21gas/Ben Elliston3-85/+143
* config/tc-ppc.c (md_show_usage): Document -mpcca2. * doc/c-ppc.texi (PowerPC-Opts): Document -mppca2. gas/testsuite/ * gas/ppc/a2.s: New. * gas/ppc/a2.d: Likewise. * gas/ppc/ppc.exp: Run the a2 dump test. include/opcode/ * ppc.h (PPC_OPCODE_PPCA2): New. opcodes/ * ppc-dis.c (ppc_opts): Add "ppca2" entry. * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx., eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx, icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx., ici mnemonics. (ERAT_T): New operand. (XWC_MASK): New mask. (XOPL2): New macro. (PPCA2): Define.
2009-09-18Updated Spanish and Vietnamese translationsNick Clifton3-259/+421
2009-09-152009-09-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+6
* i386-dis.c (OP_E_memory): Don't print '-' in Intel mode if disp == -disp.
2009-09-14Updated German, Dutch and Finnish translations.Nick Clifton2-124/+212
2009-09-11 * po/bfd.pot: Updated by the Translation project.Nick Clifton2-1/+20
* po/binutils.pot: Updated by the Translation project. * po/gold.pot: Updated by the Translation project. * po/gold.pot: Updated by the Translation project. * po/gprof.pot: Updated by the Translation project. * po/sv.po: Updated Swedish translation. * po/ld.pot: Updated by the Translation project. * po/fi.po: Updated Finnish translation. * po/ld.pot: Updated by the Translation project. * po/fi.po: Updated Finnish translation. Updated sources to compile cleanly with -Wc++-compat: * basic_blocks.c: Add casts. * cg_dfn.c: Add cast. * corefile.c: Add casts. * gmon_io.c: Add casts. * hist.c: Add cast. * source.c: Add cast. * sym_ids.c (struct match): Moved to top level. Updated soruces in ld/* to compile cleanly with -Wc++-compat: * ld.h (enum endian_enum,enum symbolic_enum,enum dynamic_list_enum): Move to top level. * ldcref.c: Add casts. * ldctor.c: Add casts. * ldexp.c * ldexp.h (enum node_tree_enum,enum phase_enum): Move to top level. * ldlang.c: Add casts. (lang_insert_orphan): Use enum name instead of integer. * ldlang.h (enum statement_enum): Move to top level. * ldmain.c: Add casts. * ldwrite.c: Add casts. * lexsup.c: Add casts. (enum control_enum): Move to top level. * mri.c: Add casts. (mri_draw_tree): Use enum name instead of integer. Updated sources to compile cleanly with -Wc++-compat: * basic_blocks.c: Add casts. * cg_dfn.c: Add cast. * corefile.c: Add casts. * gmon_io.c: Add casts. * hist.c: Add cast. * source.c: Add cast. * sym_ids.c (struct match): Moved to top level. * as.c (main): Call dwarf2_init. * config/obj-elf.c (struct group_list): New field. (build_group_lists): Use hash lookup. (free_section_idx): New function. (elf_frob_file): Adjust. * dwarf2dbg.c (all_segs_hash, last_seg_ptr): New variables. (get_line_subseg): Adjust. (dwarf2_init): New function. * dwarf2dbg.h (dwarf2_init): New declaration.
2009-09-102009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-2/+6
* s390-dis.c (print_insn_s390): Avoid 'long long'.
2009-09-102009-09-10 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2-5/+11
* s390-dis.c (s390_extract_operand): Remove the shift for pcrel operands. (print_insn_s390): Signextend and shift pcrel operands before printing.
2009-09-092009-09-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+7
* i386-dis.c (vex_len_table): Change VEX_LEN_AE_R_X_M0 to VEX_LEN_AE_R_X_M_0 in comments.
2009-09-08* cpu/mep.opc (mep_cgen_insn_supported_asm): Change the test to aDJ Delorie2-1/+5
preprocessor macro, not an enum.
2009-09-08* z8kgen.c (struct op): Replace unused flavor with id.Andreas Schwab3-21/+37
(opt): Remove extra xorb entry. (func): Use id field as fallback. (sub): Return new string, caller changed. (internal): Allocate end marker. Assign unique id before sorting. (gas): Likewise. Fix loop end condition. * z8k-opc.h: Regenerate.
2009-09-08 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.Alan Modra2-2/+6
2009-09-07 * z8kgen.c (func): Fix thinko last patch.Alan Modra2-1/+5
2009-09-07 * z8kgen.c (func): Stabilize qsort of identically named entries.Alan Modra3-12/+22
* z8k-opc.h: Regenerate.
2009-09-07bfdTristan Gingold2-122/+202
2009-09-07 Tristan Gingold <gingold@adacore.com> * po/SRC-POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. binutils 2009-09-07 Tristan Gingold <gingold@adacore.com> * po/binutils.pot: Regenerate. gas 2009-09-07 Tristan Gingold <gingold@adacore.com> * po/POTFILES.in: Regenerate. * po/gas.pot: Regenerate. gprof 2009-09-07 Tristan Gingold <gingold@adacore.com> * po/gprof.pot: Regenerate. ld 2009-09-07 Tristan Gingold <gingold@adacore.com> * po/ld.pot: Regenerate. opcodes 2009-09-07 Tristan Gingold <gingold@adacore.com> * po/opcodes.pot: Regenerate.
2009-09-07 * configure.in (BUILD_LIBS, BUILD_LIB_DEPS): Define and subst.Alan Modra5-39/+73
* configure: Regenerate. * Makefile.am (LIBIBERTY, BUILD_LIBIBERTY, BUILD_LIBINTL): Delete. (BUILD_LIBS, BUILD_LIB_DEPS): Define. Use.. (i386-gen, ia64-gen, z8kgen): ..here. * Makefile.in: Regenerate.
2009-09-072009-09-07 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-8/+12
* z8k-opc.h: Regenerate.
2009-09-05 * bfd/coff-arm.c (coff_arm_relocate_section)Nick Clifton4-14/+21
(record_thumb_to_arm_glue, bfd_arm_process_before_allocation): Change member name class to symbol_class. * bfd/coff-i960.c (coff_i960_relocate_section) Rename variable class to class_val. Change member name class to symbol_class. * bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in) (_bfd_xcoff_swap_aux_out): Rename arguments class to in_class. * bfd/coff-stgo32.c (adjust_aux_in_post) (adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class to in_class. * bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in) (_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class. * bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class to n_sclass. * bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename variables named class to n_sclass. (coff_write_symbols): Rename variable class to sym_class. (bfd_coff_set_symbol_class): Rename argument class to symbol_class. * bfd/cofflink.c (_bfd_coff_link_hash_newfunc) (coff_link_add_symbols, _bfd_coff_link_input_bfd) (_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section): Update code to use renamed members. * bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename argument class to in_class. * bfd/libcoff-in.h (struct coff_link_hash_entry, struct coff_debug_merge_type) Renamed members class to symbol_class and type_class. * bfd/libcoff.h Regenerated. * bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out): Rename argument class to in_class. * bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use renamed members. * bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of member class to symbol_class. * binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class) (ieee_read_reference): Rename variables named class to cxxclass. * gas/config/tc-arc.c (struct syntax_classes): Rename member class to s_class. (arc_extinst): Rename variable class to s_class. Update code to use renamed members. * gas/config/tc-mips.c (insn_uses_reg): Rename argument class to regclass. * gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function) (ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label) (ppc_fix_adjustable, md_apply_fix): Update code to use renamed members. * gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update code to use renamed members. * gas/config/tc-score.c (s3_adjust_paritybit): Rename argument class to i_class. * gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument class to i_class. * gprof/corefile.c (core_create_function_syms): Rename variable class to cxxclass. * include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name of class variable to in_class to match changes in function that use this macro. * include/opcode/ia64.h (struct ia64_operand): Renamed member class to op_class * ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols) (gld${EMULATION_NAME}_try_needed): Rename variable class to link_class * opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed member. * opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class. * opcodes/tic80-opc.c (tic80_symbol_to_value) (tic80_value_to_symbol): Rename argument class to symbol_class.
2009-09-04 gas/Jie Zhang2-6/+13
* config/bfin-parse.y (asm_1): Implement HLT instruction. Fix comments for DBGA, DBGAH and DBGAL. * config/tc-bfin.c (bfin_gen_pseudodbg_assert): Change according to the new encoding of DBGA, DBGAH, and DBGAL. include/ * opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp. (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define. (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask): Adjust accordingly. (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and PseudoDbg_Assert_grp_mask. opcodes/ * bfin-dis.c (decode_pseudodbg_assert_0): Change according to the new encoding of DBGA, DBGAH, and DBGAL. (_print_insn_bfin): Likewise.
2009-09-03 gas/Jie Zhang2-8/+10
* config/bfin-parse.y: Remove trailing whitespace. (ccstat): Indent. * config/tc-bfin.c (struct bfin_reg_entry): Remove. (bfin_reg_info[]): Remove. opcodes/ * bfin-dis.c (_print_insn_bfin): Don't declare. (print_insn_bfin): Don't declare. (dregs_pair): Remove. (ignore_bits): Remove. (ccstat): Remove.
2009-09-03 gas/Jie Zhang2-1/+33
* config/bfin-defs.h (IS_GENREG): Define. (IS_DAGREG): Define. (IS_SYSREG): Define. * config/bfin-parse.y (asm_1): Check illegal register move instructions. gas/testsuite/ * gas/bfin/expected_move_errors.s, gas/bfin/expected_move_errors.l: Add "LC1 = I0;". * gas/bfin/move.s, gas/bfin/move.d: Remove "CYCLES = A0.W". opcodes/ * bfin-dis.c (IS_DREG): Define. (IS_PREG): Define. (IS_AREG): Define. (IS_GENREG): Define. (IS_DAGREG): Define. (IS_SYSREG): Define. (decode_REGMV_0): Check illegal register move instructions.
2009-09-03 * Makefile.am (BUILD_LIBINTL): New variable.Dave Korn3-12/+24
(i386-gen$(EXEEXT_FOR_BUILD)): Use it. (ia64-gen$(EXEEXT_FOR_BUILD)): And here. (z8kgen$(EXEEXT_FOR_BUILD)): And here. * Makefile.in: Regenerate.
2009-09-02update copyright datesAlan Modra67-67/+78
generated by cgit v1.1 at 2024-12-23 05:35:12 +0000