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2015-01-02ChangeLog rotatation and copyright year updateAlan Modra265-1150/+1168
2014-12-27Limit moxie sto/ldo offsets to 16 bitsAnthony Green3-16/+22
2014-12-24Add mul.x and umul.x instructions to moxie portAnthony Green2-9/+14
2014-12-16Add in a JALRC alias and fix the NAL instruction.Matthew Fortune2-1/+7
2014-12-12Add zex instructions for moxie portAnthony Green2-2/+6
2014-12-06Add Visium support to opcodesEric Botcazou9-0/+886
2014-11-30Power4 should treat mftb as extended mfspr mnemonicAlan Modra2-6/+11
2014-11-28Remove broken nios2 assembler dwim support.Sandra Loosemore2-4/+9
2014-11-28Don't deprecate powerpc mftb insnAlan Modra2-7/+15
2014-11-24Update libtool.m4 from GCC trunkH.J. Lu2-2/+6
2014-11-17Add AVX512VBMI instructionsIlya Tocar8-5445/+5730
2014-11-17Add AVX512IFMA instructionsIlya Tocar8-5512/+5677
2014-11-17Add pcommit instructionIlya Tocar7-5262/+10575
2014-11-17Add clwb instructionIlya Tocar7-5260/+5310
2014-11-06Add mach parameter to nios2_find_opcode_hash.Sandra Loosemore2-3/+9
2014-11-03Import updated translations supplied by the Translation Project.Nick Clifton2-146/+372
2014-10-31MIPS: Add Octeon 3 supportNaveen H.S3-3/+29
2014-10-29Updated/new translations provided by the Translations Project.Nick Clifton2-270/+1059
2014-10-23Refactoring/cleanup of nios2 opcodes and assembler code.Sandra Loosemore3-451/+580
2014-10-21ppc: enable msgclr and msgsnd on Power8Jan Beulich2-2/+6
2014-10-17opcodes, elf: annotate instructions with HWCAP2_VIS3B.Jose E. Marchesi2-12/+13
2014-10-17opcodes: fix several misplaced hwcap entries.Jose E. Marchesi2-13/+18
2014-10-15Bump bfd version.Tristan Gingold2-10/+14
2014-10-09This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi3-1441/+1507
2014-09-22Ignore MOD field for control/debug register moveH.J. Lu2-32/+19
2014-09-16NDS32/opcodes: Add audio ISA extension and modify the disassemble implemnt.Kuan-Lin Chen4-1842/+2327
2014-09-15Add support for MIPS R6.Andrew Bennett4-362/+786
2014-09-10Properly handle suffix for iret and sysretH.J. Lu2-21/+59
2014-09-03[PATCH/AArch64] Generic support for all system registers using mrs and msrJiong Wang3-101/+28
2014-09-03[PATCH/AArch64] Implement LSE featureJiong Wang10-223/+2033
2014-08-26MIPS: Make the CODE10 operand code consistent between ISAsMaciej W. Rozycki2-5/+11
2014-08-22ARM/opcodes: Fix negative hexadecimal offset disassemblyMaciej W. Rozycki2-0/+8
2014-08-21MIPS/opcodes: Remove microMIPS 48-bit LI instructionMaciej W. Rozycki2-4/+5
2014-08-19This patch set mainly aims at improving the S/390 disassembler'sAndreas Arnez2-134/+184
2014-08-14opcodes: blackfin: convert ad-hoc ints to bfd_booleanMike Frysinger2-21/+31
2014-08-14opcodes: blackfin: simplify decode_CC2stat_0 logicMike Frysinger2-41/+11
2014-08-14opcodes: blackfin: avoid duplicate memory readsMike Frysinger2-6/+10
2014-08-13opcodes: blackfin: push down global stateMike Frysinger2-43/+83
2014-08-13opcodes: blackfin: do not force align the PCMike Frysinger2-1/+14
2014-08-13opcodes: blackfin: handle memory read errorsMike Frysinger2-19/+45
2014-07-29[MIPS] Rename COPROC related macrosMatthew Fortune3-134/+142
2014-07-29[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensionsMatthew Fortune3-24/+34
2014-07-22Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar8-5910/+9526
2014-07-22Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar8-5277/+12632
2014-07-22Add support for AVX512VL versions of AVX512CD instructions.Ilya Tocar3-0/+214
2014-07-22Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar7-4322/+20266
2014-07-20or1k: add missing l.msync, l.psync and l.psync instructions.Stefan Kristiansson6-48/+95
2014-07-08Fix disasm of vmovsd/vmovss with different length values.Ilya Tocar2-2/+7
2014-07-04Rename configure.in to configure.acAlan Modra4-2/+8
2014-07-04Use modern AC_INIT in configure.inAlan Modra5-45/+41
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