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2014-05-01Handle prefixes before fwaitH.J. Lu2-1/+12
0x9b (fwait) is both an instruction and an opcode prefix. When 0x9b is treated as an instruction, we need to handle any prefixes before it. This patch handles it properly. gas/testsuite/ PR binutils/16891 * gas/i386/opcode.s: Add test for fwait with prefix. * gas/i386/opcode-intel.d: Updated. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. opcodes/ PR binutils/16891 * i386-dis.c (print_insn): Handle prefixes before fwait.
2014-04-26Regenerate files for openrisk -> or1k changeAlan Modra2-9/+9
bfd/ * po/SRC-POTFILES.in: Regenerate. * configure: Regenerate. gas/ * po/POTFILES.in: Regenerate. opcodes/ * po/POTFILES.in: Regenerate.
2014-04-23Add support for the MIPS eXtended Physical Address (XPA) ASE.Andrew Bennett3-4/+40
ChangeLog: binutils/ * doc/binutils.texi: Document the disassemble MIPS XPA instructions command line option. gas/ * config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA. (md_longopts): Add xpa and no-xpa command line options. (mips_ases): Add MIPS XPA ASE. (mips_cpu_info_table): Update p5600 entry to allow the XPA ASE. * doc/as.texinfo: Document the MIPS XPA command line options. * doc/c-mips.texi: Document the MIPS XPA command line options, and assembler directives. gas/testsuite/ * gas/mips/mips.exp: Add xpa tests. * gas/mips/xpa.s: New test. * gas/mips/xpa.d: Likewise. include/ * opcode/mips.h (ASE_XPA): New define. opcodes/ * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2 to allow the MIPS XPA ASE. (parse_mips_dis_option): Process the -Mxpa option. * mips-opc.c (XPA): New define. (mips_builtin_opcodes): Add MIPS XPA instructions and move the locations of the ctc0 and cfc0 instructions.
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson20-3851/+5200
with support for the new or1k configuration.
2014-04-04Add support for Intel SGX instructionsIlya Tocar7-3852/+3910
Add Intel SGX instructions support to assembler and disassembler. gas/ * config/tc-i386.c (cpu_arch): Add .se1. * doc/c-i386.texi: Document .se1/se1. gas/testsuite/ * gas/i386/i386.exp: Run SE1 tests. * gas/i386/se1.d: New file. * gas/i386/se1.s: Ditto. * gas/i386/x86-64-se1.d: Ditto. * gas/i386/x86-64-se1.s: Ditto. opcodes/ * i386-dis.c (rm_table): Add encls, enclu. * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS, (cpu_flags): Add CpuSE1. * i386-opc.h (enum): Add CpuSE1. (i386_cpu_flags): Add cpuse1. * i386-opc.tbl: Add encls, enclu. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2014-04-02Add new sign-extension instructions to moxie portAnthony Green2-2/+7
2014-03-26[AArch64 disassembler] Add missing checks of undefine encodings onYufeng Zhang2-3/+14
st1/st2/st3/st4 instructions. opcodes/ * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined instructions. binutils/testsuite/ * binutils-all/aarch64/aarch64.exp: New test driver for AArch64. * binutils-all/aarch64/unallocated-encoding.s: New testcase. * binutils-all/aarch64/unallocated-encoding.d: Ditto.
2014-03-20Fix memory size for gather/scatter instructionsIlya Tocar5-27/+60
For gathers with indices larger than elements (e. g.) vpgatherqd ymm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123] We currently treat memory size as a size of index register, while it is actually should be size of destination register: vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123] This patch fixes it. opcodes/ * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps, vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd, vscatterqps. * i386-tbl.h: Regenerate. gas/testsuite/ * gas/i386/avx512pf-intel.d: Change memory size for vgatherpf0qps, vgatherpf1qps, vscatterpf0qps, vscatterpf1qps. * gas/i386/avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/avx512f-intel.d: Change memory size for vgatherqps, vpgatherqd, vpscatterqd, vscatterqps. * gas/i386/avx512f.s: Ditto. * gas/i386/x86-64-avx512f-intel.d: Ditto. * gas/i386/x86-64-avx512f.s: Ditto.
2014-03-19This patch adds support for the hyperprivileged registers %hstick_offsetJose E. Marchesi2-1/+6
and %hstick_enable to the Sparc assembler. * config/tc-sparc.c (hpriv_reg_table): Added entries for %hstick_offset and %hstick_enable. * doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and %hstick_enable hyperprivileged registers. * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and %hstick_enable added. * gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable. * gas/sparc/rdhpr.d: Likewise. * gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable. * gas/sparc/wrhpr.d: Likewise.
2014-03-19Fix typo in changelog entry.Nick Clifton1-1/+1
2014-03-19Fix RX gas testsuite failures by accounting for new variations in the ↵Nick Clifton3-614/+627
disassembler's output. * rx-decode.opc (bwl): Allow for bogus instructions with a size field of 3. (sbwl, ubwl, SCALE): Likewise. * rx-decode.c: Regenerate. * gas/rx/mov.d: Update expected disassembly.
2014-03-12autoreconfAlan Modra2-1/+5
Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes. Regenerate gas/config.in.
2014-03-05Update copyright yearsAlan Modra263-394/+270
2014-03-04Fix changelog formatting in last commit -- sorryRichard Sandiford1-1/+1
2014-03-04bfd/Richard Sandiford2-1/+5
2014-02-04 Heiher <r@hev.cc> * elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for Loongson-3A. (mips_mach_extensions): Make bfd_mach_mips_loongson_3a an extension of bfd_mach_mipsisa64r2. opcodes/ 2014-02-04 Heiher <r@hev.cc> * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A. gas/ 2014-02-04 Heiher <r@hev.cc> * config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for Loongson-3A.
2014-03-04opcodes/Richard Sandiford2-66/+71
* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions so that they come after the Loongson extensions.
2014-03-03Fix various copyright issuesAlan Modra2-2/+5
binutils/ * README: Add "Copyright Notices" paragraph. gas/ * config/bfin-lex-wrapper.c: Correct copyright date. * config/tc-frv.c: Correct copyright punctuation. * config/tc-ip2k.c: Likewise. * config/tc-iq2000.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. ld/testsuite/ * ld-scripts/phdrs2.exp: Correct copyright punctuation. * ld-v850/v850.exp: Correct copyright typo. opcodes/ * i386-gen.c (process_copyright): Emit copyright notice on one line. gold/ * dwp.cc (print_version): Update copyright year to current.
2014-02-28Regenerate opcodes/msp430-decode.cAlan Modra2-157/+179
Cosmetic changes. * msp430-decode.c: Regenerate.
2014-02-27opcodes/Yufeng Zhang2-10/+15
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle. gas/testsuite/ * gas/aarch64/fp-const0-parsing.s: New test. * gas/aarch64/fp-const0-parsing.d: Likewise.
2014-02-27opcodes/Yufeng Zhang2-2/+10
* aarch64-opc.c (print_register_offset_address): Call get_int_reg_name to prepare the register name. gas/testsuite/ * gas/aarch64/ldst-reg-reg-offset.s: Add tests. * gas/aarch64/ldst-reg-reg-offset.d: Update.
2014-02-25Remove bogus vcvtps2ph variant.Ilya Tocar3-20/+6
We currently support version of vcvtps2ph with sae and only 1 register operand. This version is encoded as if missing operand was equal to ymm0. I didn't found any references to this variant in http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf This patch removes it. opcodes/ * i386-opc.tbl: Remove wrong variant of vcvtps2ph * i386-tbl.h: Regenerate.
2014-02-21Add support for CPUID PREFETCHWT1Ilya Tocar6-3854/+3880
Latest AVX512 spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF. This patch introduces CPUID PREFETCHWT1. gas/ * config/tc-i386.c (cpu_arch): Add .prefetchwt1. * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. * i386-init.h: Regenerate. * i386-opc.h (CpuPREFETCHWT1): New. (i386_cpu_flags): Add cpuprefetchwt1. * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1. * i386-tbl.h: Regenerate. gas/testsuite * gas/i386/avx512pf-intel.d: Remove prefetchwt1. * gas/i386/avx512pf.s: Ditto. * gas/i386/avx512pf.d: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf.d: Ditto. * gas/i386/prefetchwt1-intel.d: New file. * gas/i386/prefetchwt1.s: Ditto. * gas/i386/prefetchwt1.d: Ditto. * gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * gas/i386/x86-64-prefetchwt1.s: Ditto. * gas/i386/x86-64-prefetchwt1.d: Ditto.
2014-02-20Change cpu for vptestnmd and vptestnmq instructions.Ilya Tocar3-36/+41
In latest release of AVX512 spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Vptestnmq and vptestnmq instructions have CPUID AVX512F, not AVX512CD. This patch fixes it. opcodes/ * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD, to CpuAVX512F. * i386-tbl.h: Regenerate. gas/testsuite/ * gas/i386/avx512cd-intel.d: Remove vptestnmq, vptestnmd. * gas/i386/avx512cd.s: Ditto. * gas/i386/avx512cd.d: Ditto. * gas/i386/x86-64-avx512cd-intel.d: Ditto. * gas/i386/x86-64-avx512cd.s: Ditto. * gas/i386/x86-64-avx512cd.d: Ditto. * gas/i386/avx512f-intel.d: Add vptestnmq, vptestnmd. * gas/i386/avx512f.s: Ditto. * gas/i386/avx512f.d: Ditto. * gas/i386/x86-64-avx512f-intel.d: Ditto. * gas/i386/x86-64-avx512f.s: Ditto. * gas/i386/x86-64-avx512f.d: Ditto.
2014-02-19Don't output trailing spaceH.J. Lu4-41865/+41882
* i386-gen.c (output_cpu_flags): Don't output trailing space. (output_opcode_modifier): Likewise. (output_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2014-02-12Add clflushopt, xsaves, xsavec, xrstorsIlya Tocar7-3847/+4028
gas/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves. * doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/ clflushopt/.clfushopt. gas/testsuite/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * gas/i386/clflushopt-intel.d: New. * gas/i386/clflushopt.d: Ditto. * gas/i386/clflushopt.s: Ditto. * gas/i386/i386.exp: Run new tests. * gas/i386/x86-64-clflushopt-intel.d: New. * gas/i386/x86-64-clflushopt.d: Ditto. * gas/i386/x86-64-clflushopt.s: Ditto. * gas/i386/x86-64-xsavec-intel.d: Ditto. * gas/i386/x86-64-xsavec.d: Ditto. * gas/i386/x86-64-xsavec.s: Ditto. * gas/i386/x86-64-xsaves-intel.d: Ditto. * gas/i386/x86-64-xsaves.d: Ditto. * gas/i386/x86-64-xsaves.s: Ditto. * gas/i386/xsavec-intel.d: Ditto. * gas/i386/xsavec.d: Ditto. * gas/i386/xsavec.s: Ditto. * gas/i386/xsaves-intel.d: Ditto. * gas/i386/xsaves.d: Ditto. * gas/i386/xsaves.s: Ditto. opcodes/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, MOD_0FC7_REG_5. (PREFIX enum): Add PREFIX_0FAE_REG_7. (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. (prefix_table): Add clflusopt. (mod_table): Add xrstors, xsavec, xsaves. * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. * i386-init.h: Regenerate. * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, xsaves64, xsavec, xsavec64. * i386-tbl.h: Regenerate.
2014-02-10binutils potfiles regenAlan Modra3-120/+106
Adds nds32 files to POTFILES.in
2014-01-30Fix shift for AVX512F gather/scatter instructionsMichael Zolotukhin2-3/+8
opcodes/ 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> Jan Beulich <jbeulich@suse.com> PR binutils/16490 * i386-dis.c (OP_E_memory): Fix shift computation for vex_vsib_q_w_dq_mode. gas/testsuite/ 2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> Jan Beulich <jbeulich@suse.com> PR binutils/16490 * gas/i386/avx512f.d: Fix test output. * gas/i386/avx512f-intel.d: Likewise. * gas/i386/x86-64-avx512f.d: Likewise. * gas/i386/x86-64-avx512f-intel.d: Likewise.
2014-01-09Fix buffer underrun in i386-dis.c.Roland McGrath2-1/+7
opcodes/ * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when last_rex_prefix is -1.
2014-01-08Update copyright year to 2014H.J. Lu2-2/+6
binutils/ * version.c (print_version): Update copyright year to 2014. gas/ * as.c (parse_args): Update copyright year to 2014. gold/ * version.cc (print_version): Update copyright year to 2014. ld/ * ldver.c (ldversion): Update copyright year to 2014. opcodes/ * i386-gen.c (process_copyright): Update copyright year to 2014.
2014-01-08New Year - binutils ChangeLog rotationH.J. Lu2-1352/+1366
2014-01-06* nds32-asm.c (parse_operand): Fix out-of-range integer constant.Maciej W. Rozycki2-1/+5
2013-12-18Add system register and embedded debug register support.Kuan-Lin Chen3-6/+147
Add two more as test files for user special and system register. Fix typo. 2013-12-17 Kuan-Lin Chen <kuanlinchentw@gmail.com> * gas/nds32/nds32.exp: Add system and user special register tests. * gas/nds32/sys-reg.s: New test. * gas/nds32/sys-reg.d: Likewise. * gas/nds32/usr-spe-reg.s: Likewise. * gas/nds32/usr-spe-reg.d: Likewise. * gas/nds32/alu-2.d: Delete the new blank line at EOF. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/lsi.d: Likewise. * nds32-dis.c (sr_map): Add system register table for disassembling. (usr_map): Fix typo. * nds32-asm.c (keyword_sr): Add embedded debug registers.
2013-12-17Properly handle ljmp/lcall with invalid MODRM byteMichael Zolotukhin2-2/+19
gas/testsuite/ 2013-12-17 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * gas/i386/disassem.s: New. * gas/i386/disassem.d: Likewise. * gas/i386/x86-64-disassem.s: Likewise. * gas/i386/x86-64-disassem.d: Likewise. * gas/i386/i386.exp: Run disassem and x86-64-disassem. opcodes/ 2013-12-17 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * i386-dis.c (MOD_FF_REG_3): New. (MOD_FF_REG_5): Likewise. (mod_table): Add MOD_FF_REG_3 and MOD_FF_REG_5. (reg_table): Use MOD_FF_REG_3 and MOD_FF_REG_5.
2013-12-16Add support to show the symbolic names of the MIPS CP1 registers.Andrew Bennett2-39/+115
2013-12-16 Andrew Bennett <andrew.bennett@imgtec.com> gas/testsuite/gas/mips/ * mips.exp: Add CP1 register name tests. * cp1-names-mips32.d: New test. * cp1-names-mips32r2.d: New test. * cp1-names-mips64.d: New test. * cp1-names-mips64r2.d: New test. * cp1-names-numeric.d: New test. * cp1-names-r3000.d: New test. * cp1-names-r4000.d: New test. * cp1-names-sb1.d: New test. * cp1-names.s: New test. * micromips-insn32.d: Add the correct symbolic names for the CP1 registers. * micromips-noinsn32.d: Likewise. * micromips-trap.d: Likewise. * micromips.d: Likewise. opcodes/ * mips-dis.c: Add mips_cp1_names pointer. (mips_cp1_names_numeric): New array. (mips_cp1_names_mips3264): New array. (mips_arch_choice): Add cp1_names. (mips_arch_choices): Add relevant cp1 register name array to each of the elements. (set_default_mips_dis_options): Add support for setting up the mips_cp1_names pointer. (parse_mips_dis_option): Add support for the cp1-names command line variable. Also setup the mips_cp1_names pointer. (print_reg): Print out name of the cp1 register.
2013-12-16Range of element index is too large on MIPS MSA element selection instructions.Andrew Bennett3-56/+67
The element index range for the following MIPS MSA instructions: sldi, splati, copy_s, copy_u, insert and insve is 1 bit too large. This patch fixes this issue. ChangeLog: gas/testsuite/gas/mips/ * msa.s: Reduced maximum element index range for sldi, splati, copy_s, copy_u, insert and insve instructions. * msa64.s: Likewise. * micromips@msa.d: Likewise. * micromips@msa64.d: Likewise. * msa.d: Likewise. * msa64.d: Likewise. include/opcode/ * mips.h: Updated description of +o, +u, +v and +w for MIPS and microMIPS. opcodes/ * micromips-opc.c (decode_micromips_operand): Reduced range of +o, +u, +v and +w. (micromips_opcodes): Reduced element index range for sldi, splati, copy_s, copy_u, insert and insve instructions. * opcodes/mips-opc.c (decode_mips_operand): Reduced range of +o, +u, +v and +w. (mips_builtin_opcodes): Reduced element index range for sldi, splati, copy_s, copy_u, insert and insve instructions.
2013-12-132013-12-13 Jan-Benedict Glaw <jbglaw@lug-owl.de>Jan-Benedict Glaw2-2/+6
* nds32-dis.c (mnemonic_96): Fix typo. [BR]: https://sourceware.org/ml/binutils/2013-12/msg00184.html
2013-12-13Add support for Andes NDS32:Kuan-Lin Chen10-0/+3257
BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
2013-12-05 * s390-mkopc.c (dumpTable): Provide a format string to printf soNick Clifton2-2/+8
that compiling with -Werror=format-security does not produce an error.
2013-11-20gas/testsuite/Yufeng Zhang2-5/+9
* gas/aarch64/msr.s: Add tests. * gas/aarch64/msr.d: Update. include/opcode * aarch64.h (aarch64_pstatefields): Change element type to aarch64_sys_reg. opcodes/ * aarch64-opc.c (aarch64_pstatefields): Update.
2013-11-192013-11-19 Catherine Moore <clm@codesourcery.com>Catherine Moore3-57/+64
* micromips-opc.c (LM): Define. (micromips_opcodes): Add LM to load instructions. * mips-opc.c (prefe): Add LM attribute.
2013-11-18Revert "Add support for AArch64 trace unit registers."Yufeng Zhang2-236/+12
This reverts commit 75468c93c14e9f14dd9020712538c5303a455876.
2013-11-15gas/Yufeng Zhang2-0/+244
* config/tc-aarch64.c (set_other_error): New function. (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set the variable to which it points with 'o'. (parse_operands): Update; check for write to read-only system registers or read from write-only ones. gas/testsuite/ * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/tracereg-illegal.d: New file. * gas/aarch64/tracereg-illegal.l: Ditto. * gas/aarch64/tracereg-illegal.s: Ditto. * gas/aarch64/tracereg.d: Ditto. * gas/aarch64/tracereg.s: Ditto. include/opcode * aarch64.h (aarch64_sys_reg_readonly_p): New declaration. (aarch64_sys_reg_writeonly_p): Ditto. opcodes/ * aarch64-opc.c (CPENT): New define. (F_READONLY, F_WRITEONLY): Likewise. (aarch64_sys_regs): Add trace unit registers. (aarch64_sys_reg_readonly_p): New function. (aarch64_sys_reg_writeonly_p): Ditto.
2013-11-15MIPS/opcodes: Add MFCR and MTCR data dependenciesMaciej W. Rozycki2-2/+7
* mips-opc.c (mips_builtin_opcodes): Add RD_2 to "mfcr" and "mtcr".
2013-11-11Fix ChangeLog entries from earlier commit.Catherine Moore1-0/+11
2013-11-112013-11-11 Catherine Moore <clm@codesourcery.com>Catherine Moore2-90/+90
gas/ * config/mips/tc-mips.c (convert_reg_type): Use INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY. (reg_needs_delay): Likewise. (insns_between): Likewise. include/ * opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... (INSN_LOAD_MEMORY): ...this. opcodes/ * mips-dis.c (print_insn_mips): Use INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY. (print_insn_micromips): Likewise. * mips-opc.c (LDD): Remove. (CLD): Include INSN_LOAD_MEMORY. (LM): New. (mips_builtin_opcodes): Use LM instead of LDD. Add LM to load instructions.
2013-11-08Remove CpuNop from CPU_K6_2_FLAGSH.J. Lu3-2/+8
PR gas/16140 * i386-gen.c (cpu_flag_init): Remove CpuNop from CPU_K6_2_FLAGS. * i386-init.h: Regenerated.
2013-11-05gas/Yufeng Zhang2-310/+330
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg; call aarch64_sys_reg_deprecated_p and warn about the deprecated system registers. gas/testsuite/ * gas/aarch64/deprecated.d: New file. * gas/aarch64/deprecated.l: New file. * gas/aarch64/deprecated.s: New file. * gas/aarch64/sysreg-1.s: Add tests. * gas/aarch64/sysreg-1.d: Add tests. include/opcode/ * aarch64.h (aarch64_sys_reg): New typedef. (aarch64_sys_regs): Change to define with the new type. (aarch64_sys_reg_deprecated_p): Declare. opcodes/ * aarch64-opc.c (F_DEPRECATED): New macro. (aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with F_DEPRECATED. (aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on AARCH64_OPND_SYSREG.
2013-11-05gas/Yufeng Zhang7-35/+68
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1. gas/testsuite/ * gas/aarch64/alias.s: Add tests. * gas/aarch64/alias.d: Update. * gas/aarch64/no-aliases.d: Update. * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/illegal.s: Add tests. * gas/aarch64/illegal.l: Update. include/opcode/ * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. (enum aarch64_opnd): Add AARCH64_OPND_COND1. opcodes/ * aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'. (convert_from_csel): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): Handle AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1. (aarch64_print_operand): Handle AARCH64_OPND_COND1. * aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of COND for cinc, cset, cinv, csetm and cneg. (AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1. * aarch64-asm-2.c: Re-generated. * aarch64-dis-2.c: Ditto. * aarch64-opc-2.c: Ditto.
2013-11-05opcodes/Yufeng Zhang2-4/+19
* aarch64-opc.c (set_syntax_error): New function. (operand_general_constraint_met_p): Replace set_other_error with set_syntax_error. gas/testsuite/ * gas/aarch64/diagnostic.s: Add tests of ldp/stp. * gas/aarch64/diagnostic.l: Update.
2013-10-30S/390: Disassemble 31-bit binaries with "zarch" opcode set by defaultAndreas Arnez2-11/+6
Currently the disassembler for s390 (by default) assumes that a 31-bit binary was compiled in "ESA" mode -- and then only disassembles a limited opcode set. The change upgrades the default to the full "zarch" opcode set even for 31-bit binaries. opcodes/ * s390-dis.c (init_disasm): Default to full 'zarch' opcode availability even for 31-bit programs.
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