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2000-02-272000-02-27 Eli Zaretskii <eliz@is.elta.co.il>Ian Lance Taylor3-4/+12
* Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the name of the libtool directory. * Makefile.in: Rebuild.
2000-02-27rebuild with current toolsIan Lance Taylor5-1084/+469
2000-02-24Add functions to modify/examine the signed_overflow_ok_p field in cpu_desc.Nick Clifton2-1/+31
2000-02-242000-02-23 Andrew Haley <aph@cygnus.com>Andrew Haley7-24/+54
* m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c, m32r-ibld.c,m32r-opc.h: Rebuild.
2000-02-23Add IBM 370 support.Alan Modra8-340/+1587
2000-02-22 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp toChandra Chavva2-10/+15
ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel procedure.
2000-02-221999-12-30 Andrew Haley <aph@cygnus.com>Andrew Haley3-1/+11
* mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER: force gp32 to zero. * mips-opc.c (G6): New define. (mips_builtin_op): Add "move" definition for -gp32.
2000-02-22 From Grant Erickson <gerickso@Brocade.COM>:Ian Lance Taylor2-2/+7
* ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
2000-02-21This lot mainly cleans up `comparison between signed and unsigned' gccAlan Modra2-5/+10
warnings. One usused var, and a macro parenthesis fix too. Also check input sections are elf when doing gc in elflink.h.
2000-02-17bfd:Joern Rennecke3-242/+860
Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-142000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>Fernando Nasser2-3/+43
* arm-dis.c: Change flavor name from atpcs-special to special-atpcs to prevent name conflict in gdb. (get_arm_regname_num_options, set_arm_regname_option, get_arm_regnames): New functions. API to access the several flavor of register names. Note: Used by gdb. (print_insn_thumb): Use the register name entry from the currently selected flavor for LR and PC.
2000-02-10Add support for M340 part.Nick Clifton3-2/+48
2000-02-07Rename parse_disassembler_option (again)Nick Clifton2-5/+11
2000-02-03octets vs bytes changes for binutilsTimothy Wall2-2/+14
2000-01-28Rename parse_disassembler_option to parse_arm_disassembler_option and allow itNick Clifton2-1/+3
to be exported.
2000-01-27Add ATPCS support to ARM disassembler.Nick Clifton3-156/+190
Document ARM disassembler options.
2000-01-27Add support for documenting target specific disassembler optionsNick Clifton2-0/+11
2000-01-27Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions whenNick Clifton2-10/+21
bounded by non-function labels.
2000-01-25Prevent double dumping of raw thumb instructions.Nick Clifton2-3/+7
2000-01-21Add 'add" as an offial alias for "addu"Nick Clifton2-0/+5
2000-01-20fix spelling of MotorolaNick Clifton2-2/+2
2000-01-03Add support for --disassembler-options=force-thumbNick Clifton2-22/+81
1999-12-27x86 indirect jump/call syntax fixes. Disassembly fix for lcall.Alan Modra2-1/+5
1999-12-01 * m10300-opc.c, m10300-dis.c: Add am33 support.Jeff Law3-2/+884
1999-11-25 * hppa-dis.c (unit_cond_names): Add PA2.0 unit condition names.Jeff Law2-2/+8
(print_insn_hppa): Handle 'B' operand.
1999-11-22Fix binary pattern for cpfg,f0,c instructionNick Clifton2-1/+5
1999-11-18For include/opcode:Gavin Romig-Koch2-0/+62
* mips.h (INSN_ISA5): New. For opcodes: * mips-opc.c (I5): New. (abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps, pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
1999-11-16Added 'X' format to ARM code.Donald Lindsay3-0/+15
1999-11-15 * mips-opc.c (la): Create a version that just uses addiu directly.Gavin Romig-Koch2-0/+7
(dla): Expand to daddiu if possible.
1999-11-11Add ssnop pattern.Nick Clifton2-34/+42
1999-11-01For include/opcode:Gavin Romig-Koch2-22/+6
* mips.h (OPCODE_IS_MEMBER): New. For gas: * config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER. (mips_ip): Use OPCODE_IS_MEMBER. For opcodes: * mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
1999-10-29oops - omitted from previous deltaNick Clifton1-0/+5
1999-10-29Define SHORT_AR and use for MVTACC (fix for CR: 101340)Nick Clifton1-1/+2
1999-10-28fix typo in previous deltaNick Clifton2-44/+4
1999-10-27fix compile time warnings.Nick Clifton2-0/+5
1999-10-25revert previous deltaNick Clifton3-25/+1
1999-10-25Apply patch supplied for case 102229 to implement new insns psrclr and psrset.Nick Clifton3-1/+69
1999-10-18Add md expression support; Cleanup alpha warningsMichael Meissner2-16/+30
1999-10-10 * hppa-dis.c (print_insn_hppa): Add new codes 'cc', 'cd', 'cC',Jeff Law2-25/+48
'co', '@'. * hppa-dis.c (print_insn_hppa): Removed unused args. Fix '?W'. * hppa-dis.c (print_insn_hppa): Implement codes "?N", "?Q".
1999-10-07Added seven new instructions ld, ld2w, sac, sachi, slae, st andDiego Novillo2-1/+19
st2w for d10v. Created new testsuite for d10v to verify new instructions.
1999-10-05 * fr30-asm.c,fr30-desc.h: Rebuild.Doug Evans11-164/+1024
* m32r-asm.c,m32r-desc.c,m32r-desc.h: Rebuild. Add m32rx support. * m32r-dis.c,m32r-ibld.c,m32r-opc.c,m32r-opc.h,m32r-opinst.c: Ditto.
1999-09-29Fix bit patterns of some load/store instructions to match latest docs.Nick Clifton2-8/+13
1999-09-23Remove accidental case duplication.Jeff Law1-4/+0
1999-09-23 * hppa-dis.c (print_insn_hppa): Replace 'B', 'M', 'g' and 'l' withJeff Law2-11/+22
cleaner code using completer prefixes. Add 'Y'.
1999-09-19 * hppa-dis.c: (print_insn_hppa): Correct 'cJ', 'cc'.Jeff Law2-12/+58
1999-09-19 * hppa-dis.c (extract_22): New function.Jeff Law2-1/+13
1999-09-19 * hppa-dis.c (print_insn_hppa): Handle 'J', 'K', and 'cc'.Jeff Law2-0/+9
1999-09-19 * hppa-dis.c (print_insn_hppa): Handle 'fe' and 'cJ'.Jeff Law2-0/+15
1999-09-19 * hppa-dis.c (print_insn_hppa): Handle '#', 'd', and 'cq'.Jeff Law2-0/+39
1999-09-19 * hppa-dis.c (print_insn_hppa): Handle 'm', 'h', '='.Jeff Law2-0/+51
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