Age | Commit message (Expand) | Author | Files | Lines |
2019-11-22 | Arm: Change CRC from fpu feature to archititectural extension | Mihail Ionescu | 2 | -12/+18 |
2019-11-14 | x86: drop redundant SYSCALL/SYSRET templates | Jan Beulich | 3 | -26/+5 |
2019-11-14 | x86: fold individual Jump* attributes into a single Jump one | Jan Beulich | 5 | -14858/+10948 |
2019-11-14 | x86: make JumpAbsolute an insn attribute | Jan Beulich | 6 | -26480/+26486 |
2019-11-14 | x86: make AnySize an insn attribute | Jan Beulich | 5 | -14486/+14499 |
2019-11-12 | RISC-V: Support the INSN_CLASS.*F.* classes for .insn directive. | Jim Wilson | 2 | -60/+66 |
2019-11-12 | [binutils][arm] Update the decoding of MVE VMOV, VMVN | Mihail Ionescu | 2 | -6/+18 |
2019-11-12 | x86: fold EsSeg into IsString | Jan Beulich | 6 | -11272/+11287 |
2019-11-12 | x86: eliminate ImmExt abuse | Jan Beulich | 6 | -93/+197 |
2019-11-12 | x86: introduce operand type "instance" | Jan Beulich | 7 | -14199/+14252 |
2019-11-11 | Arm64: SVE2's smaxp/sminp require operands 1 and 3 to be the same register | Jan Beulich | 2 | -2/+7 |
2019-11-11 | Arm64: fix build with old glibc | Jan Beulich | 2 | -10/+12 |
2019-11-08 | i386: Only check suffix in instruction mnemonic | H.J. Lu | 3 | -4/+10 |
2019-11-08 | x86: convert RegMask and RegBND from bitfield to enumerator | Jan Beulich | 7 | -14560/+14574 |
2019-11-08 | x86: convert RegSIMD and RegMMX from bitfield to enumerator | Jan Beulich | 7 | -19174/+19187 |
2019-11-08 | x86: convert Control/Debug/Test from bitfield to enumerator | Jan Beulich | 7 | -14001/+14015 |
2019-11-08 | x86: convert SReg from bitfield to enumerator | Jan Beulich | 7 | -13810/+13823 |
2019-11-08 | x86: introduce operand type "class" | Jan Beulich | 6 | -105/+165 |
2019-11-07 | [gas][aarch64] Add the v8.6 Data Gathering Hint mnemonic [10/X] | Matthew Malcomson | 3 | -49/+61 |
2019-11-07 | [Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10] | Matthew Malcomson | 2 | -0/+19 |
2019-11-07 | [binutils][aarch64] Matrix Multiply extension enablement [8/X] | Matthew Malcomson | 6 | -462/+877 |
2019-11-07 | [binutils][arm] BFloat16 enablement [4/X] | Matthew Malcomson | 2 | -5/+42 |
2019-11-07 | [Patch][binutils][arm] Create a new generic coprocessor array [3/10] | Matthew Malcomson | 2 | -51/+98 |
2019-11-07 | [binutils][aarch64] Bfloat16 enablement [2/X] | Matthew Malcomson | 6 | -68/+373 |
2019-11-07 | [gas][aarch64] Armv8.6-a option [1/X] | Matthew Malcomson | 2 | -0/+8 |
2019-11-07 | x86: support further AMD Zen2 instructions | Jan Beulich | 7 | -4080/+4160 |
2019-11-07 | x86: adjust register names printed for MONITOR/MWAIT | Jan Beulich | 2 | -16/+20 |
2019-11-07 | x86/Intel: drop IgnoreSize from operand-less MOVSD/CMPSD again | Jan Beulich | 3 | -4/+11 |
2019-11-05 | x86: fold OP_Mwaitx() into OP_Mwait() | Jan Beulich | 2 | -24/+11 |
2019-11-05 | x86: split MONITORX/MWAITX entries | Jan Beulich | 2 | -2/+21 |
2019-11-05 | x86: consolidate disassembler enum naming a little | Jan Beulich | 2 | -75/+130 |
2019-11-04 | Fix potential array overruns when disassembling corrupt v850 binaries. | Nick Clifton | 2 | -60/+129 |
2019-10-30 | Modify the ARNM assembler to accept the omission of the immediate argument fo... | Delia Burduv | 4 | -3/+15 |
2019-10-30 | x86: re-do "shorthand" handling | Jan Beulich | 4 | -219/+214 |
2019-10-30 | x86: slightly rearrange struct insn_template | Jan Beulich | 4 | -3918/+3925 |
2019-10-30 | x86: drop stray W | Jan Beulich | 5 | -19/+54 |
2019-10-29 | Fix array overrun when disassembling corrupt TIC30 binaries. | Nick Clifton | 2 | -1/+5 |
2019-10-29 | Fix a potential illegal array access in the D30V disassembler. | Nick Clifton | 2 | -1/+9 |
2019-10-29 | Prevent a left shift by a negative value when disassembling IA64 binaries. | Nick Clifton | 2 | -3/+11 |
2019-10-29 | Fix array overruns in the S12Z disassembler. | Nick Clifton | 3 | -16/+56 |
2019-10-28 | Fix potentially illegal shift and assign operation in CSKY disassembler. | Nick Clifton | 2 | -2/+7 |
2019-10-28 | Fix buffer overrun in TIC30 disassembler. | Nick Clifton | 2 | -7/+27 |
2019-10-28 | Stop potential illegal memory access in the NS32K disassembler. | Nick Clifton | 2 | -1/+17 |
2019-10-28 | Prevent an illegal memory access in the xgate disassembler. | Nick Clifton | 2 | -3/+8 |
2019-10-25 | Fix potential undefined behaviour in the RX disassembler. | Nick Clifton | 2 | -1/+6 |
2019-10-23 | Fix typo in RX disassembler error messages. | Nick Clifton | 2 | -10/+19 |
2019-10-22 | Prevent more potential illegal memory accesses in the RX disassembler. | Nick Clifton | 2 | -16/+41 |
2019-10-16 | Fix potential illegal memory access when disassembling corrupt RX binaries. | Nick Clifton | 2 | -15/+92 |
2019-10-09 | Fix the disassembly of the LDS and STS instructions of the AVR architecture. | Nick Clifton | 2 | -0/+8 |
2019-10-08 | S/390: Add support for z15 as CPU name. | Andreas Krebbel | 1 | -1/+2 |