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2020-01-13tic4x: sign extension using shiftsAlan Modra2-2/+5
2020-01-13ubsan: fr30: left shift of negative valueAlan Modra2-5/+9
2020-01-13ubsan: xgate: left shift of negative valueAlan Modra2-8/+13
2020-01-10ubsan: tilepro: signed integer overflowAlan Modra3-11/+10
2020-01-10ubsan: m10300: shift exponent -4Alan Modra3-30/+24
2020-01-09Fix the cast used to prevent compile time warning about an always false test.Nick Clifton2-1/+6
2020-01-09Fix compile time warnings about comparisons always being false.Sergey Belyashov2-7/+13
2020-01-09x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMDJan Beulich4-10/+61
2020-01-08ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'Alan Modra4-11/+26
2020-01-07[ARC] Add finer details for LLOCK and SCONDShahab Vahedi2-21/+30
2020-01-06ubsan: m32c: left shift of negative valueAlan Modra2-61/+65
2020-01-06PR25344, z80 disassembler recursionAlan Modra2-29/+40
2020-01-04ubsan: m32r: left shift of negative valueAlan Modra2-3/+7
2020-01-04ubsan: cr16: left shift cannot be represented in type 'int'Alan Modra2-2/+5
2020-01-04ubsan: crx: left shift cannot be represented in type 'int'Alan Modra2-1/+5
2020-01-04ubsan: d30v: left shift cannot be represented in type 'int'Alan Modra2-12/+10
2020-01-03Arm64: correct address index operands for LD1RO{H,W,D}Jan Beulich2-7/+12
2020-01-03Arm64: correct {su,us}dot SIMD encodingsJan Beulich2-3/+8
2020-01-03Arm64: correct uzp{1,2} mnemonicsJan Beulich3-4/+10
2020-01-03Arm64: correct 64-bit element fmmla encodingJan Beulich3-46/+52
2020-01-02Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov3-532/+878
2020-01-01Re: Update year range in copyright notice of binutils filesAlan Modra1-0/+4
2020-01-01Update year range in copyright notice of binutils filesAlan Modra275-279/+279
2020-01-01ChangeLog rotationAlan Modra2-2444/+2458
2019-12-30Re: Usage of unitialized heap in tic4x_print_condAlan Modra2-1/+6
2019-12-29ubsan: sparc: left shift cannot be represented in type 'int'Alan Modra2-9/+12
2019-12-29Usage of unitialized heap in tic4x_print_condAlan Modra2-1/+6
2019-12-27x86-64: fix Intel64 handling of branch with data16 prefixJan Beulich2-3/+14
2019-12-27x86: consolidate Disp<NN> handling a littleJan Beulich4-121/+115
2019-12-26ubsan: crx: index 5 out of bounds for type 'operand_desc const[5]'Alan Modra2-1/+6
2019-12-26ubsan: v850: left shift cannot be represented in type 'int'Alan Modra2-7/+12
2019-12-24ubsan: arm: shift exponent 32 is too large for 32-bit type 'unsigned int'Alan Modra2-3/+7
2019-12-23ppc: misc minor build correctionsJan Beulich3-8/+14
2019-12-23ubsan: score: left shift of 2 by 31 places cannot be represented in type 'int'Alan Modra2-25/+28
2019-12-23ubsan: iq2000: left shift of negative valueAlan Modra2-1/+5
2019-12-23ubsan: d30v: left shift cannot be represented in type 'long long'Alan Modra2-17/+25
2019-12-23ubsan: wasm: shift is too large for 64-bit type 'bfd_vma'Alan Modra2-11/+23
2019-12-20PR25281, sh disassembler abortAlan Modra2-6/+17
2019-12-20ubsan: or1k: left shift of negative valueAlan Modra2-2/+6
2019-12-20ubsan: hppa: left shift of negative valueAlan Modra2-8/+13
2019-12-20ubsan: m68hc1x: left shift of negative valueAlan Modra2-105/+81
2019-12-19vax decoding of indexed addressing modeAlan Modra2-2/+16
2019-12-19PR25277, microblaze opcode enumeration vs ISO/IEC TS 18661-3:2015Dr N.W. Filardo3-4/+11
2019-12-18More signed overflow fixesAlan Modra12-59/+70
2019-12-17ubsan: visium: left shift cannot be represented in type 'int'Alan Modra2-1/+5
2019-12-17ubsan: aarch64: left shift cannot be represented in type 'int64_t'Alan Modra3-13/+20
2019-12-17ubsan: nds32: left shift cannot be represented in type 'int'Alan Modra2-9/+15
2019-12-17Remove tic80 supportAlan Modra10-1543/+12
2019-12-17ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')Alan Modra2-1/+5
2019-12-16ubsan: aarch64: left shift of negative valueAlan Modra2-9/+12