Age | Commit message (Expand) | Author | Files | Lines |
2021-08-11 | Deprecate a.out support for NetBSD targets. | John Ericson | 1 | -53/+53 |
2021-08-10 | Updated Serbian and Russian translations for various sub-directories | Nick Clifton | 2 | -236/+293 |
2021-08-05 | [PATCH 1/2] Enable Intel AVX512_FP16 instructions | Cui,Lili | 9 | -16206/+25260 |
2021-08-04 | IBM Z: Remove lpswey parameter | Andreas Krebbel | 2 | -1/+3 |
2021-07-27 | Correct gs264e bfd_mach in mips_arch_choices. | Chenghua Xu | 2 | -1/+5 |
2021-07-26 | PATCH [9/10] arm: add 'pacg' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+2 |
2021-07-26 | PATCH [8/10] arm: add 'autg' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+2 |
2021-07-26 | PATCH [7/10] arm: add 'bxaut' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+2 |
2021-07-26 | PATCH [4/10] arm: add 'pac' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+2 |
2021-07-26 | PATCH [3/10] arm: add 'aut' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+2 |
2021-07-26 | PATCH [2/10] arm: add 'pacbti' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+2 |
2021-07-26 | PATCH [1/10] arm: add 'bti' instruction for Armv8.1-M pacbti extension | Andrea Corallo | 1 | -0/+5 |
2021-07-23 | x86: express unduly set rounding control bits in disassembly | Jan Beulich | 1 | -37/+53 |
2021-07-22 | x86: drop dq{b,d}_mode | Jan Beulich | 1 | -30/+13 |
2021-07-22 | x86: drop vex_scalar_w_dq_mode | Jan Beulich | 3 | -51/+41 |
2021-07-22 | x86: drop xmm_m{b,w,d,q}_mode | Jan Beulich | 4 | -164/+91 |
2021-07-22 | x86: fold duplicate vector register printing code | Jan Beulich | 1 | -74/+33 |
2021-07-22 | x86: drop vex_mode and vex_scalar_mode | Jan Beulich | 1 | -11/+7 |
2021-07-22 | x86: correct EVEX.V' handling outside of 64-bit mode | Jan Beulich | 1 | -4/+16 |
2021-07-22 | x86: fold duplicate code in MOVSXD_Fixup() | Jan Beulich | 1 | -16/+10 |
2021-07-22 | x86: fold duplicate register printing code | Jan Beulich | 1 | -105/+14 |
2021-07-22 | x86-64: properly bounds-check %bnd<N> in OP_G() | Jan Beulich | 1 | -1/+1 |
2021-07-22 | x86-64: generalize OP_G()'s EVEX.R' handling | Jan Beulich | 1 | -1/+8 |
2021-07-22 | x86: correct VCVT{,U}SI2SD rounding mode handling | Jan Beulich | 3 | -15/+3 |
2021-07-22 | x86: drop OP_Mask() | Jan Beulich | 4 | -48/+28 |
2021-07-14 | x86: Add int1 as one byte opcode 0xf1 | H.J. Lu | 3 | -1/+15 |
2021-07-07 | Add changelog entries for last commit | Andreas Krebbel | 1 | -0/+4 |
2021-07-07 | IBM Z: Add another arch14 instruction | Andreas Krebbel | 1 | -0/+2 |
2021-07-05 | Updated translations (mainly Ukranian and French) triggered by creation of 2.... | Nick Clifton | 3 | -709/+868 |
2021-07-03 | Update version number and regenerate files | Nick Clifton | 3 | -220/+254 |
2021-07-03 | Add markers for 2.37 branch | Nick Clifton | 1 | -0/+4 |
2021-07-02 | Re: Fix minor NDS32 renaming snafu | Alan Modra | 3 | -12/+21 |
2021-07-01 | cgen: split GUILE setting out | Mike Frysinger | 3 | -2/+10 |
2021-07-01 | opcodes: constify & local meps macros | Mike Frysinger | 2 | -5/+12 |
2021-07-01 | opcodes: cleanup nds32 variables | Mike Frysinger | 3 | -40/+57 |
2021-07-01 | opcodes: constify & localize z80 opcodes | Mike Frysinger | 2 | -2/+7 |
2021-07-01 | opcodes: constify & scope microblaze opcodes | Mike Frysinger | 3 | -11/+23 |
2021-07-01 | opcodes: constify aarch64_opcode_tables | Mike Frysinger | 3 | -3/+8 |
2021-06-22 | opcodes: make use of __builtin_popcount when available | Andrew Burgess | 2 | -0/+9 |
2021-06-22 | picojava assembler and disassembler fixes | Alan Modra | 2 | -2/+8 |
2021-06-19 | ubsan: vax: pointer overflow | Alan Modra | 2 | -1/+5 |
2021-06-19 | Fix another strncpy warning | Alan Modra | 2 | -1/+6 |
2021-06-17 | powerpc: move cell "or rx,rx,rx" hints | Alan Modra | 2 | -5/+10 |
2021-06-03 | PR1202, mcore disassembler: wrong address loopt | Alan Modra | 2 | -4/+10 |
2021-06-02 | arc: Construct disassembler options dynamically | Shahab Vahedi | 2 | -27/+161 |
2021-05-29 | PowerPC table driven -Mraw disassembly | Alan Modra | 3 | -1635/+1634 |
2021-05-29 | MIPS/opcodes: Reorder legacy COP0, COP2, COP3 opcode instructions | Maciej W. Rozycki | 2 | -66/+73 |
2021-05-29 | MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA membership | Maciej W. Rozycki | 2 | -51/+61 |
2021-05-29 | MIPS/opcodes: Remove DMFC3 and DMTC3 instructions | Maciej W. Rozycki | 2 | -4/+5 |
2021-05-29 | MIPS/opcodes: Disassemble the RFE instruction | Maciej W. Rozycki | 2 | -2/+8 |