| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2022-04-07 | IBM zSystems: Add support for z16 as CPU name. | Andreas Krebbel | 1 | -1/+2 |
| 2022-03-14 | PR28959, obdump doesn't disassemble mftb instruction | Alan Modra | 1 | -2/+3 |
| 2022-02-17 | Updated Serbian translations for the bfd, gold, ld and opcodes directories | Nick Clifton | 2 | -235/+275 |
| 2022-02-09 | This is the 2.38 GNU Binutils releasebinutils-2_38 | Nick Clifton | 4 | -27/+21 |
| 2022-01-24 | Update Bulgarian, French, Romaniam and Ukranian translation for some of the s... | Nick Clifton | 4 | -923/+2834 |
| 2022-01-22 | CHange version number to 2.37.90 and regenerate files | Nick Clifton | 3 | -14/+31 |
| 2022-01-22 | Add markers for 2.38 branch | Nick Clifton | 1 | -0/+4 |
| 2022-01-21 | drop old unused stamp-h.in file | Mike Frysinger | 1 | -1/+0 |
| 2022-01-17 | Update the config.guess and config.sub files from the master repository and r... | Nick Clifton | 3 | -208/+244 |
| 2022-01-17 | x86: adjust struct instr_info field types | Jan Beulich | 1 | -36/+39 |
| 2022-01-17 | x86: drop index16 field | Jan Beulich | 1 | -5/+3 |
| 2022-01-17 | x86: drop most Intel syntax register name arrays | Jan Beulich | 1 | -230/+119 |
| 2022-01-17 | x86: fold variables in memory operand index handling | Jan Beulich | 1 | -19/+15 |
| 2022-01-17 | x86: constify disassembler static data | Jan Beulich | 1 | -58/+58 |
| 2022-01-14 | x86: drop ymmxmm_mode | Jan Beulich | 1 | -16/+0 |
| 2022-01-14 | x86: share yet more VEX table entries with EVEX decoding | Jan Beulich | 4 | -209/+69 |
| 2022-01-14 | x86: consistently use scalar_mode for AVX512-FP16 scalar insns | Jan Beulich | 2 | -31/+31 |
| 2022-01-14 | x86: record further wrong uses of EVEX.b | Jan Beulich | 1 | -0/+8 |
| 2022-01-14 | x86: reduce AVX512 FP set of insns decoded through vex_w_table[] | Jan Beulich | 5 | -268/+42 |
| 2022-01-14 | x86: reduce AVX512-FP16 set of insns decoded through vex_w_table[] | Jan Beulich | 4 | -137/+77 |
| 2022-01-06 | aarch64: Add support for new SME instructions | Richard Sandiford | 2 | -302/+338 |
| 2022-01-06 | x86: drop NoAVX insn attribute | Jan Beulich | 4 | -4520/+4516 |
| 2022-01-06 | x86: drop NoAVX from POPCNT | Jan Beulich | 2 | -2/+2 |
| 2022-01-06 | x86: drop some "comm" template parameters | Jan Beulich | 2 | -90/+90 |
| 2022-01-06 | x86: templatize FMA insn templates | Jan Beulich | 2 | -1016/+830 |
| 2022-01-05 | opcodes: Make i386-dis.c thread-safe | Vladimir Mezentsev | 1 | -1738/+1774 |
| 2022-01-02 | Update year range in copyright notice of binutils files | Alan Modra | 282 | -286/+301 |
| 2022-01-01 | unify 64-bit bfd checks | Mike Frysinger | 5 | -4/+265 |
| 2021-12-24 | RISC-V: Hypervisor ext: support Privileged Spec 1.12 | Vineet Gupta | 1 | -0/+21 |
| 2021-12-17 | x86: Terminate mnemonicendp in swap_operand() | Vladimir Mezentsev | 1 | -0/+1 |
| 2021-12-16 | RISC-V: Support svinval extension with frozen version 1.0. | Nelson Chu | 1 | -0/+7 |
| 2021-12-03 | aarch64: Fix uninitialised memory | Richard Sandiford | 2 | -1/+3 |
| 2021-12-03 | Revert "Re: Don't compile some opcodes files when bfd is 32-bit only" | Alan Modra | 2 | -10/+10 |
| 2021-12-02 | aarch64: Add BC instruction | Richard Sandiford | 2 | -47/+65 |
| 2021-12-02 | aarch64: Enforce P/M/E order for MOPS instructions | Richard Sandiford | 3 | -15/+127 |
| 2021-12-02 | aarch64: Add support for +mops | Richard Sandiford | 9 | -32/+1535 |
| 2021-12-02 | aarch64: Add Armv8.8-A system registers | Richard Sandiford | 1 | -0/+5 |
| 2021-12-02 | aarch64: Add id_aa64isar2_el1 | Richard Sandiford | 1 | -0/+1 |
| 2021-12-02 | aarch64: Tweak insn sequence code | Richard Sandiford | 1 | -26/+22 |
| 2021-12-02 | aarch64: Add maximum immediate value to aarch64_sys_reg | Richard Sandiford | 2 | -35/+26 |
| 2021-12-02 | Allow the --visualize-jumps feature to work with the AVR disassembler. | Marcus Nilsson | 2 | -5/+37 |
| 2021-11-30 | aarch64: Add missing system registers [PR27145] | Richard Sandiford | 1 | -1/+166 |
| 2021-11-30 | aarch64: Make LOR registers conditional on +lor | Richard Sandiford | 1 | -4/+6 |
| 2021-11-30 | aarch64: Remove ZIDR_EL1 | Richard Sandiford | 1 | -1/+0 |
| 2021-11-30 | aarch64: Allow writes to MFAR_EL3 | Richard Sandiford | 1 | -1/+1 |
| 2021-11-30 | aarch64: Mark PMSIDR_EL1 as read-only | Richard Sandiford | 1 | -1/+1 |
| 2021-11-30 | aarch64: Remove duplicate system register entries | Richard Sandiford | 1 | -7/+1 |
| 2021-11-30 | RISC-V: The vtype immediate with more than the defined 8 bits are preserved. | Nelson Chu | 1 | -1/+1 |
| 2021-11-30 | RISC-V: Dump vset[i]vli immediate as numbers once vsew or vlmul is reserved. | Nelson Chu | 2 | -3/+5 |
| 2021-11-29 | opcodes: enable silent build rules | Mike Frysinger | 4 | -54/+94 |
