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pairs for all predefined symbols recognized by the assembler.
Also used by the disassembling routines.
(tic80_symbol_to_value): New function.
(tic80_value_to_symbol): New function.
* tic80-dis.c (print_operand_control_register,
print_operand_condition_code, print_operand_bitnum):
Remove private tables and use tic80_value_to_symbol function.
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function up into several smaller ones and arranged for
the instruction printing function to be callable recursively
to print vector instructions that have both a load and a
math instruction packed into a single opcode.
* tic80-opc.c (tic80_opcodes): Expand comment for vld opcode
to explain why it comes after the other vector opcodes.
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as floats.
* tic80-opc.c (SPFI): Add single precision floating point
immediate operand type.
(ROTATE): Add rotate operand type for shifts.
(ENDMASK): Add for shifts.
(n): Macro for the 'n' bit.
(i): Macro for the 'i' bit.
(PD): Macro for the 'PD' field.
(P2): Macro for the 'P2' field.
(P1): Macro for the 'P1' field.
(tic80_operands): Add entries for "exts", "extu", "fadd",
"fcmp", and "fdiv".
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(print_insn_tic80): If R_SCALED then print ":s" modifier for operand.
* tic80-opc.c (REG0, REG22, REG27, SSOFF, LSOFF): Names
changed to REG_0, REG_22, REG_DEST, OFF_SS, OFF_SL respectively.
(SICR, LICR, REGM_SI, REGM_LI): Names changed to CR_SI, CR_LI,
REG_BASE_M_SI, REG_BASE_M_LI respectively.
(REG_SCALED, LSI_SCALED): New operand types.
(E): New macro for 'E' bit at bit 27.
(tic80_opcodes): Add and test dld, dld.u, dst, estop, and etrap
opcodes, including the various size flavors (b,h,w,d) for
the direct load and store instructions.
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in an instruction.
* tic80-dis.c (print_insn_tic80): Change comma and paren handling.
Use M_SI and M_LI macros to check for ":m" modifier for GPR operands.
* tic80-opc.c (tic80_operands): Add REGM_SI and REGM_LI operands.
(F, M_REG, M_LI, M_SI, SZ_REG, SZ_LI, SZ_SI, D, S): New bit-twiddlers.
(MASK_LI_M, MASK_SI_M, MASK_REG_M): Remove and replace in opcode
masks with "MASK_* & ~M_*" to get the M bit reset.
(tic80_opcodes): Add bsr, bsr.a, cmnd, cmp, dcachec, and dcachef.
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correctly. Add support for printing TIC80_OPERAND_BITNUM and
TIC80_OPERAND_CC, and TIC80_OPERAND_CR operands in symbolic
form.
* tic80-opc.c (tic80_operands): Add SSOFF, LSOFF, BITNUM,
CC, SICR, and LICR table entries.
(tic80_opcodes): Add and test "nop", "br", "bbo", "bbz",
"bcnd", and "brcr" opcodes.
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actual fields (no shift field).
* sparc-opc.c (sparc_opcodes): Document why this cannot be "const".
* tic80-dis.c (print_insn_tic80): Replace abort stub with a
partial implementation, work in progress.
* tic80-opc.c (tic80_operands): Begin construction operands table.
(tic80_opcodes): Continue populating opcodes table and start
filling in the operand indices.
(tic80_num_opcodes): Add this.
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* disassemble.c (ARCH_tic80): Define if ARCH_all is defined.
(disassembler): Add bfd_arch_tic80 support to set disassemble
to print_insn_tic80.
* tic80-dis.c (print_insn_tic80): Add stub.
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* configure.in (arch in $selarchs): Add bfd_tic80_arch entry.
* configure: Regenerate with autoconf.
* tic80-dis.c: Add file.
* tic80-opc.c: Add file.
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