| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2000-11-11 | * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0. | Alexandre Oliva | 1 | -1/+1 |
| 2000-04-05 | opcodes: | Joern Rennecke | 1 | -11/+11 |
| 2000-04-05 | sh-dsp REPEAT support: | Joern Rennecke | 1 | -35/+45 |
| 2000-03-06 | * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement. | Joern Rennecke | 1 | -2/+2 |
| 2000-02-17 | bfd: | Joern Rennecke | 1 | -239/+494 |
| 1999-09-29 | Fix bit patterns of some load/store instructions to match latest docs. | Nick Clifton | 1 | -8/+8 |
| 1999-09-07 | Add patterns with correct names for mulu and muls instructions (mulu.w and mu... | Nick Clifton | 1 | -0/+2 |
| 1999-05-03 | 19990502 sourceware importbinu_ss_19990502 | Richard Henderson | 1 | -0/+573 |
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