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* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
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* ppc.h (PPC_OPCODE_405): Define.
(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
(insert_sprg, PPC405): Use PPC_OPCODE_405.
(powerpc_opcodes): Add Xilinx APU related opcodes.
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* config/tc-ppc.c (parse_cpu): Handle -m464.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle -M464.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPC464): Define.
(powerpc_opcodes): Add mfdcrux and mtdcrux.
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* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
gas/
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
(ppc_insert_operand): Likewise.
(ppc_machine): Likewise.
* config/tc-ppc.h: #include "opcode/ppc.h"
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
(ppc_cpu): Update extern decl.
opcodes/
* ppc-dis.c (print_insn_powerpc): Update prototye to use new
ppc_cpu_t typedef.
(struct dis_private): New.
(POWERPC_DIALECT): New define.
(powerpc_dialect): Renamed to...
(powerpc_init_dialect): This. Update to use ppc_cpu_t and
struct dis_private.
(print_insn_big_powerpc): Update for using structure in
info->private_data.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
(skip_optional_operands): Likewise.
(print_insn_powerpc): Likewise. Remove initialization of dialect.
* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
param to be of type ppc_cpu_t. Update prototype.
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which are not included in the "Preliminary Decimal Floating-Point
Architecture" document.
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dquaiq. to use the TE and FRT macros.
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* config/tc-ppc.c (ppc_setup_opcodes): Verify instructions are sorted
according to major opcode number.
opcodes/
* ppc-opc.c (TE): Correct signedness.
(powerpc_opcodes): Sort psq_st and psq_stu according to major
opcode number.
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* doc/binutils.texi (objdump): Document -Mppcps.
gas/
* config/tc-ppc.c (parse_cpu): Handle "750cl".
(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
(md_show_usage): Document -m750cl.
(md_assemble): Handle two delimiters in succession (eg. `),').
* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
* testsuite/gas/ppc/ppc750ps.s: New file.
* testsuite/gas/ppc/ppc750ps.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_PPCPS): New.
opcodes/
* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
(PPCPS): Likewise.
(powerpc_opcodes): Add all pair singles instructions.
* ppc-dis.c (powerpc_dialect): Handle "ppcps".
(print_ppc_disassembler_options): Document -Mppcps.
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(powerpc_opcodes): Use it in dcba.
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(print_insn_powerpc): Use the new operand_value_powerpc and
skip_optional_operands functions to omit or print all optional
operands as a group.
* ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New.
(XFL_MASK): Delete L and W bits from the mask.
(mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK
with XWRA_MASK. Use W.
(mtfsf, mtfsf.): Use XFL_L and W.
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PR 4436
* ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE.
gas/
PR 4436
* config/tc-ppc.c (ppc_insert_operand): Disable range check if
min > max.
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(BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete.
(VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete.
(powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L.
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* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
(num_powerpc_operands): Declare.
(PPC_OPERAND_SIGNED et al): Redefine as hex.
(PPC_OPERAND_PLUS1): Define.
opcodes/
* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
change.
* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
references to following deleted functions.
(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
(insert_ds, extract_ds, insert_de, extract_de): Delete.
(insert_des, extract_des, insert_li, extract_li): Delete.
(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
(num_powerpc_operands): New constant.
(XSPRG_MASK): Remove entire SPRG field.
(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
* messages.c (as_internal_value_out_of_range): Extend to report
errors for values with invalid low bits set.
* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
fields. Check that operands and opcode fields are disjoint.
(ppc_insert_operand): Check operands using mask rather than bit
count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust
insertion code.
(md_apply_fix): Adjust for struct powerpc_operand change.
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(Z2_MASK): Define.
(powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand.
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db10cyc, db12cyc, db16cyc.
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(valid_bo): Add "extract" param. Accept both powerpc and power4
BO fields when disassembling with -Many.
(insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call.
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Anton Blanchard <anton@samba.org>
Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
(POWER6): Define.
(powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
"frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
"mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
"lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
"stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
"dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
"dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
"dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
"dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
"ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
"denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
"dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
"drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
"dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
"dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
"dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
"dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
"drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
"diexq" and "diexq." opcodes.
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frsqrtes.
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* config/tc-ppc.c (parse_cpu): Add -me300 support.
(md_show_usage): Likewise.
* doc/c-ppc.texi (PowerPC-Opts): Document it.
include/opcode/
* ppc.h (PPC_OPCODE_E300): Define.
opcodes/
* ppc-dis.c (powerpc_dialect): Handle e300.
(print_ppc_disassembler_options): Likewise.
* ppc-opc.c (PPCE300): Define.
(powerpc_opcodes): Mark icbt as available for the e300.
binutils/
* doc/binutils.texi (objdump): Document -M e300.
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(print_ppc_disassembler_options): Document it.
* ppc-opc.c (SCV_LEV): Define.
(LEV): Allow optional operand.
(POWER5): Define.
(powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
"hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
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(powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
entries to suit PPC440.
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* ppc-opc.c (insert_sprg, extract_sprg): New Functions.
(powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
(SPRG_MASK): Delete.
(XSPRG_MASK): Mask off extra bits now part of sprg field.
(powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
mfsprg4..7 after msprg and consolidate.
gas/testsuite
* gas/ppc/booke.s: Add new m[t,f]sprg testcases.
* gas/ppc/booke.d: Likewise.
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efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
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* ppc-opc.c (L): Make this field not optional.
include/opcode/
* ppc.h (PPC_OPERAND_OPTIONAL): Fix comment.
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* ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
(extract_fxm): Don't test dialect.
(XFXFXM_MASK): Include the power4 bit.
(XFXM): Add p4 param.
(powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
gas/testsuite/
* gas/ppc/power4.d: Update.
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(powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
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well as when -mpower4.
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* ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
(powerpc_opcodes): Add "dbczl" instruction for PPC970.
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[testsuite]
* gas/ppc/power4.s: Add dcbz and dcbzl test cases.
* gas/ppc/power4.d: Update accordingly.
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* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
PPC_OPERANDS_GPR_0.
* ppc-opc.c (RA0): Define.
(RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
(RAOPT): Rename from RAO. Update all uses.
(powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi",
"stsdx", "stsdi", "lmd" and "stmd" insns.
include/opcode/
* ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines.
gas/testsuite/
Update gas/ppc/.
ld/testsuite/
Update ld-powerpc/.
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* ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
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* ppc-opc.c (powerpc_opcodes): Add m*ivor35.
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mtivor32, mtivor33, mtivor34.
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* ppc-opc.c: Add mfmcar.
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