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path: root/opcodes/ppc-opc.c
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2014-10-21ppc: enable msgclr and msgsnd on Power8Jan Beulich1-2/+2
According to my reading of the spec it was an oversight for them to not having got enabled when Power8 support got added.
2014-06-07Allow both signed and unsigned fields in PowerPC cmpli insnAlan Modra1-5/+8
There are legitimate reasons to allow a signed value in a cmpli insn field, for example to test for a "stw r1,lock@sdarel(r13)" instruction in user code, a kernel might use subis r3,r3,STW_R1_0R13@ha # subtract off high part cmplwi r3,lock@sdarel # is low part accessing lock? Since the lock@sdarel may take a range of -32768 to 32767, the allowed range of cmpli immediate must be at least [-32768,65535]. bfd/ * elf32-ppc.c (ppc_elf_relocate_section): Treat field of cmpli insn as a bitfield; Use complain_overflow_bitfield. * elf64-ppc.c (ppc64_elf_relocate_section): Likewise. opcodes/ * ppc-opc.c (UISIGNOPT): Define and use with cmpli. gas/ * config/tc-ppc.c (ppc_insert_operand): Handle PPC_OPERAND_SIGNOPT on unsigned fields. Comment on PPC_OPERAND_SIGNOPT signed fields in 64-bit mode. gold/ * powerpc.cc (relocate): Treat field of cmpli insn as a bitfield.
2014-03-05Update copyright yearsAlan Modra1-3/+1
2013-07-04 * ppc-opc.c (powerpc_opcodes): Add tdui, twui, tdu, twu, tui, tu.Alan Modra1-0/+6
2013-05-21opcodes/Peter Bergner1-3/+174
* ppc-dis.c (powerpc_init_dialect): Set default dialect to power8. * ppc-opc.c (BHRBE, ST, SIX, PS, SXL, VXPS_MASK, XX1RB_MASK, XLS_MASK, PPCVSX2): New defines. (powerpc_opcodes) <bcdadd., bcdsub., bctar, bctar, bctarl, clrbhrb, fmrgew, fmrgow, lqarx, lxsiwax, lxsiwzx, lxsspx, mfbhrbe, mffprd, mffprwz, mfvrd, mfvrwz, mfvsrd, mfvsrwz, msgclrp, msgsndp, mtfprd, mtfprwa, mtfprwz, mtsle, mtvrd, mtvrwa, mtvrwz, mtvsrd, mtvsrwa, mtvsrwz, pbt., rfebb, stqcx., stxsiwx, stxsspx, vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, vmaxud, vminsd, vminud, vmrgew, vmrgow, vmulesw, vmuleuw, vmulosw, vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, vsubeuqm, vsubudm, vsubuqm, vupkhsw, vupklsw, waitasec, xsaddsp, xscvdpspn, xscvspdpn, xscvsxdsp, xscvuxdsp, xsdivsp, xsmaddasp, xsmaddmsp, xsmsubasp, xsmsubmsp, xsmulsp, xsnmaddasp, xsnmaddmsp, xsnmsubasp, xsnmsubmsp, xsresp, xsrsp, xsrsqrtesp, xssqrtsp, xssubsp, xxleqv, xxlnand, xxlorc>: New instructions. <lxvx, stxvx>: New extended mnemonics. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error and clean up warning when using PRINT_OPCODE_TABLE. gas/testsuite/ * gas/ppc/altivec2.d <bcdadd., bcdadd., vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, vmaxud, vminsd, vminud, vmrgew, vmrgow, vmulesw, vmuleuw, vmulosw, vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, vsubeuqm, vsubudm, vsubuqm, vupkhsw, vupklsw>: Add new tests. * gas/ppc/altivec2.s: Likewise. * gas/ppc/power8.d <bcdadd., bcdsub., bctar, bctarl, clrbhrb, fmrgew, fmrgow, lqarx, lxsiwax, lxsiwzx, lxsspx, mfbhrbe, mfvsrd, mfvsrwz, msgclrp, msgsndp, mtsle, mtvsrd, mtvsrwa, mtvsrwz, pbt., rfebb, stqcx., stxsiwx, stxsspx, vaddcuq, vaddecuq, vaddeuqm, vaddudm, vadduqm, vbpermq, vcipher, vcipherlast, vclzb, vclzd, vclzh, vclzw, vcmpequd, vcmpequd., vcmpgtsd, vcmpgtsd., vcmpgtud, vcmpgtud., veqv, vgbbd, vmaxsd, vmaxud, vminsd, vminud, vmrgow, vmulesw, vmuleuw, vmulosw, vmulouw, vmuluwm, vnand, vncipher, vncipherlast, vorc, vpermxor, vpksdss, vpksdus, vpkudum, vpkudus, vpmsumb, vpmsumd, vpmsumh, vpmsumw, vpopcntb, vpopcntd, vpopcnth, vpopcntw, vrld, vsbox, vshasigmad, vshasigmaw, vsld, vsrad, vsrd, vsubcuq, vsubecuq, vsubeuqm, vsubuqm, vupkhsw, vupklsw, waitasec, xsaddsp, xscvdpspn, xscvspdpn, xscvsxdsp, xscvuxdsp, xsdivsp, xsmaddasp, xsmaddmsp, xsmsubasp, xsmsubmsp, xsmulsp, xsnmaddasp, xsnmaddmsp, xsnmsubasp, xsnmsubmsp, xsresp, xsrsp, xsrsqrtesp, xssqrtsp, xssubsp, xxleqv, xxlnand, xxlorc>: Add new tests. * gas/ppc/power8.s Likewise. * gas/ppc/vsx.d <lxvd2x, stxvd2x>: Add new tests. * gas/ppc/vsx.s Likewise. * gas/ppc/vsx2.d: New test file. * gas/ppc/vsx2.s: Likewise. * gas/ppc/ppc.exp: Run it.
2013-05-09 * ppc-opc.c (extract_vlesi): Properly sign extend.Alan Modra1-6/+3
(extract_vlensi): Likewise. Comment reason for setting invalid.
2013-01-11include/opcode/Peter Bergner1-1/+53
* ppc.h (PPC_OPCODE_POWER8): New define. (PPC_OPCODE_HTM): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries. * ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK, XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines. (SH6): Update. <"tabort.", "tabortdc.", "tabortdci.", "tabortwc.", "tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.", "treclaim.", "tsr.">: Add POWER8 HTM opcodes. <"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (ppc_handle_align): Handle power8's group ending nop. gas/testsuite/ * gas/ppc/htm.d: New test. * gas/ppc/htm.s: Likewise. * gas/ppc/power8.d: Likewise. * gas/ppc/power8.s: Likewise. * gas/ppc/ppc.exp: Run them.
2012-12-13 PR binutils/14950Alan Modra1-65/+40
* ppc-opc.c (insert_sci8, extract_sci8): Rewrite. (insert_sci8n, extract_sci8n): Likewise.
2012-10-26 * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset.Alan Modra1-2/+2
2012-10-22opcodes/Peter Bergner1-1/+1
* ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling. gas/testsuite/ * gas/ppc/altivec.s <vcfpsxws>: Fix opcode spelling.
2012-10-05opcodes/Peter Bergner1-0/+13
* ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2; * ppc-opc.c (VBA): New define. (powerpc_opcodes) <vcuxwfp, vcsxwfp, vcfpuxws, vcfpsxsw, vmr, vnot, mfppr, mfppr32, mtppr, mtppr32>: New extended mnemonics. gas/testsuite/ * gas/ppc/power7.d: Add tests for mfppr, mfppr32, mtppr and mtppr32. * gas/ppc/power7.s: Likewise. * gas/ppc/altivec.d: Add tests for all legacy Altivec instructions. * gas/ppc/altivec.s: Likewise. * gas/ppc/altivec2.d: New test file. * gas/ppc/altivec2.s: Likewise. * gas/ppc/ppc.exp: Run it.
2012-08-29 * ppc-opc.c (VXASHB_MASK): New define.Peter Bergner1-1/+4
(powerpc_opcodes) <vsldoi>: Use VXASHB_MASK.
2012-08-28 * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK,Peter Bergner1-23/+52
VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines. (powerpc_opcodes) <vexptefp, vlogefp, vrefp, vrfim, vrfin, vrfip, vrfiz, vrsqrtefp, vupkhpx, vupkhsb, vupkhsh, vupklpx, vupklsb, vupklsh>: Use VXVA_MASK. <vspltisb, vspltish, vspltisw>: Use VXVB_MASK. <mfvscr>: Use VXVAVB_MASK. <mtvscr>: Use VXVDVA_MASK. <vspltb>: Use VXUIMM4_MASK. <vsplth>: Use VXUIMM3_MASK. <vspltw>: Use VXUIMM2_MASK.
2012-08-20opcodes/ChangeLogAlan Modra1-5/+5
* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt. gas/testsuite/ChangeLog * gas/ppc/e6500.d: Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt.
2012-08-16 * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second andPeter Bergner1-2/+2
RBX for the third operand. <"lswi">: Use RAX for second and NBI for the third operand.
2012-08-15opcodes/Peter Bergner1-3/+3
* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR. gas/testsuite/ * gas/ppc/power4.s <lq, stq>: Add more tests. * gas/ppc/power4.d: Likewise.
2012-08-15opcodes/Peter Bergner1-0/+6
* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics. gas/testsuite/ * gas/ppc/common.d ("nop", "xnop"): Add tests. * gas/ppc/common.s: Likewise. * gas/ppc/power7.d ("yield", "mdoio", "mdoom"): Add tests. * gas/ppc/power7.s: Likewise.
2012-07-252012-07-25 James Lemke <jwlemke@codesourcery.com>James Lemke1-56/+56
* ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
2012-06-11opcodes/Andreas Schwab1-75/+75
* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx) (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx) (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls) (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst) (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep) (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls) (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x) (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx) (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0. gas/testsuite/ * gas/ppc/e500mc.d: Update. * gas/ppc/476.d: Update.
2012-05-18 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.Alan Modra1-0/+12
2012-05-18 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.Alan Modra1-4/+3
2012-05-17 PR 14072Nick Clifton1-1/+1
* configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * alpha-opc.c: Include sysdep.h before any other header file. * alpha-dis.c: Likewise. * avr-dis.c: Likewise. * cgen-opc.c: Likewise. * cr16-dis.c: Likewise. * cris-dis.c: Likewise. * crx-dis.c: Likewise. * d10v-dis.c: Likewise. * d10v-opc.c: Likewise. * d30v-dis.c: Likewise. * d30v-opc.c: Likewise. * h8500-dis.c: Likewise. * i370-dis.c: Likewise. * i370-opc.c: Likewise. * m10200-dis.c: Likewise. * m10300-dis.c: Likewise. * micromips-opc.c: Likewise. * mips-opc.c: Likewise. * mips61-opc.c: Likewise. * moxie-dis.c: Likewise. * or32-opc.c: Likewise. * pj-dis.c: Likewise. * ppc-dis.c: Likewise. * ppc-opc.c: Likewise. * s390-dis.c: Likewise. * sh-dis.c: Likewise. * sh64-dis.c: Likewise. * sparc-dis.c: Likewise. * sparc-opc.c: Likewise. * spu-dis.c: Likewise. * tic30-dis.c: Likewise. * tic54x-dis.c: Likewise. * tic80-dis.c: Likewise. * tic80-opc.c: Likewise. * tilegx-dis.c: Likewise. * tilepro-dis.c: Likewise. * v850-dis.c: Likewise. * v850-opc.c: Likewise. * vax-dis.c: Likewise. * w65-dis.c: Likewise. * xgate-dis.c: Likewise. * xtensa-dis.c: Likewise. * rl78-decode.opc: Likewise. * rl78-decode.c: Regenerate. * rx-decode.opc: Likewise. * rx-decode.c: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * bfd-in.h: Generate an error if included before config.h. * sysdep.h: Likewise. * bfd-in2.h: Regenerate. * compress.c: Remove #include "config.h". * plugin.c: Likewise. * elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h. * elf64-hppa.c: Likewise. * som.c: Likewise. * xsymc.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * Makefile.am: Use wrappers around C files generated by flex. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * itbl-lex-wrapper.c: New file. * config/bfin-lex-wrapper.c: New file. * cgen.c: Include as.h before setjmp.h. * config/tc-dlx.c: Include as.h before any other header. * config/tc-h8300.c: Likewise. * config/tc-lm32.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-or32.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xtensa.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * unwind-ia64.h: Include config.h.
2012-05-14Add support for PowerPC VLE.James Lemke1-858/+1720
2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-03-09include/opcode/Alan Modra1-7/+105
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR. opcodes/ * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500". * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New. (PPCVEC2, PPCTMR, E6500): New short names. (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt, mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx, lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl, lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl, lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC optional operands on sync instruction for E6500 target. bfd/ * archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add entryies for bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500. gas/ * config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500. (ppc_handle_align): Add termination nop opcode for e500mc family. * doc/as.texinfo: Document options -me5500 and -me6500. * doc/c-ppc.texi: Likewise. gas/testsuite/ * gas/ppc/e500mc64_nop.s: New test case for e500mc family termination nops. * gas/ppc/e500mc64_nop.d: Likewise. * gas/ppc/e5500_nop.s: Likewise. * gas/ppc/e5500_nop.d: Likewise. * gas/ppc/e6500_nop.s: Likewise. * gas/ppc/e6500_nop.d: Likewise. * gas/ppc/e6500.s: New. * gas/ppc/e6500.d: Likewise. * gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2011-12-13 * ppc-opc.c (ISA_V2): Define and use for relevant BO field tests.Alan Modra1-332/+342
(valid_bo_pre_v2, valid_bo_post_v2): New functions, extracted from.. (valid_bo): ..here. When disassembling, accept either 'y' or 'at' type encoding on second pass. (powerpc_opcodes): Use ISA_V2 to enable branch insns rather than POWER4. * ppc-dis.c (print_insn_powerpc): Delete dialect_orig. Instead ignore deprecated on second pass.
2011-10-27opcodes/Peter Bergner1-14/+14
* ppc-opc.c (powerpc_opcodes) <drrndq, drrndq., dtstexq, dctqpq, dctqpq., dctfixq, dctfixq., dxexq, dxexq., dtstsfq, dcffixq, dcffixq., diexq, diexq.>: Use FRT, FRA, FRB and FRBp repsectively on DFP quad instructions.
2011-10-06gas/testsuite/Jan Beulich1-57/+124
2011-09-28 Jan Beulich <jbeulich@suse.com> * gas/ppc/476.s: Fix lswi first operand. * gas/ppc/476.d: Adjust expected output. * gas/ppc/a2.s: Fix lswi first operand. * gas/ppc/a2.d: Adjust expected output. * gas/ppc/power6.s: Fix lfdpx first operand. * gas/ppc/power6.d: Adjust expected output. opcodes/ 2011-09-28 Jan Beulich <jbeulich@suse.com> * ppc-opc.c (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX, RBX): New. (insert_bo, insert_boe): Reject bcctr with bit 2 in bo unset. (powerpc_opcodes): Use RAX for second and RBXC for third operand of lswx. Use NBI for third operand of lswi. Use FRTp for first operand of lfdp and lfdpx. Use FRSp for first operand of stfdp and stfdpx, and mark them as invalid on POWER7. Use FRTp, FRAp, and FRBp repsectively on DFP quad instructions.
2011-04-25 * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.Alan Modra1-2/+2
2011-01-21 * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.Alan Modra1-3/+4
2010-08-27opcodes/Nathan Froyd1-4/+4
* ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate on E500 and E500MC.
2010-07-03include/opcode/Alan Modra1-19/+18
* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete. Renumber other PPC_OPCODE defines. gas/ * config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags. (ppc_setup_opcodes): Likewise. Simplify opcode selection. opcodes/ * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags. * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete. (PPC64, MFDEC2): Update. (NON32, NO371): Define. (powerpc_opcode): Update to not use old opcode flags, and avoid -m601 duplicates.
2010-07-03 * ppc-opc.c (PWR2COM): Define.Alan Modra1-11/+12
(PPCPWR2): Add PPC_OPCODE_COMMON. (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.", "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst", "rac" from -mcom.
2010-07-01 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrfAlan Modra1-3/+3
and mtocrf on EFS.
2010-06-14gas/Alan Modra1-75/+82
* config/tc-ppc.c (md_assemble): Emit APUinfo section for PPC_OPCODE_E500. gas/testsuite/ * gas/ppc/e500.s: Add eieio, mbar and lwsync * gas/ppc/e500.d: Likewise. include/opcode/ * ppc.h (PPC_OPCODE_E500): Define. opcodes/ * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and e500x2. Add PPC_OPCODE_E500 to e500 and e500x2 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which touch floating point regs and are enabled by COM, PPC or PPCCOM. Treat sync as msync on e500. Treat eieio as mbar 1 on e500. Treat lwsync as msync on e500.
2010-05-19 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,Alan Modra1-16/+19
divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
2010-05-13Correct wclr encoding.Alan Modra1-4/+4
2010-04-06opcodes/Peter Bergner1-4/+9
* ppc-opc.c (RBOPT): New define. ("dccci"): Enable for PPCA2. Make operands optional. ("iccci"): Likewise. Do not deprecate for PPC476. gas/testsuite/ * gas/ppc/476.d ("dccci", "dci", "iccci"): Add tests. * gas/ppc/476.s: Likewise. * gas/ppc/a2.d ("dccci", "dci", "iccci", "ici"): Add tests. * gas/ppc/a2.s: Likewise.
2010-02-08include/Alan Modra1-141/+163
* opcode/ppc.h (PPC_OPCODE_TITAN): Define. bfd/ * archures.c (bfd_mach_ppc_titan): Define. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add titan entry. opcodes/ * ppc-dis.c (ppc_opts): Add titan entry. * ppc-opc.c (TITAN, MULHW): Define. (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). gas/ * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs. (ppc_mach): Handle titan. * doc/c-ppc.texi: Mention -mtitan. gas/testsuite/ * gas/ppc/titan.d, * gas/ppc/titan.s: New test. * gas/ppc/ppc.exp: Run it.
2009-10-02gas/Peter Bergner1-84/+93
* config/tc-ppc.c (md_show_usage): Document -m476. * doc/c-ppc.texi (PowerPC-Opts): Document -m476. gas/testsuite/ * gas/ppc/476.s: New test. * gas/ppc/476.d: Likewise. * gas/ppc/ppc.exp: Run the 476 test. include/opcode/ * ppc.h (PPC_OPCODE_476): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "476" entry. * ppc-opc.c (PPC476): Define. (powerpc_opcodes): Update mnemonics where required for 476.
2009-10-01gas/Peter Bergner1-1/+1
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2". * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/a2.d: Rename "ppca2" to "a2". include/opcode/ * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2. opcodes/ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2. * ppc-dis.c (ppc_opts): Likewise. Rename "ppca2" to "a2".
2009-09-29opcodes/Peter Bergner1-12/+0
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes. gas/testsuite/ * gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux", "stxvw4ux"): Remove tests. * gas/ppc/vsx.d: Likewise. * gas/ppc/power7.s: Likewise. * gas/ppc/power7.d: Likewise.
2009-09-21gas/Ben Elliston1-85/+126
* config/tc-ppc.c (md_show_usage): Document -mpcca2. * doc/c-ppc.texi (PowerPC-Opts): Document -mppca2. gas/testsuite/ * gas/ppc/a2.s: New. * gas/ppc/a2.d: Likewise. * gas/ppc/ppc.exp: Run the a2 dump test. include/opcode/ * ppc.h (PPC_OPCODE_PPCA2): New. opcodes/ * ppc-dis.c (ppc_opts): Add "ppca2" entry. * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx., eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx, icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx., ici mnemonics. (ERAT_T): New operand. (XWC_MASK): New mask. (XOPL2): New macro. (PPCA2): Define.
2009-09-08 * ppc-opc.c (powerpc_macros <extrdi>): Allow n+b of 64.Alan Modra1-2/+2
2009-04-07opcodes/Peter Bergner1-4/+5
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation. Reorder entries so the extended mnemonics are listed before tlbilx. gas/testsuite/ * gas/ppc/e500mc.d: Update to match extended mnemonics.
2009-04-02opcodes/Peter Bergner1-33/+26
* ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect due to -many/-Many. (print_insn_powerpc): Make sure we only deprecate instructions using the original dialect and not a modified dialect due to -Many handling. Move the handling of the condition register and default operands to the end of the if/else if/else chain. * ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that instructions from newer processors are listed before older ones. <"icblce", "sync", "eieio", "tlbld">: Deprecate for processors that have instructions with conflicting opcodes.
2009-04-02opcodes/Peter Bergner1-2/+1
* ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and E500MC entries.
2009-03-04opcodes/Peter Bergner1-10/+10
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that instructions from newer processors are listed before older ones.
2009-02-26gas/Peter Bergner1-24/+345
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63", "f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63". (parse_cpu): Extend -mpower7 to accept power7 and isel instructions. gas/testsuite/ * gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests. * gas/ppc/e500mc.s: Likewise. * gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests. * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests. ("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.", "divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw", "popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.", "fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.", "fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.", "ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix", "dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx", "stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte", "frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests. * gas/ppc/power7.s: Likewise. * gas/ppc/vsx.d: New test. * gas/ppc/vsx.s: Likewise. * gas/ppc/ppc.exp: Run it. include/opcode/ * ppc.h (PPC_OPCODE_POWER7): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble the power7 and the isel instructions. * ppc-opc.c (insert_xc6, extract_xc6): New static functions. (insert_dm, extract_dm): Likewise. (XB6): Update comment to include XX2 form. (WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK, XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New. (RemoveXX3DM): Delete. (powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr", "mftgpr">: Deprecate for POWER7. <"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte", "frsqrte.">: Deprecate the three operand form and enable the two operand form for POWER7 and later. <"wait">: Extend to accept optional parameter. Enable for POWER7. <"waitsrv", "waitimpl">: Add extended opcodes. <"ldbrx", "stdbrx">: Enable for POWER7. <"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes. <"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde", "divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo", "divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.", "divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.", "fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.", "fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx", "lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes. <"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx", "stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp", "xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds", "xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp", "xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp", "xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp", "xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic", "xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp", "xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp", "xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp", "xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.", "xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp", "xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp", "xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp", "xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp", "xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp", "xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp", "xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp", "xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp", "xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp", "xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi", "xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp", "xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp", "xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp", "xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor", "xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd", "xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-19gas/testsuite/Peter Bergner1-2/+2
* gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a floating point register. opcodes/ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first operand to be a float point register (FRT/FRS).
2009-02-06gas/testsuite/Peter Bergner1-3/+5
* gas/ppc/booke.s ("dcbt", "dcbtst"): New tests. * gas/ppc/booke.d: Likewise. * gas/ppc/power4_32.s: Likewise. * gas/ppc/power4_32.d: Likewise. opcodes/ * ppc-opc.c: Update copyright year. (powerpc_opcodes) <"dcbt", "dcbtst">: Deprecate the Embedded operand ordering for POWER4 and later and use the correct Server ordering.
generated by cgit v1.1 at 2024-12-18 13:15:47 +0000