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path: root/opcodes/mips-opc.c
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2008-11-062008-11-06 Chao-ying Fu <fu@mips.com>Chao-ying Fu1-4/+5
2008-07-07 * mips-opc.c (CP): New macro.Adam Nemet1-19/+22
2008-06-12 * mips.h: Document new field descriptors +Q.Nick Clifton1-0/+4
2008-06-12include/opcode/Nick Clifton1-0/+28
2008-04-29 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 forAdam Nemet1-4/+4
2008-04-28 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1Adam Nemet1-23/+23
2008-02-04 * mips-dis.c: Update copyright.Adam Nemet1-1/+3
2007-11-29 bfd/Mark Shinwell1-36/+271
2007-11-29 include/opcode/Mark Shinwell1-138/+143
2007-10-04opcodes/David Daney1-1/+1
2007-07-05Change source files over to GPLv3.Nick Clifton1-13/+14
2007-02-20 [ gas/ChangeLog ]Thiemo Seufer1-0/+55
2006-06-06 [ gas/ChangeLog ]Thiemo Seufer1-1/+130
2006-05-05 [ gas/ChangeLog ]Thiemo Seufer1-0/+1
2006-05-04[ gas/testsuite/ChangeLog ]Thiemo Seufer1-101/+131
2006-05-032006-05-03 Thiemo Seufer <ths@mips.com>Thiemo Seufer1-1/+1
2006-04-30[ gas/ChangeLog ]Thiemo Seufer1-0/+66
2006-01-26* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,David Ung1-48/+48
2005-09-06* mips-opc.c (MT32): New define.Chao-ying Fu1-4/+62
2005-08-25* mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.Chao-ying Fu1-0/+137
2005-05-07Update the address and phone number of the FSFNick Clifton1-1/+1
2005-03-03update copyright datesAlan Modra1-1/+1
2005-01-21 2005-01-21 Fred Fish <fnf@specifixinc.com>Fred Fish1-13/+13
2005-01-19 2005-01-19 Fred Fish <fnf@specifixinc.com>Fred Fish1-1031/+1031
2004-07-20opcodes/Maciej W. Rozycki1-16/+28
2004-07-20opcodes/Maciej W. Rozycki1-1/+0
2003-11-18* config/tc-mips.c (macro): Handle new macros: "lca" and "dlca"Maciej W. Rozycki1-0/+2
2003-09-30[ bfd/ChangeLog ]Chris Demetriou1-3/+20
2003-01-012002-12-31 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-5/+5
2002-12-31[ gas/ChangeLog ]Chris Demetriou1-0/+4
2002-12-31[ bfd/ChangeLog ]Chris Demetriou1-5/+35
2002-12-18[ opcodes/ChangeLog ]Chris Demetriou1-8/+5
2002-09-30[include/opcode/]Richard Sandiford1-21/+138
2002-08-09* config/tc-mips.c (macro): Handle a register plus a 16-bitMaciej W. Rozycki1-2/+0
2002-07-09 * config/tc-mips.c (macro_build): Handle MIPS16 insns.Thiemo Seufer1-3/+4
2002-05-312002-05-31 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou1-8/+8
2002-05-31[ opcodes/ChangeLog ]Chris Demetriou1-46/+49
2002-05-31[ gas/ChangeLog ]Chris Demetriou1-5/+99
2002-05-21? gas/testsuite/gas/mips/rol64.dThiemo Seufer1-0/+4
2002-03-172002-03-16 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-8/+11
2002-03-16[ gas/ChangeLog ]Chris Demetriou1-1/+73
2002-03-162002-03-15 Chris G. Demetriou <cgd@broadcom.com>Chris Demetriou1-6/+6
2002-03-062002-03-06 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-1/+3
2001-10-23[opcodes/ChangeLog]Chris Demetriou1-2/+2
2001-10-18[gas/testsuite/ChangeLog]Chris Demetriou1-0/+5
2001-08-16Add support for MIPS R1[02]000 performance counter opcodes.Thiemo Seufer1-4/+9
2001-08-16 * mips-opc.c: R3900s can support all branch likely INSN_MACROs whereJonathan Larmour1-18/+18
2001-08-10 * mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32Richard Sandiford1-3/+1
2001-07-212001-07-21 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-4/+4
2001-06-222001-06-22 Eric Christopher <echristo@redhat.com>Eric Christopher1-5/+4
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