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1993-10-05 * mips-opc.c: Correct lwu opcode value (book had it wrong).Ian Lance Taylor1-33/+34
1993-09-02 * mips-opc.c: Change div machine instruction to be z,s,t ratherIan Lance Taylor1-7/+9
than s,t. Change div macro to be d,v,t rather than d,s,t. Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu, rem and remu which generates only the corresponding div instruction. This is for compatibility with the MIPS assembler, which only generates the simple machine instruction when an explicit destination of $0 is used. * mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
1993-09-02 * mips-opc.c: Move div machine instruction after macro forms.Ian Lance Taylor1-8/+17
Change d,s,t form to d,v,t. Likewise for divu, ddiv and ddivu. This is for compatibility with the MIPS assembler, which only generates the simple machine instruction when an explicit destination of $0 is used.
1993-08-27 * mips-opc.c: From davidj@ICSI.Berkeley.EDU (David Johnson): SetIan Lance Taylor1-4/+4
WR_31 hazard for bal, bgezal, bltzal.
1993-08-20 * mips-opc.c: Added r6000 and r4000 instructions and macros.Ian Lance Taylor1-26/+212
Changed hazard information to distinguish between memory load delays and coprocessor load delays.
1993-08-18 * mips-opc.c: li.d uses "T,L", not "S,F". Added li.s.Ian Lance Taylor1-0/+380