aboutsummaryrefslogtreecommitdiff
path: root/opcodes/microblaze-opcm.h
AgeCommit message (Collapse)AuthorFilesLines
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-19PR25277, microblaze opcode enumeration vs ISO/IEC TS 18661-3:2015Dr N.W. Filardo1-1/+1
fadd, fmul, and fdiv are now, by ISO/IEC TS 18661-3:2015, defined to refer to functions from the runtime subsystem. PR 25277 * microblaze-opcm.h (enum microblaze_instr): Prefix fadd, fmul and fdiv with "mbi_". * microblaze-opc.h (opcodes): Adjust to suit.
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-8/+8
2015-02-10opcodes/microblaze: Rename 'or', 'and', 'xor' to avoid C++ conflictPedro Alves1-1/+3
Building GDB as a C++ program, we see: In file included from gdb/microblaze-tdep.c:37:0: gdb/../opcodes/../opcodes/microblaze-opcm.h: At global scope: gdb/../opcodes/../opcodes/microblaze-opcm.h:32:51: error: expected identifier before ‘or’ token ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor, ^ gdb/../opcodes/../opcodes/microblaze-opcm.h:32:51: error: expected ‘}’ before ‘or’ token gdb/../opcodes/../opcodes/microblaze-opcm.h:32:51: error: expected unqualified-id before ‘or’ token gdb/../opcodes/../opcodes/microblaze-opcm.h:60:1: error: expected declaration before ‘}’ token }; ^ opcodes/ChangeLog: 2015-02-10 Pedro Alves <palves@redhat.com> Tom Tromey <tromey@redhat.com> * microblaze-opcm.h (or, and, xor): Rename to microblaze_or, microblaze_and, microblaze_xor. * microblaze-opc.h (opcodes): Adjust.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-1/+1
2012-11-21Add swap byte (swapb) and swap halfword (swaph) opcodes.Michael Eager1-1/+1
binutils/opcodes * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES. * microblaze-opcm.h (microblaze_instr): Likewise binutils/gas/testsuite * gas/microblaze/allinsn.s: Add swapb, swaph * gas/microblaze/allinsn.d: Likewise
2012-11-21Add stack high register and stack low register for MicroBlazeMichael Eager1-0/+4
hardware assisted stack protection, stores stack low / stack high limits for detecting stack overflow / underflow binutils/opcodes * microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR * microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK binutils/gas * config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR binutils/gas * gas/microblaze/allinsn.s: Test use of SHR, SLR * gas/microblaze/allinsn.d: Likewise
2012-11-14opcodes/Michael Eager1-1/+5
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5, update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5, and increase MAX_OPCODES. (op_code_struct): add mbar and sleep * microblaze-opcm.h (microblaze_instr): add mbar Define IMM_MBAR and IMM5_MBAR_MASK * microblaze-dis.c: Add get_field_imm5_mbar (print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE gas/ * config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5 gas/testsuite/ * gas/microblaze/allinsn.s: Add mbar and sleep * gas/microblaze/allinsn.d: Likewise
2012-11-14Add clz opcode.Michael Eager1-1/+1
opcodes/ * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn * microblaze-opcm.h (microblaze_instr): add clz gas/testsuite/ * gas/microblaze/allinsn.s: Add clz insn * gas/microblaze/allinsn.d: Likewise
2012-11-14Add the endian reversing versions of load/store instructions;Michael Eager1-1/+2
2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com> * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur, lhur, lwr, sbr, shr, swr * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr, swr 2012-11-14 David Holsgrove <david.holsgrove@xilinx.com> * gas/microblaze/allinsn.exp: New file - test newly added opcodes * gas/microblaze/allinsn.s: Likewise * gas/microblaze/allinsn.d: Likewise
2009-08-06 Add support for Xilinx MicroBlaze processor.Nick Clifton1-0/+139
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
generated by cgit v1.1 at 2024-11-20 04:37:16 +0000