Age | Commit message (Collapse) | Author | Files | Lines |
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The calculation of the shift amount, used to insert fields into the
instruction buffer, is not correct when the following conditions are all
true:
- CGEN_INT_INSN_P is defined, and true.
- CGEN_INSN_LSB0_P is true
- Total instruction length is greater than the length of a single
instruction word (the instruction is made of multiple words)
- The word offset is non-zero (the field is outside the first word)
When the above conditions are all true, the calculated shift fails to
take account of the total instruction length.
After this commit the calculation of the shift amount is split into two
parts, first we calculate the shift required to get to BIT0 of the word
in which the field lives, then we calculate the shift required to place
the field within the instruction word.
The change in this commit only effects the CGEN_INT_INSN_P defined true
case, but changes the code for both CGEN_INSN_LSB0_P true, and false.
In the case of CGEN_INSN_LSB0_P being false, the code used to say:
shift = total_length - (word_offset + start + length);
Now it says:
shift_to_word = total_length - (word_offset + word_length);
shift_within_word = word_length - start - length;
shift = shift_to_word + shift_within_word;
From which we can see that in all cases the computed shift value should
be unchanged.
In the case of CGEN_INSN_LSB0_P being true, the code used to say:
shift = (word_offset + start + 1) - length;
Now it says:
shift_to_word = total_length - (word_offset + word_length);
shift_within_word = start + 1 - length;
shift = shift_to_word + shift_within_word;
In the case where 'total_length == word_length' AND 'word_offset ==
0' (which indicates an instruction of a single word), we see that the
computed shift value will be unchanged. However, when the total_length
and word_length are different, and the word_offset is non-zero then the
computed shift value will be different (and correct).
opcodes/ChangeLog:
* cgen-ibld.in (insert_normal): Rework calculation of shift.
* epiphany-ibld.c: Regenerate.
* fr30-ibld.c: Regenerate.
* frv-ibld.c: Regenerate.
* ip2k-ibld.c: Regenerate.
* iq2000-ibld.c: Regenerate.
* lm32-ibld.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32r-ibld.c: Regenerate.
* mep-ibld.c: Regenerate.
* mt-ibld.c: Regenerate.
* or1k-ibld.c: Regenerate.
* xc16x-ibld.c: Regenerate.
* xstormy16-ibld.c: Regenerate.
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* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
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* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
(f-dsp-40-u20, f-dsp-40-u24): Ditto.
opcodes/
* cgen-ibld.in: #include "cgen/basic-modes.h".
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
* xstormy16-ibld.c: Regenerate.
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* cgen-dis.in: Update copyright year.
* cgen-ibld.in: Update copyright year.
* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
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* intrinsics.scm: Updates to support IVC2.
(belongs-to-group?): Check IVC2 slots.
(-slots-attribute): New.
(targets::attributes): Add SLOTS.
(target:add-well-known-intrinsics): Add CPMOV.
(md-insn): Add CPTYPE and CRET?.
(add-md-insn): Likewise.
(add-intrinsic-for-isa): Disable the duplicate tests, as IVC2 has
duplicate insns with different bit patterns.
(write-cgen-insn?): Add cret? support.
(intrinsics.h): Add vector types.
(runtime-op): Add vector support.
(intrinsic-protos.h): Let GCC define its types. Add cret? support.
* cpu/mep-core.cpu: Add CPTYPE and CRET attributes.
* cpu/mep-ivc2.cpu: Update all insns to include type information.
(h-cr-ivc2): Default to typeless.
(h-ccr-ivc2): Fix register width.
(SLOTS): Fix values and default.
(ivc2_*): Add control register names.
(crop, crqp, crpp, croc, crqc, crpc): Default to typeless.
[opcodes]
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
[sid/component/cgen-cpu/mep]
* ivc2-cop.cxx (ivc2_cphadd_w): Change to return value.
(ivc2_cpsubaca0u_b): Remove debug line.
* ivc2-cpu.h (ivc2_cpccadd_b): Change to return value.
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-decode.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
* mep-core1-decode.cxx: Regenerate.
* mep-cpu.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-desc.h: Regenerate.
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* cpu/mep-ivc2.cpu (h-ccr-ivc2): Enable for C3 slots, fix
accumulator names.
(f-ivc2-ccrn-c3hi): New.
(f-ivc2-ccrn-c3lo): New.
(f-ivc2-ccrn-c3): New.
(ivc2c3ccrn): Use it.
[sid/component/cgen-cpu/mep]
* mep-cop1-32-decode.cxx: Regenerate.
* mep-cop1-32-decode.h: Regenerate.
* mep-cop1-32-sem.cxx: Regenerate.
* mep-cop1-48-sem.cxx: Regenerate.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
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* cpu/mep.opc (mep_examine_ivc2_insns): Fix bug in ivc2 decoder.
(mep_config_map): Regenerate.
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Add generic names as well as
ivc2-specific names.
(simm8p20): New.
(cmovc): move to after field definitions, use ivc2-specific
register names.
(cpmovi_b_P0S_P1): New.
[utils/mep]
* mepcfgtool.c (do_cgen_config_opc): Propagate endianness and VLIW
size to default configuration.
[sid/component/cgen-cpu/mep]
* mep-cop1-16-decode.cxx: Regenerate.
* mep-cop1-16-decode.h: Regenerate.
* mep-cop1-16-model.cxx: Regenerate.
* mep-cop1-16-model.h: Regenerate.
* mep-cop1-16-sem.cxx: Regenerate.
* mep-cop1-64-decode.cxx: Regenerate.
* mep-cop1-64-decode.h: Regenerate.
* mep-cop1-64-model.cxx: Regenerate.
* mep-cop1-64-model.h: Regenerate.
* mep-cop1-64-sem.cxx: Regenerate.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
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* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
Index: gas
* config/tc-mep.c (md_begin): Check coprocessor type.
(md_check_parallel64_scheduling): Use memset to initialize the buffer.
(md_check_parallel32_scheduling): Likewise.
(slot_ok): New.
(mep_check_ivc2_scheduling): New.
(mep_check_parallel_scheduling): Call it.
(mep_process_saved_insns): Add IVC2 slot support.
(md_assemble): Likewise.
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* cpu/mep-c5.cpu (f-12s20): Change to signed.
(lhucpm1): Limit to C5 mach.
(dsp0,dsp1): Rewrite as aliases so that intrinsics are generated.
* cpu/mep-core.cpu (extend-cdisp10): New.
(f-cdisp10): Change to signed, use extend-cdisp10 to sign extend.
[opcodes]
* mep-desc.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
[sid/component/cgen-cpu/mep]
* mep-core1-decode.cxx: Regenerate.
* mep-core1-decode.h: Regenerate.
* mep-decode.cxx: Regenerate.
* mep-decode.h: Regenerate.
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* cpu/mep-c5.cpu: New.
* cpu/mep-core.cpu: Add C5 support.
* cpu/mep.opc: Likewise.
[opcodes]
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
[sid]
* component/cache/cache.cxx (cache_component::cache_component):
Add write_hint_pin(). Attach it to write-hint.
(cache_component::write_hint): New.
* component/cache/cache.h (write_hint_pin): New.
(write_hint): New.
* component/cgen-cpu/mep/Makefile.am: Regenerate.
* component/cgen-cpu/mep/Makefile.in: Regenerate.
* component/cgen-cpu/mep/mep-core1-decode.cxx: Regenerate.
* component/cgen-cpu/mep/mep-core1-decode.h: Regenerate.
* component/cgen-cpu/mep/mep-core1-defs.h: Regenerate.
* component/cgen-cpu/mep/mep-core1-model.cxx: Regenerate.
* component/cgen-cpu/mep/mep-core1-model.h: Regenerate.
* component/cgen-cpu/mep/mep-core1-sem.cxx: Regenerate.
* component/cgen-cpu/mep/mep-decode.cxx: Regenerate.
* component/cgen-cpu/mep/mep-decode.h: Regenerate.
* component/cgen-cpu/mep/mep-defs.h: Regenerate.
* component/cgen-cpu/mep/mep-desc.h: Regenerate.
* component/cgen-cpu/mep/mep-model.cxx: Regenerate.
* component/cgen-cpu/mep/mep-model.h: Regenerate.
* component/cgen-cpu/mep/mep-sem.cxx: Regenerate.
* component/cgen-cpu/mep/mep.cxx (mep_cpu): Connect
write-hint pin.
(do_cache): Add C5 support.
(do_cache_prefetch): Likewise.
(do_casb3, do_cash3, do_casw3): New.
* component/cgen-cpu/mep/mep.h: Add C5 support and write-hint pin.
(do_casb3, do_cash3, do_casw3): New.
* component/families/mep/Makefile.in: Regenerate.
* component/families/mep/dsu.in: Add C5 support.
* main/dynamic/mainDynamic.cxx: Add C5 support.
* main/dynamic/mepCfg.cxx: Connect write-hint pin.
* main/dynamic/mepCfg.h: Add C5 support.
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* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
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* mep-*: New support for Toshiba Media Processor (MeP).
* Makefile.am: Add support for MeP.
* configure.in: Likewise.
* disassemble.c: Likewise.
* Makefile.in: Regenerated.
* configure: Regenerated.
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