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* m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction.
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coldfire moveb instruction to not allow an address register as
destination. Although the documentation does not indicate that
this is invalid, experiments uncovered unexpected behavior.
Added a comment explaining the situation. Thanks to Andreas
Schwab for pointing this out to me.
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* m68k-opc.c (m68k_opcodes): add b, w, or l specifier to coldfire
move insns to handle immediate operands.
From Andreas Schwab:
* m68k-opc.c (m68k_opcodes): Delete duplicate entry for "cmpil".
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specifiers.
* m68k-opc.c (m68k_opcodes): Simplify table by using < and >
operand specifiers in fmovm* instructions.
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the coldfire.
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instruction for the coldfire.
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register operands for immediate arithmetic, not, neg, negx, and
set according to condition instructions.
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specifier of the effective-address operand in immediate forms of
arithmetic instructions. The specifier for the immediate operand
notes how and where the constant will be stored.
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<schwab@issan.informatik.uni-dortmund.de>
* m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire
move ccr/sr insns more strict so that the disassembler only
selects them when the addressing mode is data register.
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* m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating
to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab.
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* m68k-dis.c (print_insn_arg): Handle new 'W' place.
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and likewise for all the dbxx opcodes.
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and likewise for the other branches. Add bhs as an alias for bcc,
and likewise for the size variants. Add dbhs as an alias for
dbcc.
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