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2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-02-02opcodes/cgen: Rework calculation of shift when inserting fieldsAndrew Burgess1-3/+10
The calculation of the shift amount, used to insert fields into the instruction buffer, is not correct when the following conditions are all true: - CGEN_INT_INSN_P is defined, and true. - CGEN_INSN_LSB0_P is true - Total instruction length is greater than the length of a single instruction word (the instruction is made of multiple words) - The word offset is non-zero (the field is outside the first word) When the above conditions are all true, the calculated shift fails to take account of the total instruction length. After this commit the calculation of the shift amount is split into two parts, first we calculate the shift required to get to BIT0 of the word in which the field lives, then we calculate the shift required to place the field within the instruction word. The change in this commit only effects the CGEN_INT_INSN_P defined true case, but changes the code for both CGEN_INSN_LSB0_P true, and false. In the case of CGEN_INSN_LSB0_P being false, the code used to say: shift = total_length - (word_offset + start + length); Now it says: shift_to_word = total_length - (word_offset + word_length); shift_within_word = word_length - start - length; shift = shift_to_word + shift_within_word; From which we can see that in all cases the computed shift value should be unchanged. In the case of CGEN_INSN_LSB0_P being true, the code used to say: shift = (word_offset + start + 1) - length; Now it says: shift_to_word = total_length - (word_offset + word_length); shift_within_word = start + 1 - length; shift = shift_to_word + shift_within_word; In the case where 'total_length == word_length' AND 'word_offset == 0' (which indicates an instruction of a single word), we see that the computed shift value will be unchanged. However, when the total_length and word_length are different, and the word_offset is non-zero then the computed shift value will be different (and correct). opcodes/ChangeLog: * cgen-ibld.in (insert_normal): Rework calculation of shift. * epiphany-ibld.c: Regenerate. * fr30-ibld.c: Regenerate. * frv-ibld.c: Regenerate. * ip2k-ibld.c: Regenerate. * iq2000-ibld.c: Regenerate. * lm32-ibld.c: Regenerate. * m32c-ibld.c: Regenerate. * m32r-ibld.c: Regenerate. * mep-ibld.c: Regenerate. * mt-ibld.c: Regenerate. * or1k-ibld.c: Regenerate. * xc16x-ibld.c: Regenerate. * xstormy16-ibld.c: Regenerate.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-4/+4
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-2/+1
2010-07-03* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.DJ Delorie1-2/+2
* m32c-ibld.c: Regenerate.
2010-01-07 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.Doug Evans1-3/+3
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2010-01-06 cpu/Doug Evans1-128/+129
* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. (f-dsp-40-u20, f-dsp-40-u24): Ditto. opcodes/ * cgen-ibld.in: #include "cgen/basic-modes.h". * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2010-01-02 * cgen-asm.in: Update copyright year.Doug Evans1-1/+1
* cgen-dis.in: Update copyright year. * cgen-ibld.in: Update copyright year. * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c, * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c, * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h, * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c, * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c, * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c, * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c, * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h, * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h, * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c, * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c, * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c, * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h, * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c, * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c, * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c, * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c, * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c, * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c, * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2009-01-20Regenerate for copyright date update.Alan Modra1-2/+2
2007-07-05Change source files over to GPLv3.Nick Clifton1-8/+8
2007-03-21* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,DJ Delorie1-0/+73
mem20): New. (src16-16-20-An-relative-*): New. (dst16-*-20-An-relative-*): New. (dst16-16-16sa-*): New (dst16-16-16ar-*): New (dst32-16-16sa-Unprefixed-*): New (jsri): Fix operands. (setzx): Fix encoding. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.h: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
2006-03-14* m32c-asm.c: Regenerate.DJ Delorie1-0/+37
* m32c-desc.c: Likewise. * m32c-desc.h: Likewise. * m32c-dis.c: Likewise. * m32c-ibld.c: Likewise. * m32c-opc.c: Likewise. * m32c-opc.h: Likewise.
2006-03-05* cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bitNick Clifton1-4/+12
value into an unsigned 32-bit field when the host is a 64-bit machine.
2006-01-03* cgen-ibld.in (extract_normal): Avoid memory range errors.DJ Delorie1-4/+3
* m32c-ibld.c: Regenerated.
2005-10-27* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.DJ Delorie1-0/+36
(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which imm operand is needed. (adjnz, sbjnz): Pass the right operands. (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, unary-insn): Add -g variants for opcodes that need to support :G. (not.BW:G, push.BW:G): Call it. (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, stzx16-imm8-imm8-abs16): Fix operand typos. * m32c.opc (m32c_asm_hash): Support bnCND. (parse_signed4n, print_signed4n): New. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
2005-10-26* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.DJ Delorie1-0/+27
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): dsp8[sp] is signed. (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). (mov.BW:S r0,r1): Fix typo r1l->r1. (tst): Allow :G suffix. * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
2005-10-25* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width byDJ Delorie1-14/+0
making one a macro of the other. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
2005-10-22[cpu]DJ Delorie1-0/+14
* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, indexld, indexls): .w variants have `1' bit. (rot32.b): QI, not SI. (rot32.w): HI, not SI. (xchg16): HI for .w variant. [opcodes] * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate.
2005-07-18Fix building for MS1 and M32C.Nick Clifton1-82/+87
Restore alpha- sorting to the architecture tables.
2005-07-14ChangeLog:Jim Blandy1-0/+5104
2005-07-14 Jim Blandy <jimb@redhat.com> * configure.in: Add cases for Renesas m32c. * configure: Regenerated. bfd/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for m32c-*-elf (Renesas m32c and m16c). * Makefile.am (ALL_MACHINES): Add cpu-m32c.lo. (ALL_MACHINES_CFILES): Add cpu-m32c.c. (BFD32_BACKENDS): Add elf32-m32c.lo. (BFD32_BACKENDS_CFILES): Add elf32-m32c.c. (cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'. * Makefile.in: Regenerated. * archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New arch and mach codes. (bfd_m32c_arch): New arch info object. (bfd_archures_list): List bfd_m32c_arch. * bfd-in2.h: Regenerated. * config.bfd: Add case for the m32c. * configure.in: Add case for the m32c. * configure: Regenerated. * cpu-m32c.c, elf32-m32c.c: New files. * libbfd.h: Regenerated. * targets.c (bfd_elf32_m32c_vec): Declare. (_bfd_target_vector): List bfd_elf32_m32c_vec. binutils/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * readelf.c: #include "elf/m32c.h" (guess_is_rela, dump_relocations, get_machine_name): Add cases for EM_M32C. * Makefile.am (readelf.o): Update dependencies. * Makefile.in: Regenerated. cpu/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. gas/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C. * Makefile.am (CPU_TYPES): List m32c. (TARGET_CPU_CFILES): List config/tc-m32c.c. (TARGET_CPU_HFILES): List config/tc-m32c.h. * configure.in: Add case for m32c. * configure.tgt: Add cases for m32c and m32c-*-elf. * configure: Regenerated. * config/tc-m32c.c, config/tc-m32c.h: New files. * doc/Makefile.am (CPU_DOCS): Add c-m32c.texi. * doc/Makefile.in: Regenerated. * doc/all.texi: Set M32C. * doc/as.texinfo: Add text for the M32C-specific options and line comment characters, and refer to c-m32c.texi. * doc/c-m32c.texi: New file. include/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> * dis-asm.h (print_insn_m32c): New declaration. include/elf/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for Renesas M32C and M16C. * common.h (EM_M32C): New machine number. * m32c.h: New file. ld/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o. (eelf32m32c.c): New target. * Makefile.in: Regenerated. * configure.tgt: Add case for m32c-*-elf. * emulparams/elf32m32c.sh: New file. opcodes/ChangeLog: 2005-07-14 Jim Blandy <jimb@redhat.com> Add support for the Renesas M32C and M16C. * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. * m32c-desc.h, m32c-opc.h: New. * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c. (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo, m32c-opc.lo. (CLEANFILES): List stamp-m32c. (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. (CGEN_CPUS): Add m32c. (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. (m32c_opc_h): New variable. (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) (m32c-opc.lo): New rules. * Makefile.in: Regenerated. * configure.in: Add case for bfd_m32c_arch. * configure: Regenerated. * disassemble.c (ARCH_m32c): New. [ARCH_m32c]: #include "m32c-desc.h". (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. (disassemble_init_for_target) [ARCH_m32c]: Same. * cgen-ops.h, cgen-types.h: New files. * Makefile.am (HFILES): List them. * Makefile.in: Regenerated.
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