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2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-1/+1
2013-05-17 * ia64-raw.tbl: Replace non-ASCII char.Alan Modra1-5/+5
* ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerate.
2012-09-04Add Intel Itanium Series 9500 supportH.J. Lu1-7294/+9195
bfd/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * cpu-ia64-opc.c (ins_cnt6a): New function. (ext_cnt6a): Ditto. (ins_strd5b): Ditto. (ext_strd5b): Ditto. (elf64_ia64_operands): Add new operand types. gas/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * config/tc-ia64.c (reg_symbol): Add a new register. (indirect_reg): Ditto. (pseudo_func): Add new symbolic constants. (operand_match): Add new operand types recognition. (operand_insn): Add new register recognition. (md_begin): Add new register definition. (specify_resource): Add new register recognition. gas/testsuite/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * gas/testsuite/gas/ia64/psn.d: New file. * gas/testsuite/gas/ia64/psn.s: New file. * gas/testsuite/gas/ia64/ia64.exp: Add new testcase. * gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests. * gas/testsuite/gas/ia64/opc-m.d: Ditto. include/opcode/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64.h (ia64_opnd): Add new operand types. opcodes/ 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> * ia64-asmtab.h (completer_index): Extend bitfield to full uint. * ia64-gen.c: Promote completer index type to longlong. (irf_operand): Add new register recognition. (in_iclass_mov_x): Add an entry for the new mov_* instruction type. (lookup_specifier): Add new resource recognition. (insert_bit_table_ent): Relax abort condition according to the changed completer index type. (print_dis_table): Fix printf format for completer index. * ia64-ic.tbl: Add a new instruction class. * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions. * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions. * ia64-opc.h: Define short names for new operand types. * ia64-raw.tbl: Add new RAW resource for DAHR register. * ia64-waw.tbl: Add new WAW resource for DAHR register. * ia64-asmtab.c: Regenerate.
2008-08-28gas/H.J. Lu1-827/+830
2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (CR_IIB0): New. (CR_IIB1): Likewise. (cr): Add cr.iib0 and cr.iib1. (specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1. gas/testsuite/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/regs.s: Likewise. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/regs.d: Likewise. include/opcode/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update IA64_RS_CR. opcodes/ 2008-08-28 H.J. Lu <hongjiu.lu@intel.com> * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1. * ia64-gen.c (lookup_specifier): Likewise. * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated.
2007-11-14gas/H.J. Lu1-547/+549
2007-11-14 Tristan Gingold <gingold@adacore.com> * config/tc-ia64.c (AR_RUC): Defined. (ar): Add "ar.ruc". (specify_resource): Handle AR_RUC like AR_ITC. gas/testsuite/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add tests for ar.ruc. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/invalid-ar.s: Likewise. * gas/ia64/regs.s: Add tests for ar.ruc and ar44. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/dv-waw-err.l: Likewise. * gas/ia64/invalid-ar.l: Likewise. * gas/ia64/regs.d: Likewise. opcodes/ 2007-11-14 H.J. Lu <hongjiu.lu@intel.com> * ia64-ic.tbl: Updated for Itanium 9100 series. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. 2007-11-14 Tristan Gingold <gingold@adacore.com> * ia64-dis.c (print_insn_ia64): Handle ar.ruc. * ia64-gen.c (lookup_regindex): Likewise.
2007-08-03Fix resource dependency problems for xmpy.Jim Wilson1-4/+4
2007-07-05Change source files over to GPLv3.Nick Clifton1-0/+18
2006-02-23bfd/H.J. Lu1-4791/+4901
2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * cpu-ia64-opc.c (ins_immu5b): New. (ext_immu5b): Likewise. (elf64_ia64_operands): Add IMMU5b. gas/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. gas/testsuite/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/opc-i.s: Add tests for tf. * gas/ia64/pseudo.s: Likewise. * gas/ia64/opc-i.d: Updated. * gas/ia64/pseudo.d: Likewise. include/opcode/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64.h (ia64_opnd): Add IA64_OPND_IMMU5b. opcodes/ 2006-02-23 H.J. Lu <hongjiu.lu@intel.com> * ia64-opc-i.c (bXc): New. (mXc): Likewise. (OpX2TaTbYaXcC): Likewise. (TF). Likewise. (TFCM). Likewise. (ia64_opcodes_i): Add instructions for tf. * ia64-opc.h (IMMU5b): New. * ia64-asmtab.c: Regenerated.
2006-02-23gas/H.J. Lu1-4363/+4449
2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-ia64.c (specify_resource): Add the rule 17 from SDM 2.2. gas/testsuite/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * gas/ia64/dv-raw-err.s: Add check for vmsw.0. * gas/ia64/dv-raw-err.l: Updated. * gas/ia64/opc-b.s: Add vmsw.0 and vmsw.1. * gas/ia64/opc-b.d: Updated. opcodes/ 2006-02-22 H.J. Lu <hongjiu.lu@intel.com> * ia64-gen.c (lookup_regindex): Handle ".vm". (print_dependency_table): Handle '\"'. * ia64-ic.tbl: Updated from SDM 2.2. * ia64-raw.tbl: Likewise. * ia64-waw.tbl: Likewise. * ia64-asmtab.c: Regenerated. * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
2005-10-24include/opcode/Jan Beulich1-82/+82
2005-10-24 Jan Beulich <jbeulich@novell.com> * ia64.h (enum ia64_opnd): Move memory operand out of set of indirect operands. bfd/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of set of indirect operands. gas/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (enum reg_symbol): Delete IND_MEM. (dot_rot): Change type of num_* variables. Check for positive count. (ia64_optimize_expr): Re-structure. (md_operand): Check for general register. gas/testsuite/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * gas/ia64/index.[sl]: New. * gas/ia64/rotX.[sl]: New. * gas/ia64/ia64.exp: Run new tests. opcodes/ 2005-10-24 Jan Beulich <jbeulich@novell.com> * ia64-asmtab.c: Regenerate.
2005-02-22 * arc-ext.c: Warning fixes.Alan Modra1-252/+252
* arc-ext.h: Likewise. * cgen-opc.c: Likewise. * ia64-gen.c: Likewise. * maxq-dis.c: Likewise. * ns32k-dis.c: Likewise. * w65-dis.c: Likewise. * ia64-asmtab.c: Regenerate.
2005-01-31gas/Jan Beulich1-4918/+5886
2005-01-31 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (parse_operands): Also handle alloc without first input being ar.pfs. gas/testsuite/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * gas/ia64/pseudo.[ds]: New. * gas/ia64/ia64.exp: Run new test. opcodes/ 2005-01-31 Jan Beulich <jbeulich@novell.com> * ia64-gen.c (NELEMS): Define. (shrink): Generate alias with missing second predicate register when opcode has two outputs and these are both predicates. * ia64-opc-i.c (FULL17): Define. (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17 here to generate output template. (TBITCM, TNATCM): Undefine after use. * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as first input. Add ld16 aliases without ar.csd as second output. Add st16 aliases without ar.csd as second input. Add cmpxchg aliases without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/ ar.ccv as third/fourth inputs. Consolidate through... (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8, CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define. * ia64-asmtab.c: Regenerate.
2004-06-30Correctly assemble mov rX=imm.Jim Wilson1-2103/+2099
* ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds. * ia64-asmtab.c: Regnerate.
2004-06-08opcodes/Jakub Jelinek1-290/+342
* ia64-gen.c (in_iclass): Handle more postinc st and ld variants. * ia64-asmtab.c: Rebuilt. gas/testsuite/ * gas/ia64/dv-raw-err.s: Add some new postinc tests. * gas/ia64/dv-raw-err.l: Updated.
2003-04-08* ia64-ic.tbl (fr-readers): Add mem-writers-fp.Nick Clifton1-84/+91
* ia64-asmtab.c: Regenerate. * gas/ia64/dependency-1.s: New file: Test read before write dependency. * gas/ia64/dependency-1.d: New file: Expected assembly results. * gas/ia64/ia64.exp: Run the new test.
2002-12-05Patch to update IA-64 port to SDM 2.1.Jim Wilson1-5835/+5950
bfd/ChangeLog * cpu-ia64-opc.c: Add operand constant "ar.csd". gas/ChangeLog * config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint" instruction. (emit_one_bundle): Handle "hint" instruction. (operand_match): Match IA64_OPND_AR_CSD. gas/testsuite/ChangeLog * gas/ia64/opc-b.d: Update for instructions added by SDM2.1. * gas/ia64/opc-b.s: Ditto. * gas/ia64/opc-f.d: Ditto. * gas/ia64/opc-f.s: Ditto. * gas/ia64/opc-i.d: Ditto. * gas/ia64/opc-i.s: Ditto. * gas/ia64/opc-m.d: Ditto. * gas/ia64/opc-m.s: Ditto. * gas/ia64/opc-x.d: Ditto. * gas/ia64/opc-x.s: Ditto. include/opcode/ChangeLog * ia64.h: Fix copyright message. (IA64_OPND_AR_CSD): New operand kind. opcodes/ChangeLog * ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction. * ia64-opc-b.c: Add "hint.b" instruction. * ia64-opc-f.c: Add "hint.f" instruction. * ia64-opc-i.c: Add "hint.i" instruction. * ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and "cmp8xchg16" instructions. * ia64-opc-x.c: Add "hint.x" instruction. * ia64-opc.h (AR_CSD): New macro. * ia64-ic.tbl: Update according to SDM2.1. * ia64-raw.tbl: Ditto. * ia64-waw.tbl: Ditto. * ia64-gen.c (in_iclass): Handle "hint" like "nop". (lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD], AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR]. * ia64-asmtab.c: Regenerate.
2002-12-03include/opcode/Richard Henderson1-3351/+3354
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV. bfd/ * cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry. opcodes/ * ia64-opc-m.c: Add ld8.mov. * ia64-asmtab.c: Regenerate. gas/ * config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case. gas/testsuite/ * gas/ia64/ldxmov-1.[ds]: New. * gas/ia64/ldxmov-2.[ls]: New. * gas/ia64/ia64.exp: Run them.
2002-11-07Convert ia64-gen to use getopt(). Add standard GNU options plus --srcdir.Nick Clifton1-2/+2
Convert Makefile.am to pass --srcdir to ia64-gen. Fix compile time warnings.
2002-07-172002-07-17 David Mosberger <davidm@hpl.hp.com>H.J. Lu1-546/+547
* ia64-opc-b.c (bWhc): New macro. (mWhc): Ditto. (OpPaWhcD): Ditto. (ia64_opcodes_b): Correct patterns for indirect call instructions to use 3-bit "wh" field. * ia64-asmtab.c: Regnerate.
2001-03-20Fix 2 bugs with parsing the resource dependency tables.Jim Wilson1-393/+411
* ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and notestr if larger than xsect. (in_class): Handle format M5. * ia64-asmtab.c: Regnerate.
2001-02-232001-02-23 David Mosberger <davidm@hpl.hp.com>H.J. Lu1-3423/+3547
* ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4". * ia64-asmtab.c: Regenerate.
2001-02-22Improve gas error messages for invalid instructions.Jim Wilson1-3901/+3903
* cpu-ia64-opc.c (elf64_ia64_operands}: Fix typo: error string for C8 said "1" instead of "8". Clarify error string for IMM22: "signed integer" instead of just "integer". * config/tc-ia64.c (enum operand_match_result): New type. (operand_match): Change return type to operand_match_result. Fix all returns appropriately, adding support for returning the out-of-range result. (parse_operands): New locals result, error_pos, out_of_range_pos, curr_out_of_range_pos. Rewrite operand matching loop to give better error messages. * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two separate variants: one for IMM22 and the other for IMM14. * ia64-asmtab.c: Regenerate.
2001-02-14Fix DV bug reported by Intel against the setf instruction.Jim Wilson1-3/+3
* ia64-ic.tbl: Update from Intel. Add setf to fr-writers. * ia64-asmtab.c: Regenerate.
2001-02-06Revert accidental breakage from Nick's 2000-12-16 checkin.Jim Wilson1-392/+392
* ia64-asmtab.c: Revert 2000-12-16 change.
2000-12-16Regenerate filesNick Clifton1-392/+392
2000-12-12Eliminate ia64 compiler warnings. Fix ia64 gas testsuite again.Jim Wilson1-699/+699
* elfxx-ia64.c (get_dyn_sym_info): Cast %p argument to void *. * config/tc-ia64.h (ia64_init): Add prototype. * gas/ia64/dv-imply.d, gas/ia64/dv-mutex.d, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/opc-m.d: Update. * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode argument. * ia64_gen.c (insert_deplist): Cast sizeof result to int. (print_dependency_table): Print NULL if semantics field not set. (insert_opcode_dependencies): Mark cmp parameter as unused. (print_main_table): Use fprintf_vma to print long long fields. (main): Mark argv paramter as unused. Convert to old style definition. * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int. * ia64-asmtab.c: Regnerate.
2000-10-05Minor DV table update, minor DV checking bug fix.Jim Wilson1-10/+13
* config/tc-ia64.c (resources_match): Handle IA64_RS_PRr. * ia64-ic.tbl: Update from Intel. * ia64-asmtab.c: Regenerate.
2000-09-22Add missing fpcmp instructions, and add missing fcmp/fpcmp tests.Jim Wilson1-3244/+3285
* gas/ia64/opc-f.pl: Add missing fcmp and fpcmp tests. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for gt, ge, ngt, and nge. * ia64-asmtab.c: Regenerate.
2000-09-22Fix ia64 gas testsuite. Update ia64 DV tables. Fix ia64 gas testsuite again.Jim Wilson1-2583/+2611
gas/ChangeLog * config/tc-ia64.c (dv_sem): Add "stop". (specify_resource, case IA64_RS_PR): Only handles regs 1 to 15 now. (specify_resource, case IA64_RS_PRr): New for regs 16 to 62. (specify_resource, case IA64_RS_PR63): Reorder (note == 7) test to match above. (mark_resources): Check IA64_RS_PRr. gas/testsuite/ChangeLog * gas/ia64/dv-raw-err.s: Add new testcases for PR%, 16 - 62. * gas/ia64/dv-waw-err.s: Likewise. * gas/ia64/dv-imply.d: Regenerate. * gas/ia64/dv-mutex.d, gas/ia64/dv-raw-err.l, gas/ia64/dv-safe.d, gas/ia64/dv-srlz.d, gas/ia64/dv-war-err.l, gas/ia64/dv-waw-err.l, gas/ia64/opc-f.d, gas/ia64/opc-i.d, gas/ia64/opc-m.d: Likewise. include/opcode/ChangeLog * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. opcodes/ChangeLog * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. * ia64-asmtab.c: Regnerate.
2000-08-16Fix 3 DV bugs, and a few minor cleanups.Jim Wilson1-5244/+5415
gas/ * config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle postincrement modified registers. Handle IA64_OPND_R3_2 addl source registers. (note_register_values): Handle IA64_OPND_R3_2 operands. gas/testsuite/ * gas/ia64/dv-raw-err.s: Add new tests for addl and postinc. * gas/ia64/dv-raw-err.l: Likewise. * gas/ia64/dv-waw-err.l: Update sed pattern. * gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment. * gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate. include/opcode/ * ia64.h (IA64_OPCODE_POSTINC): New. opcodes/ * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete break, mov-immediate, nop. * ia64-opc-f.c: Delete fpsub instructions. * ia64-opc-m.c: Add POSTINC to all instructions with postincrement address operand. Rewrite using macros to avoid long lines. * ia64-opc.h (POSTINC): Define. * ia64-asmtab.c: Regenerate.
2000-05-30Replace defines with those from intl/libgettext.h to quieten gcc warnings.Nick Clifton1-2531/+2332
2000-04-23Misc assembly/disassembly fixes.Timothy Wall1-3857/+5525
2000-04-21IA-64 ELF support.Jim Wilson1-0/+5580
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