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path: root/opcodes/i386-tbl.h
AgeCommit message (Expand)AuthorFilesLines
2018-09-14x86: fold CRC32 templatesJan Beulich1-39/+5
2018-09-13x86: Remove VexW=1 from WIG VEX movq and vmovqH.J. Lu1-4/+4
2018-09-13i386: Update VexW field for VEX instructionsH.J. Lu1-18/+18
2018-09-13x86: drop bogus IgnoreSize from a few further insnsJan Beulich1-26/+26
2018-09-13x86: drop bogus IgnoreSize from AVX512_4* insnsJan Beulich1-6/+6
2018-09-13x86: drop bogus IgnoreSize from AVX512DQ insnsJan Beulich1-48/+48
2018-09-13x86: drop bogus IgnoreSize from AVX512BW insnsJan Beulich1-38/+38
2018-09-13x86: drop bogus IgnoreSize from AVX512VL insnsJan Beulich1-13/+13
2018-09-13x86: drop bogus IgnoreSize from AVX512ER insnsJan Beulich1-16/+16
2018-09-13x86: drop bogus IgnoreSize from AVX512F insnsJan Beulich1-371/+371
2018-09-13x86: drop bogus IgnoreSize from SHA insnsJan Beulich1-8/+8
2018-09-13x86: drop bogus IgnoreSize from XOP and SSE4a insnsJan Beulich1-133/+133
2018-09-13x86: drop bogus IgnoreSize from AVX2 insnsJan Beulich1-119/+119
2018-09-13x86: drop bogus IgnoreSize from AVX insnsJan Beulich1-128/+128
2018-09-13x86: drop bogus IgnoreSize from GNFI insnsJan Beulich1-6/+6
2018-09-13x86: drop bogus IgnoreSize from PCLMUL/VPCLMUL insnsJan Beulich1-16/+16
2018-09-13x86: drop bogus IgnoreSize from AES/VAES insnsJan Beulich1-22/+22
2018-09-13x86: drop bogus IgnoreSize from SSE4.2 insnsJan Beulich1-10/+10
2018-09-13x86: drop bogus IgnoreSize from SSE4.1 insnsJan Beulich1-63/+63
2018-09-13x86: drop bogus IgnoreSize from SSSE3 insnsJan Beulich1-32/+32
2018-09-13x86: drop bogus IgnoreSize from SSE3 insnsJan Beulich1-18/+18
2018-09-13x86: drop bogus IgnoreSize from SSE2 insnsJan Beulich1-208/+208
2018-09-13x86: drop bogus IgnoreSize from SSE insnsJan Beulich1-59/+59
2018-09-13x86: drop unnecessary {,No}Rex64Jan Beulich1-5/+5
2018-09-13x86: also allow D on 3-operand insnsJan Beulich1-88/+8
2018-09-13x86: use D attribute also for SIMD templatesJan Beulich1-1143/+89
2018-08-11x86: Add CpuCMOV and CpuFXSRH.J. Lu1-7522/+7522
2018-08-06x86: fold RegEip/RegRip and RegEiz/RegRizJan Beulich1-8/+8
2018-08-03x86: drop NoRex64 from {,v}pmov{s,z}x*Jan Beulich1-24/+24
2018-08-03x86: drop "mem" operand type attributeJan Beulich1-17927/+17927
2018-07-31x86: also optimize KXOR{D,Q} and KANDN{D,Q}Jan Beulich1-4/+4
2018-07-31x86: fold various AVX512 templates with so far differing Masking attributesJan Beulich1-1286/+222
2018-07-31x86/Intel: correct permitted operand sizes for AVX512 scatter/gatherJan Beulich1-64/+64
2018-07-31x86: drop CpuVREXJan Beulich1-4129/+4129
2018-07-25x86: Expand Broadcast to 3 bitsH.J. Lu1-393/+393
2018-07-24x86-64: correct AVX512F vcvtsi2s{d,s} handlingJan Beulich1-24/+24
2018-07-19x86: fold narrowing VCVT* templatesJan Beulich1-247/+77
2018-07-19x86: fold VFPCLASSP{D,S} templatesJan Beulich1-92/+12
2018-07-19x86: fold various AVX512* templatesJan Beulich1-1604/+174
2018-07-19x86: fold various AVX512DQ templatesJan Beulich1-823/+87
2018-07-19x86: fold various AVX512BW templatesJan Beulich1-4354/+440
2018-07-19x86: fold various AVX512CD templatesJan Beulich1-152/+16
2018-07-19x86: fold various AVX512VL templates into their AVX512F counterpartsJan Beulich1-13519/+1378
2018-07-18x86: Split vcvtps2{,u}qq and vcvttps2{,u}qqH.J. Lu1-8/+76
2018-07-11x86: adjust monitor/mwait templatesJan Beulich1-43/+46
2018-07-11x86/Intel: accept memory operand size specifiers for CET insnsJan Beulich1-4/+4
2018-06-01x86: fold MOV to/from segment register templatesJan Beulich1-109/+7
2018-06-01x86: don't emit REX.W for SLDT and STRJan Beulich1-2/+2
2018-06-01x86/Intel: accept "oword ptr" for INVPCIDJan Beulich1-4/+4
2018-05-07Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu1-4962/+5013
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