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path: root/opcodes/i386-opc.h
AgeCommit message (Expand)AuthorFilesLines
2018-05-07Enable Intel MOVDIRI, MOVDIR64B instructionsH.J. Lu1-0/+6
2018-05-07x86: Replace AddrPrefixOp0 with AddrPrefixOpRegH.J. Lu1-3/+3
2018-04-27Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."Igor Tsimbalist1-24/+0
2018-04-26Enable Intel MOVDIRI, MOVDIR64B instructions.Igor Tsimbalist1-0/+24
2018-04-26x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMaskJan Beulich1-15/+0
2018-04-26x86: drop VexImmExtJan Beulich1-3/+0
2018-04-17Enable Intel CLDEMOTE instruction.Igor Tsimbalist1-0/+3
2018-04-11Enable Intel WAITPKG instructions.Igor Tsimbalist1-0/+3
2018-03-28x86: drop VecESizeJan Beulich1-7/+0
2018-03-28x86: convert broadcast insn attribute to booleanJan Beulich1-11/+1
2018-03-08x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu1-3/+0
2018-03-08x86: fold several AVX512VL templatesJan Beulich1-0/+2
2018-03-08x86: drop FloatDJan Beulich1-3/+0
2018-02-27x86: Add -O[2|s] assembler command-line optionsH.J. Lu1-0/+4
2018-01-23Enable Intel PCONFIG instruction.Igor Tsimbalist1-0/+3
2018-01-23Enable Intel WBNOINVD instruction.Igor Tsimbalist1-0/+3
2018-01-17Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist1-3/+5
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-12-18x86: fold certain AVX and AVX2 templatesJan Beulich1-1/+1
2017-12-18x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich1-13/+4
2017-12-18x86: drop FloatReg and FloatAccJan Beulich1-7/+1
2017-12-18x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich1-12/+3
2017-11-30x86: drop Vec_Disp8Jan Beulich1-4/+0
2017-10-23Enable Intel AVX512_BITALG instructions.Igor Tsimbalist1-0/+3
2017-10-23Enable Intel AVX512_VNNI instructions.Igor Tsimbalist1-1/+4
2017-10-23Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist1-1/+4
2017-10-23Enable Intel VAES instructions.Igor Tsimbalist1-0/+3
2017-10-23Enable Intel GFNI instructions.Igor Tsimbalist1-2/+3
2017-10-23Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist1-2/+5
2017-05-22x86: Add NOTRACK prefix supportH.J. Lu1-0/+3
2017-03-09X86: Add pseudo prefixes to control encodingH.J. Lu1-4/+3
2017-03-06Add support for Intel CET instructionsH.J. Lu1-0/+5
2017-01-12Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist1-0/+3
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-02Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist1-0/+3
2016-11-02Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist1-0/+9
2016-10-21X86: Remove pcommit instructionH.J. Lu1-3/+0
2016-08-24X86: Add ptwrite instructionH.J. Lu1-0/+3
2016-05-27Update x86 CPU_XXX_FLAGS handlingH.J. Lu1-0/+15
2016-05-27Replace CpuAMD64/CpuIntel64 with AMD64/Intel64H.J. Lu1-7/+7
2016-05-27Correct CpuMax in i386-opc.hH.J. Lu1-1/+1
2016-05-10Enable Intel RDPID instruction.Alexander Fomin1-0/+3
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-09Implement Intel OSPKE instructionsH.J. Lu1-0/+3
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-1/+1
2015-06-30Add support for monitorx/mwaitx instructionsAmit Pawar1-0/+3
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu1-0/+6
2015-05-11Add Intel MCU support to opcodesH.J. Lu1-0/+3
2015-03-17Add znver1 processorGanesh Gopalasubramanian1-0/+3
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
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