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path: root/opcodes/i386-opc.h
AgeCommit message (Expand)AuthorFilesLines
2018-01-23Enable Intel PCONFIG instruction.Igor Tsimbalist1-0/+3
2018-01-23Enable Intel WBNOINVD instruction.Igor Tsimbalist1-0/+3
2018-01-17Replace CET bit with IBT and SHSTK bits.Igor Tsimbalist1-3/+5
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-12-18x86: fold certain AVX and AVX2 templatesJan Beulich1-1/+1
2017-12-18x86: fold RegXMM/RegYMM/RegZMM into RegSIMDJan Beulich1-13/+4
2017-12-18x86: drop FloatReg and FloatAccJan Beulich1-7/+1
2017-12-18x86: replace Reg8, Reg16, Reg32, and Reg64Jan Beulich1-12/+3
2017-11-30x86: drop Vec_Disp8Jan Beulich1-4/+0
2017-10-23Enable Intel AVX512_BITALG instructions.Igor Tsimbalist1-0/+3
2017-10-23Enable Intel AVX512_VNNI instructions.Igor Tsimbalist1-1/+4
2017-10-23Enable Intel VPCLMULQDQ instruction.Igor Tsimbalist1-1/+4
2017-10-23Enable Intel VAES instructions.Igor Tsimbalist1-0/+3
2017-10-23Enable Intel GFNI instructions.Igor Tsimbalist1-2/+3
2017-10-23Enable Intel AVX512_VBMI2 instructions.Igor Tsimbalist1-2/+5
2017-05-22x86: Add NOTRACK prefix supportH.J. Lu1-0/+3
2017-03-09X86: Add pseudo prefixes to control encodingH.J. Lu1-4/+3
2017-03-06Add support for Intel CET instructionsH.J. Lu1-0/+5
2017-01-12Enable Intel AVX512_VPOPCNTDQ instructionsIgor Tsimbalist1-0/+3
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-02Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist1-0/+3
2016-11-02Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist1-0/+9
2016-10-21X86: Remove pcommit instructionH.J. Lu1-3/+0
2016-08-24X86: Add ptwrite instructionH.J. Lu1-0/+3
2016-05-27Update x86 CPU_XXX_FLAGS handlingH.J. Lu1-0/+15
2016-05-27Replace CpuAMD64/CpuIntel64 with AMD64/Intel64H.J. Lu1-7/+7
2016-05-27Correct CpuMax in i386-opc.hH.J. Lu1-1/+1
2016-05-10Enable Intel RDPID instruction.Alexander Fomin1-0/+3
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-09Implement Intel OSPKE instructionsH.J. Lu1-0/+3
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-1/+1
2015-06-30Add support for monitorx/mwaitx instructionsAmit Pawar1-0/+3
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu1-0/+6
2015-05-11Add Intel MCU support to opcodesH.J. Lu1-0/+3
2015-03-17Add znver1 processorGanesh Gopalasubramanian1-0/+3
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-11-17Add AVX512VBMI instructionsIlya Tocar1-0/+3
2014-11-17Add AVX512IFMA instructionsIlya Tocar1-0/+3
2014-11-17Add pcommit instructionIlya Tocar1-0/+3
2014-11-17Add clwb instructionIlya Tocar1-0/+3
2014-07-22Add AVX512DQ instructions and their AVX512VL variants.Ilya Tocar1-0/+3
2014-07-22Add support for AVX512BW instructions and their AVX512VL versions.Ilya Tocar1-0/+3
2014-07-22Add support for AVX512VL. Add AVX512VL versions of AVX512F instructions.Ilya Tocar1-0/+5
2014-04-04Add support for Intel SGX instructionsIlya Tocar1-0/+3
2014-03-05Update copyright yearsAlan Modra1-2/+1
2014-02-21Add support for CPUID PREFETCHWT1Ilya Tocar1-0/+3
2014-02-12Add clflushopt, xsaves, xsavec, xrstorsIlya Tocar1-0/+9
2013-07-26Add Intel AVX-512 supportH.J. Lu1-0/+91
2013-07-25Support Intel SHAH.J. Lu1-1/+4
2013-07-24Support Intel MPXH.J. Lu1-1/+11
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