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path: root/opcodes/i386-opc.h
AgeCommit message (Expand)AuthorFilesLines
2023-08-11x86: pack CPU flags in opcode tableJan Beulich1-33/+61
2023-08-02Revert "2.41 Release sources"Sam James1-0/+15
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton1-15/+0
2023-07-27Support Intel PBNDKBHu, Lin11-0/+3
2023-07-27Support Intel SM4Haochen Jiang1-0/+3
2023-07-27Support Intel SM3Haochen Jiang1-0/+3
2023-07-27Support Intel SHA512Haochen Jiang1-0/+3
2023-07-27Support Intel AVX-VNNI-INT16konglin11-0/+3
2023-06-16x86: shrink Masking insn attribute to a single bit (boolean)Jan Beulich1-9/+2
2023-05-23Support Intel FRED LKGSZhang, Jun1-0/+6
2023-05-23Revert "Support Intel FRED LKGS"liuhongt1-6/+0
2023-05-23Support Intel FRED LKGSZhang, Jun1-0/+6
2023-04-07Support Intel AMX-COMPLEXHaochen Jiang1-0/+3
2023-03-31x86: parse VEX and alike specifiers for .insnJan Beulich1-0/+2
2023-03-20x86: VexVVVV is now merely a booleanJan Beulich1-17/+2
2023-02-24x86: MONITOR/MWAIT are not SSE3 insnsJan Beulich1-0/+3
2023-02-24x86-64: don't permit LAHF/SAHF with "generic64"Jan Beulich1-0/+3
2023-02-10x86: drop use of VEX3SOURCESJan Beulich1-7/+0
2023-02-10x86: drop use of XOP2SOURCESJan Beulich1-2/+0
2023-02-10x86: move (and rename) opcodespace attributeJan Beulich1-25/+23
2023-01-27x86: use ModR/M for FPU insns with operandsJan Beulich1-2/+2
2023-01-20x86: embed register names in reg_entryJan Beulich1-1/+1
2023-01-20x86: move insn mnemonics to a separate tableJan Beulich1-1/+1
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2022-12-21x86: rename CheckRegSize to CheckOperandSizeJan Beulich1-3/+3
2022-12-12x86: instantiate i386_{op,reg}tab[] in gas instead of in libopcodesJan Beulich1-6/+1
2022-12-01x86: drop No_ldSufJan Beulich1-3/+0
2022-11-30x86: drop FloatRJan Beulich1-3/+0
2022-11-17i386: Move i386_seg_prefixes to gasH.J. Lu1-1/+0
2022-11-15Add AMD znver4 processor supportTejas Joshi1-0/+3
2022-11-14x86: fold special-operand insn attributes into a single enumJan Beulich1-32/+22
2022-11-08Support Intel RAO-INTKong Lingling1-0/+3
2022-11-04Support Intel AVX-NE-CONVERTkonglin11-0/+3
2022-11-02Support Intel MSRLISTHu, Lin11-0/+3
2022-11-02Support Intel WRMSRNSHu, Lin11-0/+3
2022-11-02Support Intel CMPccXADDHaochen Jiang1-1/+4
2022-11-02Support Intel AVX-VNNI-INT8Cui,Lili1-1/+4
2022-11-02Support Intel AVX-IFMAHongyu Wang1-0/+3
2022-10-31Support Intel PREFETCHICui, Lili1-0/+3
2022-10-21Support Intel AMX-FP16Cui,Lili1-0/+3
2022-10-20x86: re-work AVX-VNNI supportJan Beulich1-3/+0
2022-09-30x86/Intel: restrict suffix derivationJan Beulich1-6/+0
2022-08-03x86: also use D for MOVBEJan Beulich1-1/+1
2022-07-18x86: re-order insn template fieldsJan Beulich1-3/+11
2022-07-06x86: make D attribute usable for XOP and FMA4 insnsJan Beulich1-0/+3
2022-07-04x86: fold Disp32S and Disp32Jan Beulich1-4/+1
2022-03-17x86: never set i386_cpu_flags' "unused" fieldJan Beulich1-0/+4
2022-03-17x86: drop L1OM/K1OM support from gasJan Beulich1-6/+0
2022-01-06x86: drop NoAVX insn attributeJan Beulich1-3/+0
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
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