aboutsummaryrefslogtreecommitdiff
path: root/opcodes/i386-init.h
AgeCommit message (Expand)AuthorFilesLines
2012-09-25Add missing Cpu flags in bd and bt coresH.J. Lu1-12/+12
2012-09-20Replace CpuSSE3 with CpuCX16 for cmpxchg16bH.J. Lu1-108/+114
2012-08-17Add AMD btver1 and btver2 supportH.J. Lu1-0/+12
2012-08-10Enable FMA instructions for bdver2H.J. Lu1-1/+1
2012-07-16Implement RDRSEED, ADX and PRFCHW instructionsH.J. Lu1-75/+168
2012-02-08Implement Intel Transactional Synchronization ExtensionsH.J. Lu1-73/+83
2012-01-13Add vmfuncH.J. Lu1-72/+77
2011-07-22Add initial Intel K1OM support.H.J. Lu1-82/+87
2011-06-10Support AVX Programming Reference (June, 2011).H.J. Lu1-81/+101
2011-06-03Add CpuF16C to CPU_BDVER2_FLAGS.Quentin Neill1-1/+1
2011-05-112011-05-10 Quentin Neill <quentin.neill@amd.com>Quentin Neill1-0/+5
2011-04-20Regenerate i386-init.h.H.J. Lu1-1/+1
2011-01-18opcodes/Jan Kratochvil1-65/+70
2011-01-05Implement BMI instructions.H.J. Lu1-66/+71
2010-10-16Add CpuNop to CPU_GENERIC64_FLAGS.H.J. Lu1-1/+1
2010-08-06Don't generate multi-byte NOPs for i686.H.J. Lu1-128/+138
2010-07-01Support AVX Programming Reference (June, 2010)H.J. Lu1-71/+91
2010-03-232010-03-22 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-1/+1
2010-02-112010-02-10 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-46/+51
2010-02-032010-02-03 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-1/+1
2010-01-062010-01-06 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-0/+5
2009-11-182009-11-18 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-70/+65
2009-11-182009-11-17 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-66/+76
2009-11-052009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-66/+71
2009-07-25bfd/H.J. Lu1-69/+74
2009-07-24gas/Jan Beulich1-82/+160
2009-07-06<gas changes>Dwarakanath Rajagopal1-47/+51
2009-05-22<gas changes>Dwarakanath Rajagopal1-51/+47
2009-02-23gas/H.J. Lu1-51/+46
2009-01-10gas/H.J. Lu1-76/+88
2009-01-09gas/H.J. Lu1-44/+48
2009-01-062009-01-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+2
2008-05-02gas/H.J. Lu1-42/+50
2008-04-04gas/H.J. Lu1-1/+1
2008-04-03binutils/H.J. Lu1-125/+151
2008-02-16gas/H.J. Lu1-0/+5
2008-02-12gas/H.J. Lu1-0/+4
2008-02-12gas/testsuite/H.J. Lu1-37/+37
2008-01-23gas/H.J. Lu1-1/+1
2008-01-22gas/H.J. Lu1-61/+61
2008-01-22gas/H.J. Lu1-0/+8
2008-01-15gas/H.J. Lu1-46/+46
2008-01-12gas/testsuite/H.J. Lu1-77/+121
2008-01-042008-01-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
2008-01-04gas/H.J. Lu1-35/+35
2008-01-03gas/testsuite/H.J. Lu1-35/+35
2007-12-28gas/testsuite/H.J. Lu1-35/+35
2007-10-05gas/testsuite/H.J. Lu1-39/+39
2007-09-14Add AMD SSE5 supportMichael Meissner1-34/+38
2007-09-09gas/H.J. Lu1-0/+332