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2007-09-142007-09-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-16/+13
* i386-dis.c (get_valid_dis386): Take a pointer to disassemble_info. Handle IS_3BYTE_OPCODE. (print_insn): Updated. Don't handle IS_3BYTE_OPCODE here.
2007-08-312007-08-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-6/+42
* i386-dis.c (OPC_EXT_40...OPC_EXT_45): New. (dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45. (opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
2007-08-31gas/testsuite/H.J. Lu1-72/+19
2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/svme.s: Updated to accept eax in 32bit and rax in 64bit. * gas/i386/svme.d: Updated. * gas/i386/svme64.d: Likewise. opcodes/ 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (SVME_Fixup): Removed. (OPC_EXT_39): New. (OPC_EXT_RM_6): Likewise. (grps): Use OPC_EXT_39. (opc_ext_table): Add OPC_EXT_39. (opc_ext_rm_table): Add OPC_EXT_RM_6. * i386-opc.tbl: Correct SVME instructions to take register operand only. * i386-tbl.h: Regenerated.
2007-08-312007-08-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* Makefile.am (INCLUDES): Remove -D_GNU_SOURCE. * Makefile.in: Regenerated. * configure.in (AC_GNU_SOURCE): Added. (AC_PROG_CC): Moved before AC_GNU_SOURCE. (AC_CHECK_DECLS): Add stpcpy. * configure: Regenerated. * config.in: Likewise. * i386-dis.c: Include "sysdep.h" before "dis-asm.h". * sysdep.h (stpcpy): New.
2007-08-30gas/testsuite/H.J. Lu1-24/+19
2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/amd.s: Add rdtscp. * gas/i386/amd.d: Updated. * gas/i386/mem-intel.d: Update invlpg for BYTE PTR. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-opcode.s: Add swapgs. * gas/i386/x86-64-opcode.d: Updated. opcodes/ 2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (INVLPG_Fixup): Removed. (OPC_EXT_38): New. (OPC_EXT_RM_5): Likewise. (grps): Use OPC_EXT_38. (opc_ext_table): Add OPC_EXT_38. (opc_ext_rm_table): Add OPC_EXT_RM_5.
2007-08-302007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-21/+28
* i386-dis.c (SIMD_Fixup): Removed. (OPC_EXT_34...OPC_EXT_37): New. (dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35. (prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37. (opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
2007-08-292007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-57/+111
* i386-dis.c (OPC_EXT_25...OPC_EXT_33): New. (dis386): Use OPC_EXT_0...OPC_EXT_2. (dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5. (grps): Updated to use OPC_EXT_6...OPC_EXT_31. (prefix_user_table): Use OPC_EXT_32. (x86_64_table): Use OPC_EXT_33. (opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
2007-08-292007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* i386-dis.c (prefix_user_table): Fix comment.
2007-08-29gas/testsuite/H.J. Lu1-505/+450
2007-08-29 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run reg and reg-intel. * gas/i386/katmai.d: Update bad instructions. * gas/i386/reg.s: New. Add tests for instructions with one register operand. * gas/i386/reg-intel.d: Likewise. * gas/i386/reg.d: Likewise. opcodes/ 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_Skip_MODRM): New. (OP_Monitor): Likewise. (OP_Mwait): Likewise. (Mb): Likewise. (Skip_MODRM): Likewise. (USE_OPC_EXT_TABLE): Likewise. (USE_OPC_EXT_RM_TABLE): Likewise. (PREGRP98...PREGRP100): Likewise. (OPC_EXT_0...OPC_EXT_24): Likewise. (OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise. (lock_prefix): Likewise. (data_prefix): Likewise. (addr_prefix): Likewise. (repz_prefix): Likewise. (repnz_prefix): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise. (OP_VMX): Removed. (OP_0fae): Likewise. (PNI_Fixup): Likewise. (VMX_Fixup): Likewise. (VM): Likewise. (twobyte_uses_DATA_prefix): Likewise. (twobyte_uses_REPNZ_prefix): Likewise. (twobyte_uses_REPZ_prefix): Likewise. (threebyte_0x38_uses_DATA_prefix): Likewise. (threebyte_0x38_uses_REPNZ_prefix): Likewise. (threebyte_0x38_uses_REPZ_prefix): Likewise. (threebyte_0x3a_uses_DATA_prefix): Likewise. (threebyte_0x3a_uses_REPNZ_prefix): Likewise. (threebyte_0x3a_uses_REPZ_prefix): Likewise. (grps): Use OPC_EXT_0...OPC_EXT_24. (prefix_user_table): Use PREGRP98. (print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix, uses_REPNZ_prefix and uses_REPZ_prefix. Initialize repz_prefix, repnz_prefix, lock_prefix, addr_prefix and data_prefix based on prefixes. Call get_valid_dis386 to get a pointer to the valid dis386. Print out prefixes if they aren't NULL. (OP_C): Clear lock_prefix if PREFIX_LOCK is used. (REP_Fixup): Set repz_prefix to "rep " when seeing PREFIX_REPZ.
2007-08-28gas/H.J. Lu1-7/+12
2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Handle cmpxchg8b in Intel mode. gas/testsuite/ 2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/mem.s: New. Add tests for instructions with one memory operand. * gas/i386/x86-64-mem.s: Likewise. * gas/i386/mem-intel.d: Updated. * gas/i386/mem.d: Likewise. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-mem.d: Likewise. opcodes/ 2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (Md): New. (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use Md on ldmxcsr and stmxcsr. Use b_mode on clflush. (OP_0fae): Clear bytemode for sfence.
2007-08-022007-08-01 Michael Snyder <msnyder@access-company.com>Michael Snyder1-1/+1
* i386-dis.c (print_insn): Guard against NULL.
2007-07-29gas/testsuite/H.J. Lu1-13/+14
2007-07-29 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4834 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add tests for SSE4 instructions. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-07-29 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4834 * i386-dis.c (EXw): New. (prefix_user_table): Updated to use EXw, EXd and EXq for SSE4 instructions when appropriated.
2007-07-28gas/testsuite/H.J. Lu1-35/+36
2007-07-28 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4835 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add new tests. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-07-28 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4835 * i386-dis.c (Eq): New. (EMC): Renamed to ... (EMCq): This. Use q_mode instead of v_mode. (prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq when appropriated.
2007-07-28gas/testsuite/H.J. Lu1-5/+5
2007-07-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-opcode.d: Updated. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/x86-64-simd.s: Add movq. opcodes/ 2007-07-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Change "movd" to "movK". (prefix_user_table): Likewise. Use EXq instead of EXx on "movq".
2007-07-16gas/testsuite/H.J. Lu1-4/+4
2007-07-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/simd.s: Add tests for punpcklbw, punpckldq, punpcklwd and punpcklqdq. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-07-16 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EMq): Removed. (EMx): New. (prefix_user_table): Replace EMq with EMx.
2007-07-05Change source files over to GPLv3.Nick Clifton1-10/+12
2007-06-23gas/testsuite/H.J. Lu1-186/+224
2007-06-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4667 * gas/i386/i386.exp: Run simd, simd-intel, x86-64-simd and x86-64-simd-intel. * gas/i386/opcode-intel.d: Updated. * gas/i386/simd-intel.d: New. * gas/i386/simd.d: Likewise. * gas/i386/simd.s: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-06-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4667 * i386-dis.c (EX): Removed. (EMd): New. (EMq): Likewise. (EXd): Likewise. (EXq): Likewise. (EXx): Likewise. (PREGRP93...PREGRP97): Likewise. (dis386_twobyte): Updated. (prefix_user_table): Updated. Add PREGRP93...PREGRP97. (OP_EX): Remove Intel syntax handling.
2007-05-15gas/testsuite/H.J. Lu1-1/+1
2007-05-14 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4502 * gas/i386/amd.d: Replace "pfmulhrw" with "pmulhrw". opcodes/ 2007-05-14 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4502 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
2007-05-072007-05-07 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries for some SSE4 instructions. (threebyte_0x3a_uses_DATA_prefix): Likewise.
2007-05-03gas/H.J. Lu1-1/+7
2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Don't explicitly check suffix for crc32 in Intel mode. (process_suffix): Issue an error for crc32 if the operand size is ambiguous. gas/testsuite/ 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: Updated. * gas/i386/crc32.d: Likewise. * gas/i386/sse4_2.d: Likewise. * gas/i386/x86-64-crc32-intel.d: Likewise. * gas/i386/x86-64-crc32.d: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/crc32.s: Remove crc32 instructions with ambiguous operand size and suffix in crc32 instructions in Intel mode. * gas/i386/x86-64-crc32.s: Likewise. * gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous operand size. * gas/i386/x86-64-sse4_2.s: Likewise. * gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32. * gas/i386/inval-crc32.l: New. * gas/i386/inval-crc32.s: Likewise. * gas/i386/x86-64-inval-crc32.l: Likewise. * gas/i386/x86-64-inval-crc32.s: Likewise. opcodes/ 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode. * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand type for crc32.
2007-05-01gas/config/H.J. Lu1-7/+5
2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Check suffix for crc32 in Intel mdoe. (process_suffix): Default the suffix of 8bit crc32 to BYTE_MNEM_SUFFIX. (check_byte_reg): Skip check for 8bit crc32. gas/testsuite/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: New file. * gas/i386/crc32.d:Likewise. * gas/i386/crc32.s:Likewise. * gas/i386/x86-64-crc32-intel.d:Likewise. * gas/i386/x86-64-crc32.d:Likewise. * gas/i386/x86-64-crc32.s:Likewise. * gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32 and x86-64-crc32-intel. opcodes/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and check data size prefix in 16bit mode. * i386-opc.c (i386_optab): Default crc32 to non-8bit and support Intel mode.
2007-04-272007-04-27 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* i386-dis.c (modrm): Put reg before rm.
2007-04-27gas/testsuite/H.J. Lu1-10/+61
2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4430 * gas/i386/amd.d: Updated. * gas/i386/immed32.d: Likewise. * gas/i386/intel.d: Likewise. * gas/i386/intel16.d: Likewise. * gas/i386/intelok.d: Likewise. * gas/i386/jump16.d: Likewise. * gas/i386/naked.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. * gas/i386/prescott.d: Likewise. * gas/i386/ssemmx2.d: Likewise. * gas/i386/tlsd.d: Likewise. * gas/i386/tlspic.d: Likewise. * gas/i386/x86-64-addr32.d: Likewise. * gas/i386/x86-64-prescott.d: Likewise. * gas/i386/x86-64-rip.d: Likewise. * gas/i386/x86_64.d: Likewise. ld/testsuite/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4430 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsbindesc.dd: Likewise * ld-i386/tlsdesc.dd: Likewise * ld-i386/tlsgdesc.dd: Likewise * ld-i386/tlsnopic.dd: Likewise * ld-i386/tlspic.dd: Likewise * ld-x86-64/tlsbin.dd: Likewise * ld-x86-64/tlsbindesc.dd: Likewise * ld-x86-64/tlsdesc.dd: Likewise * ld-x86-64/tlsgdesc.dd: Likewise * ld-x86-64/tlspic.dd: Likewise opcodes/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4430 * i386-dis.c (print_displacement): New. (OP_E): Call print_displacement instead of print_operand_value to output displacement when either base or index exist. Print the explicit zero displacement in 16bit mode.
2007-04-26gas/testsuite/H.J. Lu1-4/+16
2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4429 * gas/i386/i386.exp: Run "x86-64-addr32-intel" and "x86-64-rip-intel". * gas/i386/intelok.d: Updated. * gas/i386/x86-64-addr32-intel.d: New file. * gas/i386/x86-64-rip-intel.d: Likewise. opcodes/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4429 * i386-dis.c (print_insn): Also swap the order of op_riprel when swapping op_index. Break when the RIP relative address is printed. (OP_E): Properly handle RIP relative addressing and print the explicit zero displacement for Intel mode.
2007-04-18gas/H.J. Lu1-9/+135
2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4. (match_template): Handle operand size for crc32 in SSE4.2. (process_suffix): Handle operand type for crc32 in SSE4.2. (output_insn): Support SSE4.2. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2. * gas/i386/sse4_2.d: New file. * gas/i386/sse4_2.s: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/x86-64-sse4_2.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): New. (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90, PREGRP91): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90 and PREGRP91. (three_byte_table): Likewise. * i386-opc.c (i386_optab): Add SSE4.2 opcodes. * gas/config/tc-i386.h (CpuSSE4_2): New. (CpuSSE4): Likewise. (CpuUnknownFlags): Add CpuSSE4_2.
2007-04-18gas/H.J. Lu1-55/+505
2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.1. (process_operands): Adjust implicit operand for blendvpd, blendvps and pblendvb in SSE4.1. (output_insn): Support SSE4.1. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1. * gas/i386/sse4_1.d: New file. * gas/i386/sse4_1.s: Likewise. * gas/i386/x86-64-sse4_1.d: Likewise. * gas/i386/x86-64-sse4_1.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (XMM_Fixup): New. (Edqb): New. (Edqd): New. (XMM0): New. (dqb_mode): New. (dqd_mode): New. (PREGRP39 ... PREGRP85): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP39 ... PREGRP85. (three_byte_table): Likewise. (putop): Handle 'K'. (intel_operand_size): Handle dqb_mode, dqd_mode): (OP_E): Likewise. (OP_G): Likewise. * i386-opc.c (i386_optab): Add SSE4.1 opcodes. * i386-opc.h (CpuSSE4_1): New. (CpuUnknownFlags): Add CpuSSE4_1. (regKludge): Update comment.
2007-04-132007-04-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-21/+21
* i386-dis.c: Remove trailing white spaces.
2007-04-112007-04-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-113/+132
PR binutils/4333 * i386-dis.c (GRP1a): New. (GRP1b ... GRPPADLCK2): Update index. (dis386): Use GRP1a for entry 0x8f. (mod, rm, reg): Removed. Replaced by ... (modrm): This. (grps): Add GRP1a.
2007-03-23gas/H.J. Lu1-16/+21
2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_begin): Allow '.' in mnemonic. gas/testsuite/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rex.s: Add tests for rex.WRXB. * gas/i386/rex.d: Updated. * gas/i386/rex.d: Replace rex64XYZ with rex.WRXB. * gas/i386/x86-64-io-intel.d : Likewise. * gas/i386/x86-64-io-suffix.d: Likewise. * gas/i386/x86-64-io.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. * i386-opc.c (i386_optab): Add rex.wrxb.
2007-03-21gas/H.J. Lu1-71/+70
2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively. include/opcode/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386.h (REX_MODE64): Renamed to ... (REX_W): This. (REX_EXTX): Renamed to ... (REX_R): This. (REX_EXTY): Renamed to ... (REX_X): This. (REX_EXTZ): Renamed to ... (REX_B): This. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REX_MODE64): Remove definition. (REX_EXTX): Likewise. (REX_EXTY): Likewise. (REX_EXTZ): Likewise. (USED_REX): Use REX_OPCODE instead of 0x40. Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
2007-03-21gas/H.J. Lu1-11/+21
2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * config/tc-i386.c (match_template): Properly handle 64bit mode "xchg %eax, %eax". gas/testsuite/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * gas/i386/nops.s: Add testcases for nop r/m. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax, %eax and %rax. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. opcodes/ 2003-03-21 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4218 * i386-dis.c (PREGRP38): New. (dis386): Use PREGRP38 for 0x90. (prefix_user_table): Add PREGRP38. (print_insn): Set uses_REPZ_prefix to 1 for pause. (NOP_Fixup1): Properly handle REX bits. (NOP_Fixup2): Likewise. * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit. Allow register with nop.
2007-03-15gas/H.J. Lu1-18/+5
2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am: Run "make dep-am". * Makefile.in: Regenerated. * config/tc-i386.c: Include "opcodes/i386-opc.h" instead of "opcode/i386.h". (md_begin): Check reg_name != NULL for the last entry in i386_regtab. * config/tc-i386.h: Move many entries to opcode/i386.h and opcodes/i386-opc.h. * configure.in (need_opcodes): Set true for i386. * configure: Regenerated. include/opcode/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * i386.h: Add entries from config/tc-i386.h and move tables to opcodes/i386-opc.h. opcodes/ 2007-03-15 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (CFILES): Add i386-opc.c. (ALL_MACHINES): Add i386-opc.lo. Run "make dep-am". * Makefile.in: Regenerated. * configure.in: Add i386-opc.lo for bfd_i386_arch. * configure: Regenerated. * i386-dis.c: Include "opcode/i386.h". (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition. (FWAIT_OPCODE): Remove definition. (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition. (MAX_OPERANDS): Remove definition. * i386-opc.c: New file. * i386-opc.h: Likewise.
2007-03-092007-03-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+4
* i386-dis.c (OP_Rd): Renamed to ... (OP_R): This. (Rd): Updated. (Rm): Likewise.
2007-02-13Remove extra space.H.J. Lu1-3/+3
2007-02-13Remove trailing zeros in array initializers.H.J. Lu1-86/+86
2007-02-13Add a space before `}' in struct initializer.H.J. Lu1-66/+66
2007-02-132007-02-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1725/+1679
* i386-dis.c: Updated to use an array of MAX_OPERANDS operands in struct dis386.
2007-02-05ld/testsuite/H.J. Lu1-6/+10
2076-02-05 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Undo the last change. * ld-x86-64/pcrel16.d: Likewise. opcodes/ 2076-02-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Undo the last change. Properly handle 64K wrap around within the same segment in 16bit mode.
2007-02-03Cosmetic change.H.J. Lu1-1/+1
2007-02-03ld/testsuite/H.J. Lu1-1/+4
2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Updated. * ld-x86-64/pcrel16.d: Likewise. opcodes/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Mask to 16bit only if there is a data16 prefix.
2007-02-02binutils/H.J. Lu1-4/+34
2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * doc/binutils.texi (objdump): Document the new addr64 option for i386 disassembler. include/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * dis-asm.h (print_i386_disassembler_options): New. opcodes/ 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * disassemble.c (disassembler_usage): Call print_i386_disassembler_options for i386 disassembler. * i386-dis.c (print_i386_disassembler_options): New. (print_insn): Support the new addr64 option.
2006-12-15gas/testsuite/H.J. Lu1-1/+5
2006-12-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-inval.s: cmpxchg16b needs oword ptr, instead of xmmword ptr. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.l: Updated. opcodes/ 2006-12-15 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (o_mode): New for 16-byte operand. (intel_operand_size): Generate "OWORD PTR " for o_mode. (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
2006-12-14gas/testsuite/H.J. Lu1-1/+16
2006-12-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-inval.s: Add cmpxchg16b. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.l: Updated. * gas/i386/x86_64.d: Likewise. opcodes/ 2006-12-14 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CMPXCHG8B_Fixup): New. (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
2006-12-112006-12-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-5/+6
* i386-dis.c (Eq): Replaced by ... (Mq): New. This. (Ma): Defined with OP_M instead of OP_E. (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq. (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
2006-12-102006-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-5/+20
* i386-dis.c (X86_64_1): New. (X86_64_2): Likewise. (X86_64_3): Likewise. (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64 tables. (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
2006-12-092006-12-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-21/+21
* i386-dis.c: Adjust white spaces.
2006-12-04opcodes/Jan Beulich1-0/+1
2006-12-04 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_J): Update used_prefixes in v_mode. gas/testsuite/ 2006-12-04 Jan Beulich <jbeulich@novell.com> * gas/i386/opcode-intel.d: Fix wrong expectation. Make white space expectations more consistent.
2006-12-01opcodes/Jan Beulich1-58/+30
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (SEG_Fixup): Delete. (Sv): Use OP_SEG. (putop): New suffix character 'D'. (dis386): Use it. (grps): Likewise. (OP_SEG): Handle bytemode other than w_mode. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.d: Adjust. * gas/i386/naked.d: Adjust. * gas/i386/opcode.d: Adjust.
2006-12-01opcodes/Jan Beulich1-18/+69
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (zAX): New. (Xz): New. (Yzr): New. (z_mode): New. (z_mode_ax_reg): New. (putop): New suffix character 'G'. (dis386): Use it for in, out, ins, and outs. (intel_operand_size): Handle z_mode. (OP_REG): Delete unreachable case indir_dx_reg. (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle z_mode_ax_reg. (OP_ESreg): Fix Intel syntax operand size handling. (OP_DSreg): Likewise. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-io.[sd]: New. * gas/i386/x86-64-io-intel.d: New. * gas/i386/x86-64-io-suffix.d: New. * gas/i386/i386.exp: Run new tests.
2006-12-01opcodes/Jan Beulich1-48/+27
2006-11-30 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally. (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix used. For 'R' and 'W' suffix, simplify and fix Intel mode. gas/testsuite/ 2006-11-30 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.s: Use Intel syntax in Intel syntax test. * gas/i386/x86-64-cbw.[sd]: New. * gas/i386/x86-64-cbw-intel.d: New. * gas/i386/i386.exp: Run new tests.
generated by cgit v1.1 at 2025-01-16 18:43:13 +0000