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2008-08-28gas/testsuite/Jan Beulich1-2/+2
2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/intel.s: Add retf. * gas/i386/intel.{d,e}: Adjust. * gas/i386/opcode-intel.d: Replace lret with retf. opcodes/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386): Adjust far return mnemonics. * i386-opc.tbl: Add retf. * i386-tbl.h: Re-generate.
2008-08-28gas/testsuite/Jan Beulich1-16/+16
2008-08-28 Jan Beulich <jbeulich@novell.com> * gas/i386/gas/i386/opcode-suffix.d: Add suffixes to cmovXX. opcodes/ 2008-08-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
2008-08-20gas/H.J. Lu1-8/+104
2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * config/tc-i386.c (CPU_FLAGS_AES_MATCH): New. (CPU_FLAGS_AVX_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Updated. (cpu_flags_match): Likewise. gas/testsuite/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * gas/i386/avx.s: Add AES + AVX tests. * gas/i386/arch-10.s: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/i386.exp: Run arch-avx-1, arch-avx-1-1 and arch-avx-1-2. * gas/i386/arch-avx-1.d: New. * gas/i386/arch-avx-1.s: Likewise. * gas/i386/arch-avx-1-1.l: Likewise. * gas/i386/arch-avx-1-1.s: Likewise. * gas/i386/arch-avx-1-2.l: Likewise. * gas/i386/arch-avx-1-2.s: Likewise. opcodes/ 2008-08-20 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (August, 2008) * i386-dis.c (PREFIX_VEX_38DB): New. (PREFIX_VEX_38DC): Likewise. (PREFIX_VEX_38DD): Likewise. (PREFIX_VEX_38DE): Likewise. (PREFIX_VEX_38DF): Likewise. (PREFIX_VEX_3ADF): Likewise. (VEX_LEN_38DB_P_2): Likewise. (VEX_LEN_38DC_P_2): Likewise. (VEX_LEN_38DD_P_2): Likewise. (VEX_LEN_38DE_P_2): Likewise. (VEX_LEN_38DF_P_2): Likewise. (VEX_LEN_3ADF_P_2): Likewise. (PREFIX_VEX_3A04): Updated. (VEX_LEN_3A06_P_2): Likewise. (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC, PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF. (x86_64_table): Likewise. (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2, VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and VEX_LEN_3ADF_P_2. * i386-opc.tbl: Add AES + AVX instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-07-30Silence gcc printf warningsAlan Modra1-2/+3
2008-05-02gas/H.J. Lu1-7/+60
2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention XSAVE, EPT and MOVBE. * config/tc-i386.c (cpu_arch): Add .movbe and .ept. (md_show_usage): Add .movbe and .ept. * doc/c-i386.texi: Add movbe and ept to -march=. Document .movbe and .ept. gas/testsuite/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept, ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel, x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and x86-64-inval-ept. * gas/i386/arch-10.s: Add movbe and invept. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/ept.d: New file * gas/i386/ept-intel.d: Likewise. * gas/i386/ept.s: Likewise. * gas/i386/inval-ept.l: Likewise. * gas/i386/inval-ept.s: Likewise. * gas/i386/inval-movbe.l: Likewise. * gas/i386/inval-movbe.s: Likewise. * gas/i386/movbe.d: Likewise. * gas/i386/movbe-intel.d: Likewise. * gas/i386/movbe.s: Likewise. * gas/i386/x86-64-inval-ept.l: Likewise. * gas/i386/x86-64-inval-ept.s: Likewise. * gas/i386/x86-64-inval-movbe.l: Likewise. * gas/i386/x86-64-inval-movbe.s: Likewise. * gas/i386/x86-64-ept.d: Likewise. * gas/i386/x86-64-ept-intel.d: Likewise. * gas/i386/x86-64-ept.s: Likewise. * gas/i386/x86-64-movbe.d: Likewise. * gas/i386/x86-64-movbe-intel.d: Likewise. * gas/i386/x86-64-movbe.s: Likewise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. opcodes/ 2008-05-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (MOVBE_Fixup): New. (Mo): Likewise. (PREFIX_0F3880): Likewise. (PREFIX_0F3881): Likewise. (PREFIX_0F38F0): Updated. (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and CPU_EPT_FLAGS. (cpu_flags): Add CpuMovbe and CpuEPT. * i386-opc.h (CpuMovbe): New. (CpuEPT): Likewise. (CpuLM): Updated. (i386_cpu_flags): Add cpumovbe and cpuept. * i386-opc.tbl: Add entries for movbe and EPT instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-04-18gas/H.J. Lu1-95/+177
2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for FMA. gas/testsuite/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: Updated. * gas/i386/avx.d: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2008-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_VEX_FMA): New. (OP_EX_VexImmW): Likewise. (VexFMA): Likewise. (Vex128FMA): Likewise. (EXVexImmW): Likewise. (get_vex_imm8): Likewise. (OP_EX_VexReg): Likewise. (vex_i4_done): Renamed to ... (vex_w_done): This. (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on FMA instructions. (print_insn): Updated. (OP_EX_VexW): Rewrite to swap register in VEX with EX. (OP_REG_VexI4): Check invalid high registers.
2008-04-072008-04-07 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-106/+106
* i386-dis.c (PREFIX_VEX_38XX): Add a tab. (PREFIX_VEX_3AXX): Likewis.
2008-04-03binutils/H.J. Lu1-109/+5317
2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c (dwarf_regnames_i386): Add AVX registers. (dwarf_regnames_x86_64): Likewise. gas/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx. * doc/c-i386.texi: Add avx, aes, clmul and fma to -march=. Document -msse2avx, .avx, .aes, .clmul and .fma. * config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New. (vex_prefix): Likewise. (sse2avx): Likewise. (CPU_FLAGS_ARCH_MATCH): Likewise. (CPU_FLAGS_64BIT_MATCH): Likewise. (CPU_FLAGS_32BIT_MATCH): Likewise. (CPU_FLAGS_PERFECT_MATCH): Likewise. (regymm): Likewise. (vex_imm4): Likewise. (fits_in_imm4): Likewise. (build_vex_prefix): Likewise. (VEX_check_operands): Likewise. (bad_implicit_operand): Likewise. (OPTION_MSSE2AVX): Likewise. (T_YMMWORD): Likewise. (_i386_insn): Add vex. (cpu_arch): Add .avx, .aes, .clmul and .fma. (cpu_flags_match): Changed to take a pointer to const template. Enable encoding SSE instructions with VEX prefix for -msse2avx. (match_mem_size): Also check ymmword. (operand_type_match): Clear ymmword. (md_begin): Allow '_' in mnemonic. (type_names): Add OPERAND_TYPE_VEX_IMM4. (process_immext): Update assert. (md_assemble): Don't call process_immext if sse2avx and immext are true. Call build_vex_prefix if vex is true. (parse_insn): Updated for cpu_flags_match. (swap_operands): Handle 5 operands. (match_template): Handle 5 operands. Updated for cpu_flags_match. Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX. (process_suffix): Handle YMMWORD_MNEM_SUFFIX. (check_byte_reg): Check regymm. (process_operands): Duplicate the destination register for -msse2avx if needed. (build_modrm_byte): Updated for instructions with VEX encoding. (output_insn): Output VEX prefix if needed. (md_longopts): Add msse2avx. (md_parse_option): Handle OPTION_MSSE2AVX. (md_show_usage): Add avx, aes, clmul, fma and -msse2avx. (intel_e09): Support YMMWORD. (intel_e11): Likewise. (intel_get_token): Likewise. gas/testsuite/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes, x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx, x86-64-avx-intel and x86-64-inval-avx. * gas/cfi/cfi-i386.s: Add tests for AVX register maps. * gas/cfi/cfi-x86_64.s: Likewise. * gas/i386/aes.d: New. * gas/i386/aes.s: Likewise. * gas/i386/aes-intel.d: Likewise. * gas/i386/avx.d: Likewise. * gas/i386/avx.s: Likewise. * gas/i386/avx-intel.d: Likewise. * gas/i386/clmul.d: Likewise. * gas/i386/clmul-intel.d: Likewise. * gas/i386/clmul.s: Likewise. * gas/i386/i386.exp: Likewise. * gas/i386/inval-avx.l: Likewise. * gas/i386/inval-avx.s: Likewise. * gas/i386/sse2avx.d: Likewise. * gas/i386/sse2avx.s: Likewise. * gas/i386/x86-64-aes.d: Likewise. * gas/i386/x86-64-aes.s: Likewise. * gas/i386/x86-64-aes-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-clmul.d: Likewise. * gas/i386/x86-64-clmul-intel.d: Likewise. * gas/i386/x86-64-clmul.s: Likewise. * gas/i386/x86-64-inval-avx.l: Likewise. * gas/i386/x86-64-inval-avx.s: Likewise. * gas/i386/x86-64-sse2avx.d: Likewise. * gas/i386/x86-64-sse2avx.s: Likewise. * gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/rexw.s: Add AVX tests. * gas/i386/x86-64-opcode-inval.s: Remove lds/les test. * gas/cfi/cfi-i386.d: Updated. * gas/cfi/cfi-x86_64.d: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/rexw.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. include/opcode/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386.h (MAX_OPERANDS): Set to 5. (MAX_MNEM_SIZE): Changed to 20. opcodes/ 2008-04-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_register): New. (OP_E_memory): Likewise. (OP_VEX): Likewise. (OP_EX_Vex): Likewise. (OP_EX_VexW): Likewise. (OP_XMM_Vex): Likewise. (OP_XMM_VexW): Likewise. (OP_REG_VexI4): Likewise. (PCLMUL_Fixup): Likewise. (VEXI4_Fixup): Likewise. (VZERO_Fixup): Likewise. (VCMP_Fixup): Likewise. (VPERMIL2_Fixup): Likewise. (rex_original): Likewise. (rex_ignored): Likewise. (Mxmm): Likewise. (XMM): Likewise. (EXxmm): Likewise. (EXxmmq): Likewise. (EXymmq): Likewise. (Vex): Likewise. (Vex128): Likewise. (Vex256): Likewise. (VexI4): Likewise. (EXdVex): Likewise. (EXqVex): Likewise. (EXVexW): Likewise. (EXdVexW): Likewise. (EXqVexW): Likewise. (XMVex): Likewise. (XMVexW): Likewise. (XMVexI4): Likewise. (PCLMUL): Likewise. (VZERO): Likewise. (VCMP): Likewise. (VPERMIL2): Likewise. (xmm_mode): Likewise. (xmmq_mode): Likewise. (ymmq_mode): Likewise. (vex_mode): Likewise. (vex128_mode): Likewise. (vex256_mode): Likewise. (USE_VEX_C4_TABLE): Likewise. (USE_VEX_C5_TABLE): Likewise. (USE_VEX_LEN_TABLE): Likewise. (VEX_C4_TABLE): Likewise. (VEX_C5_TABLE): Likewise. (VEX_LEN_TABLE): Likewise. (REG_VEX_XX): Likewise. (MOD_VEX_XXX): Likewise. (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. (PREFIX_0F3A44): Likewise. (PREFIX_0F3ADF): Likewise. (PREFIX_VEX_XXX): Likewise. (VEX_OF): Likewise. (VEX_OF38): Likewise. (VEX_OF3A): Likewise. (VEX_LEN_XXX): Likewise. (vex): Likewise. (need_vex): Likewise. (need_vex_reg): Likewise. (vex_i4_done): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (OP_REG_VexI4): Likewise. (vex_cmp_op): Likewise. (pclmul_op): Likewise. (vpermil2_op): Likewise. (m_mode): Updated. (es_reg): Likewise. (PREFIX_0F38F0): Likewise. (PREFIX_0F3A60): Likewise. (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF and PREFIX_VEX_XXX entries. (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and PREFIX_0F3ADF. (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. Add MOD_VEX_XXX entries. (ckprefix): Initialize rex_original and rex_ignored. Store the REX byte in rex_original. (get_valid_dis386): Handle the implicit prefix in VEX prefix bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before calling get_valid_dis386. Use rex_original and rex_ignored when printing out REX. (putop): Handle "XY". (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and ymmq_mode. (OP_E_extended): Updated to use OP_E_register and OP_E_memory. (OP_XMM): Handle VEX. (OP_EX): Likewise. (XMM_Fixup): Likewise. (CMP_Fixup): Use ARRAY_SIZE. * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, CPU_FMA_FLAGS and CPU_AVX_FLAGS. (operand_type_init): Add OPERAND_TYPE_REGYMM and OPERAND_TYPE_VEX_IMM4. (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, VexImmExt and SSE2AVX. (operand_types): Add RegYMM, Ymmword and Vex_Imm4. * i386-opc.h (CpuAVX): New. (CpuAES): Likewise. (CpuCLMUL): Likewise. (CpuFMA): Likewise. (Vex): Likewise. (Vex256): Likewise. (VexNDS): Likewise. (VexNDD): Likewise. (VexW0): Likewise. (VexW1): Likewise. (Vex0F): Likewise. (Vex0F38): Likewise. (Vex0F3A): Likewise. (Vex3Sources): Likewise. (VexImmExt): Likewise. (SSE2AVX): Likewise. (RegYMM): Likewise. (Ymmword): Likewise. (Vex_Imm4): Likewise. (Implicit1stXmm0): Likewise. (CpuXsave): Updated. (CpuLM): Likewise. (ByteOkIntel): Likewise. (OldGcc): Likewise. (Control): Likewise. (Unspecified): Likewise. (OTMax): Likewise. (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, vex3sources, veximmext and sse2avx. (i386_operand_type): Add regymm, ymmword and vex_imm4. * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. * i386-reg.tbl: Add AVX registers, ymm0..ymm15. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-02-13gas/Jan Beulich1-2/+11
2008-02-13 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (intel_e09): Also special-case 'bound'. gas/testsuite/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests. * gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e, gas/i386/opcode-intel.d: Adjust. opcodes/ 2008-02-13 Jan Beulich <jbeulich@novell.com> * i386-dis.c (a_mode): New. (cond_jump_mode): Adjust. (Ma): Change to a_mode. (intel_operand_size): Handle a_mode. * i386-opc.tbl: Allow Dword and Qword for bound. * i386-tbl.h: Re-generate.
2008-02-12gas/testsuite/H.J. Lu1-5/+23
2002-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave and x86-64-xsave-intel. * gas/i386/x86-64-xsave-intel.d: New file. * gas/i386/x86-64-xsave.d: Likewise. * gas/i386/x86-64-xsave.s: Likewise. * gas/i386/xsave-intel.d: Likewise. * gas/i386/xsave.d: Likewise. * gas/i386/xsave.s: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flags): Add CpuXsave. * i386-opc.h (CpuXsave): New. (Cpu64): Updated. (i386_cpu_flags): Add cpuxsave. * i386-dis.c (MOD_0FAE_REG_4): New. (RM_0F01_REG_2): Likewise. (MOD_0FAE_REG_5): Updated. (RM_0F01_REG_3): Likewise. (reg_table): Use MOD_0FAE_REG_4. (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated for xrstor. (rm_table): Add RM_0F01_REG_2. * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-24gas/testsuite/H.J. Lu1-7/+7
2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-sib.s: Add tests for r12. * gas/i386/x86-64-sib-intel.d: Updated. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-152008-01-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-9/+19
* i386-dis.c (Mx): New. (PREFIX_0FC3): Likewise. (PREFIX_0FC7_REG_6): Updated. (dis386_twobyte): Use PREFIX_0FC3. (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd. Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on movntss.
2008-01-10gas/testsuite/H.J. Lu1-11/+11
2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/nops.s: Add more tests with opcodes from 0x0f19 to 0x0f1f. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. opcodes/ 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. (REG_0F18): Updated. (reg_table): Updated. (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
2007-12-31gas/testsuite/H.J. Lu1-19/+65
2007-12-31 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/inval.s: Add test for cvtsi2ss/cvtsi2sd. * gas/i386/simd.s: Likewise. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/inval.l: Updated. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/sse2.d: Likewise. * gas/i386/x86-64-opcode.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-12-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Use "%LQ" on cvtpi2ps/cvtsi2sd. (putop): Handle '%' and "LQ". * i386-opc.tbl: Remove IgnoreSize from cvtpi2ps/cvtsi2sd. * i386-tbl.h: Regenerated.
2007-12-22binutils/H.J. Lu1-22/+27
2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * doc/binutils.texi: Document the new intel-mnemonic and intel-mnemonic options for i386 disassembler. gas/testsuite/ 2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/compat-intel.d: New file. * gas/i386/compat.d: Likewise. * gas/i386/compat.s: Likewise. * gas/i386/i386.exp: Run compat. opcodes/ 2007-12-22 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (intel_mnemonic): New. (print_i386_disassembler_options): Display att-mnemonic and intel-mnemonic options. (print_insn): Handle att-mnemonic and intel-mnemonic. (float_reg): Replace SYSV386_COMPAT with "!M" and "M". (putop): Handle "!M" and "M".
2007-10-312007-10-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-7/+7
* i386-dis.c (USE_REG_TABLE): Defined as the previous one + 1. (USE_REG_TABLE): Likewise. (USE_MOD_TABLE): Likewise. (USE_RM_TABLE): Likewise. (USE_PREFIX_TABLE): Likewise. (USE_X86_64_TABLE): Likewise. (USE_3BYTE_TABLE): Likewise.
2007-10-262007-10-26 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-11/+59
* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New. (MOD_0F51): Likewise. (MOD_0FD7): Likewise. (MOD_0FE7_PREFIX_2): Likewise. (MOD_0F382A_PREFIX_2): Likewise. (MOD_0F71_REG_2): Updated. (MOD_0FF0_PREFIX_3): Likewise. (MOD_62_32BIT): Likewise. (dis386_twobyte): Use MOD_0F51 and MOD_0FD7. (prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2. (mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
2007-10-23gas/testsuite/H.J. Lu1-32/+18
2007-10-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/katmai.s: Remove cmpps opcode test. * gas/i386/simd.s: Add tests for cmpss and cmpsd. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/katmai.d: Updated. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_SIMD_Suffix): Renamed to ... (CMP_Fixup): This. Rewrite. (OPSIMD): Renamed to ... (CMP): This. Updated. (prefix_table): Update PREFIX_0FC2 entry.
2007-10-222007-10-22 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-111/+111
* i386-dis.c (prefix_table): Reordered by opcode. (mod_table): Likewise.
2007-10-192007-10-19 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
2007-10-152007-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-892/+892
* i386-dis.c (dis386_twobyte): Reformat. (prefix_table): Likewise. (three_byte_table): Likewise.
2007-10-122007-10-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
2007-10-10Remove extra white space.H.J. Lu1-1/+1
2007-10-102007-10-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-70/+93
* i386-dis.c (v_mode): Defined as previous one + 1. (w_mode): Likewise. (d_mode): Likewise. (q_mode): Likewise. (t_mode): Likewise. (x_mode): Likewise. (m_mode): Likewise. (cond_jump_mode): Likewise. (loop_jcxz_mode): Likewise. (dq_mode): Likewise. (dqw_mode): Likewise. (f_mode): Likewise. (const_1_mode): Likewise. (stack_v_mode): Likewise. (z_mode): Likewise. (o_mode): Likewise. (dqb_mode): Likewise. (dqd_mode): Likewise. (es_reg): Likewise. (cs_reg): Likewise. (ss_reg): Likewise. (ds_reg): Likewise. (fs_reg): Likewise. (gs_reg): Likewise. (eAX_reg): Likewise. (eCX_reg): Likewise. (eDX_reg): Likewise. (eBX_reg): Likewise. (eSP_reg): Likewise. (eBP_reg): Likewise. (eSI_reg): Likewise. (eDI_reg): Likewise. (al_reg): Likewise. (cl_reg): Likewise. (dl_reg): Likewise. (bl_reg): Likewise. (ah_reg): Likewise. (ch_reg): Likewise. (dh_reg): Likewise. (bh_reg): Likewise. (ax_reg): Likewise. (cx_reg): Likewise. (dx_reg): Likewise. (bx_reg): Likewise. (sp_reg): Likewise. (bp_reg): Likewise. (si_reg): Likewise. (di_reg): Likewise. (rAX_reg): Likewise. (rCX_reg): Likewise. (rDX_reg): Likewise. (rBX_reg): Likewise. (rSP_reg): Likewise. (rBP_reg): Likewise. (rSI_reg): Likewise. (rDI_reg): Likewise. (z_mode_ax_reg): Likewise. (indir_dx_reg): Likewise. (DREX_OC1): Updated. (DREX_NO_OC0): Likewise. (DREX_MASK): Likewise. (MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not less than DREX_OC1.
2007-10-08gas/testsuite/H.J. Lu1-2/+3
2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix. * gas/i386/simd-suffix.d: New. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-opcode.d: Updated. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Updated comments for 'Y'. (putop): Don't add 'q' for 'Y' if suffix_always isn't true.
2007-10-05gas/testsuite/H.J. Lu1-1/+1
2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run smx. * gas/i386/smx.d: New. * gas/i386/smx.s: Likewise. opcodes/ 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Add getsec. * i386-gen.c (cpu_flags): Add CpuSMX. * i386-opc.h (CpuSMX): New. (CpuSSSE3): Updated. (i386_cpu_flags): Add cpusmx. * i386-opc.tbl: Add getsec. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2007-10-052007-10-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-31/+31
* i386-dis.c (reg_table): Use "{ XX }" on "(bad)". (prefix_table): Likewise.
2007-10-04gas/testsuite/H.J. Lu1-2/+2
2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/simd.s: Add tests for unpckhpd and unpckhps. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use EXx instead of EXq on unpckhpX and unpckhpX.
2007-10-042007-10-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+4
* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps" instead of "movlpX" and "movhlpX", respectively. (MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of "movhpX" and "movlhpX", respectively.
2007-10-032007-10-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-7/+21
* i386-dis.c (OP_REG): Set add to 0 only when needed. (OP_C): Likewise. (OP_D): Likewise. (OP_MMX): Likewise. (OP_XMM): Likewise. (OP_EM): Likewise. (OP_MXC): Likewise. (OP_EX): Likewise.
2007-10-012007-10-01 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+4
* i386-dis.c (THREE_BYTE_0FBA): Renamed to ... (THREE_BYTE_0F7B): This. (dis386_twobyte): Updated. (three_byte_table): Updated comments.
2007-09-302007-09-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* 386-dis.c (prefix_table): Reformat comment.
2007-09-292007-09-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-579/+578
* 386-dis.c (USE_GROUPS): Renamed to ... (USE_REG_TABLE): This. (USE_OPC_EXT_TABLE): Renamed to ... (USE_MOD_TABLE): This. (USE_OPC_EXT_RM_TABLE): Renamed to ... (USE_RM_TABLE): This. (USE_XXX_TABLE): Reordered. (GRP): Renamed to ... (REG_TABLE): This. (OPC_EXT_TABLE): Renamed to ... (MOD_TABLE): This. (OPC_EXT_RM_TABLE): Renamed to ... (RM_TABLE): This. (GRP_XXX): Renamed to ... (REG_XXX): This. (PREGRP_XXX): Renamed to ... (PREFIX_XXX): This. (OPC_EXT_XXX): Renamed to ... (MOD_XXX): This. (OPC_EXT_RM_XXX): Renamed to ... (RM_XXX): This. (grps): Renamed to ... (reg_table): This (prefix_user_table): Renamed to ... (prefix_table): This (opc_ext_table): Renamed to ... (mod_table): This (opc_ext_rm_table): Renamed to ... (rm_table): This (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (reg_table): Likewise. (prefix_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (get_valid_dis386): Likewise.
2007-09-282007-09-28 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1514/+1554
* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ... (USE_PREFIX_TABLE): This. (X86_64_SPECIAL): Renamed to ... (USE_X86_64_TABLE): This. (IS_3BYTE_OPCODE): Renamed to ... (USE_3BYTE_TABLE): This. (GRPXXX): Removed. (PREGRPXXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (DIS386): New. (GRP): Likewise. (PREGRP): Likewise. (X86_64_TABLE): Likewise. (THREE_BYTE_TABLE): Likewise. (OPC_EXT_TABLE): Likewise. (OPC_EXT_RM_TABLE): Likewise. (GRP_XXX): Likewise. (PREGRP_XXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (grps): Likewise. (prefix_user_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise.
2007-09-272007-09-27 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-3/+3
* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2. (x86_64_table): Likewise. (opc_ext_table): Likewise.
2007-09-27gas/testsuite/gas/H.J. Lu1-96/+254
2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072 * gas/i386/i386.exp: Run x86-64-opcode-inval and x86-64-opcode-inval-intel. * gas/i386/x86-64-opcode-inval-intel.d: New. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval.s: Likewise. opcodes/ 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072 * i386-dis.c: Update comments on '{', '}' and '|' to support only AT&T and Intel modes. (X86_64_4...X86_64_27): New. (dis386): Updated. Use X86_64_4...X86_64_21. (dis386_twobyte): Updated. (float_mem): Likewise. (x86_64_table): Add X86_64_4...X86_64_27. (opc_ext_table): Updated. Use X86_64_22 and X86_64_27. (putop): Updated handling of '{', '}' and '|' to support only AT&T and Intel modes.
2007-09-26gas/testsuite/Jan Beulich1-2/+5
2007-09-26 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-addr32.d: Adjust expectations. opcodes/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_E_extended): Distinguish rip- and eip- relative addressing. Update used_prefixes based on whether any base or index register was printed.
2007-09-20gas/testsuite/H.J. Lu1-1/+11
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sib.s: Add more eiz tests. * gas/i386/x86-64-sib.s: Add more riz tests. * gas/i386/sib-intel.d: Updated. * gas/i386/sib.d: Likewise. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
2007-09-20gas/H.J. Lu1-12/+30
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed. (set_allow_index_reg): New. (allow_index_reg): Likewise. (md_pseudo_table): Add "allow_index_reg" and "disallow_index_reg". (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for fake index registers. (i386_scale): Updated. (i386_index_check): Support fake index registers. (parse_real_register): Return NULL on eiz/riz if fake index registers aren't allowed. gas/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * gas/i386/i386.exp: Run sib-intel, x86-64-sib and x86-64-sib-intel. * gas/i386/nops-1-i386-i686.d: Updated. * gas/i386/nops-1-i386.d: Likewise. * gas/i386/nops-1.d: Likewise. * gas/i386/nops-2-i386.d: Likewise. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3.d : Likewise. * gas/i386/sib.d: Likewise. * gas/i386/sib.s: Use %eiz in testcases. * gas/i386/sib-intel.d: New. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. * gas/i386/x86-64-sib.s: Likewise. ld/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsld1.dd: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * 386-dis.c (index64): New. (index32): Likewise. (intel_index64): Likewise. (intel_index32): Likewise. (att_index64): Likewise. (att_index32): Likewise. (print_insn): Set index64 and index32. (OP_E_extended): Use index64/index32 for index register for SIB with INDEX == 4. * i386-opc.h (RegEiz): New. (RegRiz): Likewise. * i386-reg.tbl: Add eiz and riz. * i386-tbl.h: Regenerated.
2007-09-19gas/testsuite/gas/H.J. Lu1-3/+6
2007-09-19 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intelok.s: Add tests for memory without base. * gas/i386/intelok.d: Updated. * gas/i386/intelok.e: Likewise. opcodes/ 2007-09-19 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Always display scale for memory.
2007-09-14Add AMD SSE5 supportMichael Meissner1-8/+1559
2007-09-142007-09-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-16/+13
* i386-dis.c (get_valid_dis386): Take a pointer to disassemble_info. Handle IS_3BYTE_OPCODE. (print_insn): Updated. Don't handle IS_3BYTE_OPCODE here.
2007-08-312007-08-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-6/+42
* i386-dis.c (OPC_EXT_40...OPC_EXT_45): New. (dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45. (opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
2007-08-31gas/testsuite/H.J. Lu1-72/+19
2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/svme.s: Updated to accept eax in 32bit and rax in 64bit. * gas/i386/svme.d: Updated. * gas/i386/svme64.d: Likewise. opcodes/ 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (SVME_Fixup): Removed. (OPC_EXT_39): New. (OPC_EXT_RM_6): Likewise. (grps): Use OPC_EXT_39. (opc_ext_table): Add OPC_EXT_39. (opc_ext_rm_table): Add OPC_EXT_RM_6. * i386-opc.tbl: Correct SVME instructions to take register operand only. * i386-tbl.h: Regenerated.
2007-08-312007-08-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* Makefile.am (INCLUDES): Remove -D_GNU_SOURCE. * Makefile.in: Regenerated. * configure.in (AC_GNU_SOURCE): Added. (AC_PROG_CC): Moved before AC_GNU_SOURCE. (AC_CHECK_DECLS): Add stpcpy. * configure: Regenerated. * config.in: Likewise. * i386-dis.c: Include "sysdep.h" before "dis-asm.h". * sysdep.h (stpcpy): New.
2007-08-30gas/testsuite/H.J. Lu1-24/+19
2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/amd.s: Add rdtscp. * gas/i386/amd.d: Updated. * gas/i386/mem-intel.d: Update invlpg for BYTE PTR. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-opcode.s: Add swapgs. * gas/i386/x86-64-opcode.d: Updated. opcodes/ 2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (INVLPG_Fixup): Removed. (OPC_EXT_38): New. (OPC_EXT_RM_5): Likewise. (grps): Use OPC_EXT_38. (opc_ext_table): Add OPC_EXT_38. (opc_ext_rm_table): Add OPC_EXT_RM_5.
2007-08-302007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-21/+28
* i386-dis.c (SIMD_Fixup): Removed. (OPC_EXT_34...OPC_EXT_37): New. (dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35. (prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37. (opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
2007-08-292007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-57/+111
* i386-dis.c (OPC_EXT_25...OPC_EXT_33): New. (dis386): Use OPC_EXT_0...OPC_EXT_2. (dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5. (grps): Updated to use OPC_EXT_6...OPC_EXT_31. (prefix_user_table): Use OPC_EXT_32. (x86_64_table): Use OPC_EXT_33. (opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
2007-08-292007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* i386-dis.c (prefix_user_table): Fix comment.
2007-08-29gas/testsuite/H.J. Lu1-505/+450
2007-08-29 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run reg and reg-intel. * gas/i386/katmai.d: Update bad instructions. * gas/i386/reg.s: New. Add tests for instructions with one register operand. * gas/i386/reg-intel.d: Likewise. * gas/i386/reg.d: Likewise. opcodes/ 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_Skip_MODRM): New. (OP_Monitor): Likewise. (OP_Mwait): Likewise. (Mb): Likewise. (Skip_MODRM): Likewise. (USE_OPC_EXT_TABLE): Likewise. (USE_OPC_EXT_RM_TABLE): Likewise. (PREGRP98...PREGRP100): Likewise. (OPC_EXT_0...OPC_EXT_24): Likewise. (OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise. (lock_prefix): Likewise. (data_prefix): Likewise. (addr_prefix): Likewise. (repz_prefix): Likewise. (repnz_prefix): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise. (OP_VMX): Removed. (OP_0fae): Likewise. (PNI_Fixup): Likewise. (VMX_Fixup): Likewise. (VM): Likewise. (twobyte_uses_DATA_prefix): Likewise. (twobyte_uses_REPNZ_prefix): Likewise. (twobyte_uses_REPZ_prefix): Likewise. (threebyte_0x38_uses_DATA_prefix): Likewise. (threebyte_0x38_uses_REPNZ_prefix): Likewise. (threebyte_0x38_uses_REPZ_prefix): Likewise. (threebyte_0x3a_uses_DATA_prefix): Likewise. (threebyte_0x3a_uses_REPNZ_prefix): Likewise. (threebyte_0x3a_uses_REPZ_prefix): Likewise. (grps): Use OPC_EXT_0...OPC_EXT_24. (prefix_user_table): Use PREGRP98. (print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix, uses_REPNZ_prefix and uses_REPZ_prefix. Initialize repz_prefix, repnz_prefix, lock_prefix, addr_prefix and data_prefix based on prefixes. Call get_valid_dis386 to get a pointer to the valid dis386. Print out prefixes if they aren't NULL. (OP_C): Clear lock_prefix if PREFIX_LOCK is used. (REP_Fixup): Set repz_prefix to "rep " when seeing PREFIX_REPZ.
generated by cgit v1.1 at 2024-11-26 10:49:01 +0000