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path: root/opcodes/i386-dis.c
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2007-10-262007-10-26 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-11/+59
* i386-dis.c (MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3): New. (MOD_0F51): Likewise. (MOD_0FD7): Likewise. (MOD_0FE7_PREFIX_2): Likewise. (MOD_0F382A_PREFIX_2): Likewise. (MOD_0F71_REG_2): Updated. (MOD_0FF0_PREFIX_3): Likewise. (MOD_62_32BIT): Likewise. (dis386_twobyte): Use MOD_0F51 and MOD_0FD7. (prefix_table): Use MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0FE7_PREFIX_2 and MOD_0F382A_PREFIX_2. (mod_table): Add MOD_0F2B_PREFIX_0...MOD_0F2B_PREFIX_3, MOD_0F51, MOD_0FD7 and MOD_0F382A_PREFIX_2.
2007-10-23gas/testsuite/H.J. Lu1-32/+18
2007-10-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/katmai.s: Remove cmpps opcode test. * gas/i386/simd.s: Add tests for cmpss and cmpsd. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/katmai.d: Updated. * gas/i386/simd-intel.d: Likewise. * gas/i386/simd-suffix.d: Likewise. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-23 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_SIMD_Suffix): Renamed to ... (CMP_Fixup): This. Rewrite. (OPSIMD): Renamed to ... (CMP): This. Updated. (prefix_table): Update PREFIX_0FC2 entry.
2007-10-222007-10-22 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-111/+111
* i386-dis.c (prefix_table): Reordered by opcode. (mod_table): Likewise.
2007-10-192007-10-19 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (prefix_table): Use XS on psrldq and pslldq.
2007-10-152007-10-15 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-892/+892
* i386-dis.c (dis386_twobyte): Reformat. (prefix_table): Likewise. (three_byte_table): Likewise.
2007-10-122007-10-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (prefix_table): Reformat pblendvb and blendvps.
2007-10-10Remove extra white space.H.J. Lu1-1/+1
2007-10-102007-10-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-70/+93
* i386-dis.c (v_mode): Defined as previous one + 1. (w_mode): Likewise. (d_mode): Likewise. (q_mode): Likewise. (t_mode): Likewise. (x_mode): Likewise. (m_mode): Likewise. (cond_jump_mode): Likewise. (loop_jcxz_mode): Likewise. (dq_mode): Likewise. (dqw_mode): Likewise. (f_mode): Likewise. (const_1_mode): Likewise. (stack_v_mode): Likewise. (z_mode): Likewise. (o_mode): Likewise. (dqb_mode): Likewise. (dqd_mode): Likewise. (es_reg): Likewise. (cs_reg): Likewise. (ss_reg): Likewise. (ds_reg): Likewise. (fs_reg): Likewise. (gs_reg): Likewise. (eAX_reg): Likewise. (eCX_reg): Likewise. (eDX_reg): Likewise. (eBX_reg): Likewise. (eSP_reg): Likewise. (eBP_reg): Likewise. (eSI_reg): Likewise. (eDI_reg): Likewise. (al_reg): Likewise. (cl_reg): Likewise. (dl_reg): Likewise. (bl_reg): Likewise. (ah_reg): Likewise. (ch_reg): Likewise. (dh_reg): Likewise. (bh_reg): Likewise. (ax_reg): Likewise. (cx_reg): Likewise. (dx_reg): Likewise. (bx_reg): Likewise. (sp_reg): Likewise. (bp_reg): Likewise. (si_reg): Likewise. (di_reg): Likewise. (rAX_reg): Likewise. (rCX_reg): Likewise. (rDX_reg): Likewise. (rBX_reg): Likewise. (rSP_reg): Likewise. (rBP_reg): Likewise. (rSI_reg): Likewise. (rDI_reg): Likewise. (z_mode_ax_reg): Likewise. (indir_dx_reg): Likewise. (DREX_OC1): Updated. (DREX_NO_OC0): Likewise. (DREX_MASK): Likewise. (MAX_BYTEMODE): New. Issue an error if MAX_BYTEMODE is not less than DREX_OC1.
2007-10-08gas/testsuite/H.J. Lu1-2/+3
2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run simd-suffix and x86-64-simd-suffix. * gas/i386/simd-suffix.d: New. * gas/i386/x86-64-simd-suffix.d: Likewise. * gas/i386/x86-64-opcode.d: Updated. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-08 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Updated comments for 'Y'. (putop): Don't add 'q' for 'Y' if suffix_always isn't true.
2007-10-05gas/testsuite/H.J. Lu1-1/+1
2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run smx. * gas/i386/smx.d: New. * gas/i386/smx.s: Likewise. opcodes/ 2007-10-05 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Add getsec. * i386-gen.c (cpu_flags): Add CpuSMX. * i386-opc.h (CpuSMX): New. (CpuSSSE3): Updated. (i386_cpu_flags): Add cpusmx. * i386-opc.tbl: Add getsec. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2007-10-052007-10-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-31/+31
* i386-dis.c (reg_table): Use "{ XX }" on "(bad)". (prefix_table): Likewise.
2007-10-04gas/testsuite/H.J. Lu1-2/+2
2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/simd.s: Add tests for unpckhpd and unpckhps. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Use EXx instead of EXq on unpckhpX and unpckhpX.
2007-10-042007-10-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+4
* i386-dis.c (MOD_0F12_PREFIX_0): Use "movlps" and "movhlps" instead of "movlpX" and "movhlpX", respectively. (MOD_0F16_PREFIX_0): Use "movhps" and "movlhps" instead of "movhpX" and "movlhpX", respectively.
2007-10-032007-10-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-7/+21
* i386-dis.c (OP_REG): Set add to 0 only when needed. (OP_C): Likewise. (OP_D): Likewise. (OP_MMX): Likewise. (OP_XMM): Likewise. (OP_EM): Likewise. (OP_MXC): Likewise. (OP_EX): Likewise.
2007-10-012007-10-01 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+4
* i386-dis.c (THREE_BYTE_0FBA): Renamed to ... (THREE_BYTE_0F7B): This. (dis386_twobyte): Updated. (three_byte_table): Updated comments.
2007-09-302007-09-30 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* 386-dis.c (prefix_table): Reformat comment.
2007-09-292007-09-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-579/+578
* 386-dis.c (USE_GROUPS): Renamed to ... (USE_REG_TABLE): This. (USE_OPC_EXT_TABLE): Renamed to ... (USE_MOD_TABLE): This. (USE_OPC_EXT_RM_TABLE): Renamed to ... (USE_RM_TABLE): This. (USE_XXX_TABLE): Reordered. (GRP): Renamed to ... (REG_TABLE): This. (OPC_EXT_TABLE): Renamed to ... (MOD_TABLE): This. (OPC_EXT_RM_TABLE): Renamed to ... (RM_TABLE): This. (GRP_XXX): Renamed to ... (REG_XXX): This. (PREGRP_XXX): Renamed to ... (PREFIX_XXX): This. (OPC_EXT_XXX): Renamed to ... (MOD_XXX): This. (OPC_EXT_RM_XXX): Renamed to ... (RM_XXX): This. (grps): Renamed to ... (reg_table): This (prefix_user_table): Renamed to ... (prefix_table): This (opc_ext_table): Renamed to ... (mod_table): This (opc_ext_rm_table): Renamed to ... (rm_table): This (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (reg_table): Likewise. (prefix_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (get_valid_dis386): Likewise.
2007-09-282007-09-28 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1514/+1554
* 386-dis.c (USE_PREFIX_USER_TABLE): Renamed to ... (USE_PREFIX_TABLE): This. (X86_64_SPECIAL): Renamed to ... (USE_X86_64_TABLE): This. (IS_3BYTE_OPCODE): Renamed to ... (USE_3BYTE_TABLE): This. (GRPXXX): Removed. (PREGRPXXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (DIS386): New. (GRP): Likewise. (PREGRP): Likewise. (X86_64_TABLE): Likewise. (THREE_BYTE_TABLE): Likewise. (OPC_EXT_TABLE): Likewise. (OPC_EXT_RM_TABLE): Likewise. (GRP_XXX): Likewise. (PREGRP_XXX): Likewise. (X86_64_XXX): Likewise. (THREE_BYTE_XXX): Likewise. (OPC_EXT_XXX): Likewise. (OPC_EXT_RM_XXX): Likewise. (dis386): Updated. (dis386_twobyte): Likewise. (grps): Likewise. (prefix_user_table): Likewise. (x86_64_table): Likewise. (three_byte_table): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise.
2007-09-272007-09-27 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-3/+3
* i386-dis.c (dis386): Swap X86_64_27 with OPC_EXT_2. (x86_64_table): Likewise. (opc_ext_table): Likewise.
2007-09-27gas/testsuite/gas/H.J. Lu1-96/+254
2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072 * gas/i386/i386.exp: Run x86-64-opcode-inval and x86-64-opcode-inval-intel. * gas/i386/x86-64-opcode-inval-intel.d: New. * gas/i386/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval.s: Likewise. opcodes/ 2007-09-27 H.J. Lu <hongjiu.lu@intel.com> PR binutils/5072 * i386-dis.c: Update comments on '{', '}' and '|' to support only AT&T and Intel modes. (X86_64_4...X86_64_27): New. (dis386): Updated. Use X86_64_4...X86_64_21. (dis386_twobyte): Updated. (float_mem): Likewise. (x86_64_table): Add X86_64_4...X86_64_27. (opc_ext_table): Updated. Use X86_64_22 and X86_64_27. (putop): Updated handling of '{', '}' and '|' to support only AT&T and Intel modes.
2007-09-26gas/testsuite/Jan Beulich1-2/+5
2007-09-26 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-addr32.d: Adjust expectations. opcodes/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_E_extended): Distinguish rip- and eip- relative addressing. Update used_prefixes based on whether any base or index register was printed.
2007-09-20gas/testsuite/H.J. Lu1-1/+11
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sib.s: Add more eiz tests. * gas/i386/x86-64-sib.s: Add more riz tests. * gas/i386/sib-intel.d: Updated. * gas/i386/sib.d: Likewise. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset].
2007-09-20gas/H.J. Lu1-12/+30
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed. (set_allow_index_reg): New. (allow_index_reg): Likewise. (md_pseudo_table): Add "allow_index_reg" and "disallow_index_reg". (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for fake index registers. (i386_scale): Updated. (i386_index_check): Support fake index registers. (parse_real_register): Return NULL on eiz/riz if fake index registers aren't allowed. gas/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * gas/i386/i386.exp: Run sib-intel, x86-64-sib and x86-64-sib-intel. * gas/i386/nops-1-i386-i686.d: Updated. * gas/i386/nops-1-i386.d: Likewise. * gas/i386/nops-1.d: Likewise. * gas/i386/nops-2-i386.d: Likewise. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3.d : Likewise. * gas/i386/sib.d: Likewise. * gas/i386/sib.s: Use %eiz in testcases. * gas/i386/sib-intel.d: New. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. * gas/i386/x86-64-sib.s: Likewise. ld/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsld1.dd: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * 386-dis.c (index64): New. (index32): Likewise. (intel_index64): Likewise. (intel_index32): Likewise. (att_index64): Likewise. (att_index32): Likewise. (print_insn): Set index64 and index32. (OP_E_extended): Use index64/index32 for index register for SIB with INDEX == 4. * i386-opc.h (RegEiz): New. (RegRiz): Likewise. * i386-reg.tbl: Add eiz and riz. * i386-tbl.h: Regenerated.
2007-09-19gas/testsuite/gas/H.J. Lu1-3/+6
2007-09-19 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intelok.s: Add tests for memory without base. * gas/i386/intelok.d: Updated. * gas/i386/intelok.e: Likewise. opcodes/ 2007-09-19 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Always display scale for memory.
2007-09-14Add AMD SSE5 supportMichael Meissner1-8/+1559
2007-09-142007-09-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-16/+13
* i386-dis.c (get_valid_dis386): Take a pointer to disassemble_info. Handle IS_3BYTE_OPCODE. (print_insn): Updated. Don't handle IS_3BYTE_OPCODE here.
2007-08-312007-08-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-6/+42
* i386-dis.c (OPC_EXT_40...OPC_EXT_45): New. (dis386_twobyte): Use OPC_EXT_40...OPC_EXT_45. (opc_ext_table): Add OPC_EXT_40...OPC_EXT_45.
2007-08-31gas/testsuite/H.J. Lu1-72/+19
2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/svme.s: Updated to accept eax in 32bit and rax in 64bit. * gas/i386/svme.d: Updated. * gas/i386/svme64.d: Likewise. opcodes/ 2007-08-31 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (SVME_Fixup): Removed. (OPC_EXT_39): New. (OPC_EXT_RM_6): Likewise. (grps): Use OPC_EXT_39. (opc_ext_table): Add OPC_EXT_39. (opc_ext_rm_table): Add OPC_EXT_RM_6. * i386-opc.tbl: Correct SVME instructions to take register operand only. * i386-tbl.h: Regenerated.
2007-08-312007-08-31 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* Makefile.am (INCLUDES): Remove -D_GNU_SOURCE. * Makefile.in: Regenerated. * configure.in (AC_GNU_SOURCE): Added. (AC_PROG_CC): Moved before AC_GNU_SOURCE. (AC_CHECK_DECLS): Add stpcpy. * configure: Regenerated. * config.in: Likewise. * i386-dis.c: Include "sysdep.h" before "dis-asm.h". * sysdep.h (stpcpy): New.
2007-08-30gas/testsuite/H.J. Lu1-24/+19
2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/amd.s: Add rdtscp. * gas/i386/amd.d: Updated. * gas/i386/mem-intel.d: Update invlpg for BYTE PTR. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-opcode.s: Add swapgs. * gas/i386/x86-64-opcode.d: Updated. opcodes/ 2007-08-30 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (INVLPG_Fixup): Removed. (OPC_EXT_38): New. (OPC_EXT_RM_5): Likewise. (grps): Use OPC_EXT_38. (opc_ext_table): Add OPC_EXT_38. (opc_ext_rm_table): Add OPC_EXT_RM_5.
2007-08-302007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-21/+28
* i386-dis.c (SIMD_Fixup): Removed. (OPC_EXT_34...OPC_EXT_37): New. (dis386_twobyte): Use OPC_EXT_34 and OPC_EXT_35. (prefix_user_table): Use OPC_EXT_36 and OPC_EXT_37. (opc_ext_table): Add OPC_EXT_34...OPC_EXT_37.
2007-08-292007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-57/+111
* i386-dis.c (OPC_EXT_25...OPC_EXT_33): New. (dis386): Use OPC_EXT_0...OPC_EXT_2. (dis386_twobyte): Use OPC_EXT_3...OPC_EXT_5. (grps): Updated to use OPC_EXT_6...OPC_EXT_31. (prefix_user_table): Use OPC_EXT_32. (x86_64_table): Use OPC_EXT_33. (opc_ext_table): Reorder and add OPC_EXT_25...OPC_EXT_33.
2007-08-292007-08-29 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* i386-dis.c (prefix_user_table): Fix comment.
2007-08-29gas/testsuite/H.J. Lu1-505/+450
2007-08-29 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run reg and reg-intel. * gas/i386/katmai.d: Update bad instructions. * gas/i386/reg.s: New. Add tests for instructions with one register operand. * gas/i386/reg-intel.d: Likewise. * gas/i386/reg.d: Likewise. opcodes/ 2007-08-29 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_Skip_MODRM): New. (OP_Monitor): Likewise. (OP_Mwait): Likewise. (Mb): Likewise. (Skip_MODRM): Likewise. (USE_OPC_EXT_TABLE): Likewise. (USE_OPC_EXT_RM_TABLE): Likewise. (PREGRP98...PREGRP100): Likewise. (OPC_EXT_0...OPC_EXT_24): Likewise. (OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise. (lock_prefix): Likewise. (data_prefix): Likewise. (addr_prefix): Likewise. (repz_prefix): Likewise. (repnz_prefix): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise. (OP_VMX): Removed. (OP_0fae): Likewise. (PNI_Fixup): Likewise. (VMX_Fixup): Likewise. (VM): Likewise. (twobyte_uses_DATA_prefix): Likewise. (twobyte_uses_REPNZ_prefix): Likewise. (twobyte_uses_REPZ_prefix): Likewise. (threebyte_0x38_uses_DATA_prefix): Likewise. (threebyte_0x38_uses_REPNZ_prefix): Likewise. (threebyte_0x38_uses_REPZ_prefix): Likewise. (threebyte_0x3a_uses_DATA_prefix): Likewise. (threebyte_0x3a_uses_REPNZ_prefix): Likewise. (threebyte_0x3a_uses_REPZ_prefix): Likewise. (grps): Use OPC_EXT_0...OPC_EXT_24. (prefix_user_table): Use PREGRP98. (print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix, uses_REPNZ_prefix and uses_REPZ_prefix. Initialize repz_prefix, repnz_prefix, lock_prefix, addr_prefix and data_prefix based on prefixes. Call get_valid_dis386 to get a pointer to the valid dis386. Print out prefixes if they aren't NULL. (OP_C): Clear lock_prefix if PREFIX_LOCK is used. (REP_Fixup): Set repz_prefix to "rep " when seeing PREFIX_REPZ.
2007-08-28gas/H.J. Lu1-7/+12
2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_suffix): Handle cmpxchg8b in Intel mode. gas/testsuite/ 2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/mem.s: New. Add tests for instructions with one memory operand. * gas/i386/x86-64-mem.s: Likewise. * gas/i386/mem-intel.d: Updated. * gas/i386/mem.d: Likewise. * gas/i386/x86-64-mem-intel.d: Likewise. * gas/i386/x86-64-mem.d: Likewise. opcodes/ 2007-08-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (Md): New. (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use Md on ldmxcsr and stmxcsr. Use b_mode on clflush. (OP_0fae): Clear bytemode for sfence.
2007-08-022007-08-01 Michael Snyder <msnyder@access-company.com>Michael Snyder1-1/+1
* i386-dis.c (print_insn): Guard against NULL.
2007-07-29gas/testsuite/H.J. Lu1-13/+14
2007-07-29 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4834 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add tests for SSE4 instructions. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-07-29 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4834 * i386-dis.c (EXw): New. (prefix_user_table): Updated to use EXw, EXd and EXq for SSE4 instructions when appropriated.
2007-07-28gas/testsuite/H.J. Lu1-35/+36
2007-07-28 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4835 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add new tests. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-07-28 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4835 * i386-dis.c (Eq): New. (EMC): Renamed to ... (EMCq): This. Use q_mode instead of v_mode. (prefix_user_table): Updated to use EXd, EXq, EMCq, Ed and Eq when appropriated.
2007-07-28gas/testsuite/H.J. Lu1-5/+5
2007-07-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-opcode.d: Updated. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/x86-64-simd.s: Add movq. opcodes/ 2007-07-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (dis386_twobyte): Change "movd" to "movK". (prefix_user_table): Likewise. Use EXq instead of EXx on "movq".
2007-07-16gas/testsuite/H.J. Lu1-4/+4
2007-07-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/simd.s: Add tests for punpcklbw, punpckldq, punpcklwd and punpcklqdq. * gas/i386/x86-64-simd.s: Likewise. * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. opcodes/ 2007-07-16 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EMq): Removed. (EMx): New. (prefix_user_table): Replace EMq with EMx.
2007-07-05Change source files over to GPLv3.Nick Clifton1-10/+12
2007-06-23gas/testsuite/H.J. Lu1-186/+224
2007-06-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4667 * gas/i386/i386.exp: Run simd, simd-intel, x86-64-simd and x86-64-simd-intel. * gas/i386/opcode-intel.d: Updated. * gas/i386/simd-intel.d: New. * gas/i386/simd.d: Likewise. * gas/i386/simd.s: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/x86-64-simd.s: Likewise. opcodes/ 2007-06-23 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4667 * i386-dis.c (EX): Removed. (EMd): New. (EMq): Likewise. (EXd): Likewise. (EXq): Likewise. (EXx): Likewise. (PREGRP93...PREGRP97): Likewise. (dis386_twobyte): Updated. (prefix_user_table): Updated. Add PREGRP93...PREGRP97. (OP_EX): Remove Intel syntax handling.
2007-05-15gas/testsuite/H.J. Lu1-1/+1
2007-05-14 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4502 * gas/i386/amd.d: Replace "pfmulhrw" with "pmulhrw". opcodes/ 2007-05-14 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4502 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw".
2007-05-072007-05-07 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries for some SSE4 instructions. (threebyte_0x3a_uses_DATA_prefix): Likewise.
2007-05-03gas/H.J. Lu1-1/+7
2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Don't explicitly check suffix for crc32 in Intel mode. (process_suffix): Issue an error for crc32 if the operand size is ambiguous. gas/testsuite/ 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: Updated. * gas/i386/crc32.d: Likewise. * gas/i386/sse4_2.d: Likewise. * gas/i386/x86-64-crc32-intel.d: Likewise. * gas/i386/x86-64-crc32.d: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/crc32.s: Remove crc32 instructions with ambiguous operand size and suffix in crc32 instructions in Intel mode. * gas/i386/x86-64-crc32.s: Likewise. * gas/i386/sse4_2.s: Remove crc32 instructions with ambiguous operand size. * gas/i386/x86-64-sse4_2.s: Likewise. * gas/i386/i386.exp: Run inval-crc32 and x86-64-inval-crc32. * gas/i386/inval-crc32.l: New. * gas/i386/inval-crc32.s: Likewise. * gas/i386/x86-64-inval-crc32.l: Likewise. * gas/i386/x86-64-inval-crc32.s: Likewise. opcodes/ 2007-05-03 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode. * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand type for crc32.
2007-05-01gas/config/H.J. Lu1-7/+5
2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Check suffix for crc32 in Intel mdoe. (process_suffix): Default the suffix of 8bit crc32 to BYTE_MNEM_SUFFIX. (check_byte_reg): Skip check for 8bit crc32. gas/testsuite/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/crc32-intel.d: New file. * gas/i386/crc32.d:Likewise. * gas/i386/crc32.s:Likewise. * gas/i386/x86-64-crc32-intel.d:Likewise. * gas/i386/x86-64-crc32.d:Likewise. * gas/i386/x86-64-crc32.s:Likewise. * gas/i386/i386.exp: Run crc32, crc32-intel, x86-64-crc32 and x86-64-crc32-intel. opcodes/ 2007-05-01 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and check data size prefix in 16bit mode. * i386-opc.c (i386_optab): Default crc32 to non-8bit and support Intel mode.
2007-04-272007-04-27 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+1
* i386-dis.c (modrm): Put reg before rm.
2007-04-27gas/testsuite/H.J. Lu1-10/+61
2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4430 * gas/i386/amd.d: Updated. * gas/i386/immed32.d: Likewise. * gas/i386/intel.d: Likewise. * gas/i386/intel16.d: Likewise. * gas/i386/intelok.d: Likewise. * gas/i386/jump16.d: Likewise. * gas/i386/naked.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. * gas/i386/prescott.d: Likewise. * gas/i386/ssemmx2.d: Likewise. * gas/i386/tlsd.d: Likewise. * gas/i386/tlspic.d: Likewise. * gas/i386/x86-64-addr32.d: Likewise. * gas/i386/x86-64-prescott.d: Likewise. * gas/i386/x86-64-rip.d: Likewise. * gas/i386/x86_64.d: Likewise. ld/testsuite/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4430 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsbindesc.dd: Likewise * ld-i386/tlsdesc.dd: Likewise * ld-i386/tlsgdesc.dd: Likewise * ld-i386/tlsnopic.dd: Likewise * ld-i386/tlspic.dd: Likewise * ld-x86-64/tlsbin.dd: Likewise * ld-x86-64/tlsbindesc.dd: Likewise * ld-x86-64/tlsdesc.dd: Likewise * ld-x86-64/tlsgdesc.dd: Likewise * ld-x86-64/tlspic.dd: Likewise opcodes/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4430 * i386-dis.c (print_displacement): New. (OP_E): Call print_displacement instead of print_operand_value to output displacement when either base or index exist. Print the explicit zero displacement in 16bit mode.
2007-04-26gas/testsuite/H.J. Lu1-4/+16
2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4429 * gas/i386/i386.exp: Run "x86-64-addr32-intel" and "x86-64-rip-intel". * gas/i386/intelok.d: Updated. * gas/i386/x86-64-addr32-intel.d: New file. * gas/i386/x86-64-rip-intel.d: Likewise. opcodes/ 2007-04-26 H.J. Lu <hongjiu.lu@intel.com> PR binutils/4429 * i386-dis.c (print_insn): Also swap the order of op_riprel when swapping op_index. Break when the RIP relative address is printed. (OP_E): Properly handle RIP relative addressing and print the explicit zero displacement for Intel mode.
2007-04-18gas/H.J. Lu1-9/+135
2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4. (match_template): Handle operand size for crc32 in SSE4.2. (process_suffix): Handle operand type for crc32 in SSE4.2. (output_insn): Support SSE4.2. gas/testsuite/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2. * gas/i386/sse4_2.d: New file. * gas/i386/sse4_2.s: Likewise. * gas/i386/x86-64-sse4_2.d: Likewise. * gas/i386/x86-64-sse4_2.s: Likewise. opcodes/ 2007-04-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (CRC32_Fixup): New. (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90, PREGRP91): New. (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2. (threebyte_0x3a_uses_DATA_prefix): Likewise. (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90 and PREGRP91. (three_byte_table): Likewise. * i386-opc.c (i386_optab): Add SSE4.2 opcodes. * gas/config/tc-i386.h (CpuSSE4_2): New. (CpuSSE4): Likewise. (CpuUnknownFlags): Add CpuSSE4_2.
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