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path: root/opcodes/i386-dis.c
AgeCommit message (Expand)AuthorFilesLines
2011-01-17Add support for TBM instructions.Quentin Neill1-5/+28
2011-01-05Implement BMI instructions.H.J. Lu1-4/+80
2011-01-04Add VexGdq.H.J. Lu1-2/+8
2010-12-31Add x86-64 ILP32 support.H.J. Lu1-0/+5
2010-10-02Remove duplicated RMAL.H.J. Lu1-1/+0
2010-08-31Fix "pushw imm16" for x86-64 disassembler.H.J. Lu1-38/+30
2010-08-17Replace Eb with Mb on prefetch and prefetchw.H.J. Lu1-2/+2
2010-08-06Add ud1 to x86.H.J. Lu1-2/+2
2010-07-28Add 0F to VEX opcode enums.H.J. Lu1-2259/+2259
2010-07-05Replace rdrnd with rdrand.H.J. Lu1-1/+1
2010-07-01Support AVX Programming Reference (June, 2010)H.J. Lu1-3/+52
2010-05-26Add SIB.H.J. Lu1-4/+28
2010-04-16Remove extra breack.H.J. Lu1-1/+0
2010-04-16Return bad_opcode on unknown bits in opcode.H.J. Lu1-5/+17
2010-04-09bfd/ChangeLogNick Clifton1-8/+0
2010-03-232010-03-22 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-18/+4
2010-02-11Update copyright.H.J. Lu1-1/+1
2010-02-112010-02-10 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-2/+73
2010-01-28Allow VL=1 on scalar FMA instructions.H.J. Lu1-13/+18
2010-01-27Allow VL=1 on AVX scalar instructions.H.J. Lu1-44/+125
2010-01-24Remove trailing { Bad_Opcode }.H.J. Lu1-1/+0
2010-01-24Remove trailing { Bad_Opcode } in vex_len_table.H.J. Lu1-1/+0
2010-01-24Remove trailing { Bad_Opcode }.H.J. Lu1-1/+0
2010-01-24Remove trailing "(bad)" entries and replace { "(bad)", { XX } }H.J. Lu1-3561/+2647
2010-01-21Add xsave64 and xrstor64.H.J. Lu1-3/+3
2010-01-14Add names_mm, names_xmm and names_ymm.H.J. Lu1-58/+104
2010-01-13Update commentsH.J. Lu1-3/+3
2010-01-13Remove rex_originalH.J. Lu1-7/+2
2009-12-15Add VEX_W_3818_P_2_M_0.H.J. Lu1-1/+7
2009-12-15Reformat vex_w_table.H.J. Lu1-2/+2
2009-12-15Add VEX_W_382X_P_2_M_0.H.J. Lu1-4/+28
2009-12-15Reformat vex_w_table.H.J. Lu1-3/+3
2009-12-15Add USE_VEX_W_TABLE, VEX_W_TABLE and VEX_W_XXX.H.J. Lu1-249/+1753
2009-12-15Reformat vex_len_table.H.J. Lu1-4/+6
2009-12-14Rename MOD_VEX_51 to MOD_VEX_50.H.J. Lu1-3/+3
2009-12-12Set vex.w to 0 for VEX C5 prefix.H.J. Lu1-1/+2
2009-12-122009-12-11 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-0/+1
2009-12-112009-12-11 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-54/+63
2009-12-11Add -Wshadow to the gcc command line options used when compiling the binutils.Nick Clifton1-32/+32
2009-12-04Support fxsave64 and fxrstor64.H.J. Lu1-2/+20
2009-11-252009-11-17 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-10/+23
2009-11-192009-11-18 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-9/+11
2009-11-182009-11-18 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-14/+2
2009-11-182009-11-17 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-16/+391
2009-11-142009-11-13 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-9/+1
2009-11-13Check rex_ignored.H.J. Lu1-1/+1
2009-11-13Rewrite prefix processing.H.J. Lu1-186/+281
2009-11-12gas/testsuite/H.J. Lu1-11/+33
2009-11-062009-11-06 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-9/+6
2009-11-052009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-5/+733
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