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path: root/opcodes/i386-dis-evex-w.h
AgeCommit message (Expand)AuthorFilesLines
2021-03-10x86/Intel: correct AVX512 S/G disassemblyJan Beulich1-25/+0
2021-03-10x86: reuse further VEX entries for EVEXJan Beulich1-4/+4
2021-03-10x86: reuse VEX entries for EVEX vperm{q,pd}Jan Beulich1-10/+0
2021-03-10x86: re-arrange order of decode for various EVEX opcodesJan Beulich1-63/+48
2020-07-14x86: drop Rdq, Rd, and MaskRJan Beulich1-4/+4
2020-07-14x86: simplify decode of opcodes valid with (embedded) 66 prefix onlyJan Beulich1-134/+134
2020-07-14x86: drop need_vex_regJan Beulich1-5/+5
2020-07-14x86: extend %BW use to VP{COMPRESS,EXPAND}{B,W}Jan Beulich1-10/+0
2020-07-14x86-64: fix {,V}PCMPESTR{I,M} disassembly in Intel modeJan Beulich1-4/+4
2020-07-14x86: fold VCMP_Fixup() into CMP_Fixup()Jan Beulich1-2/+2
2020-07-07x86: introduce %BW to avoid going through vex_w_table[]Jan Beulich1-55/+0
2020-07-06x86: use %LW / %XW instead of going through vex_w_table[]Jan Beulich1-75/+0
2020-07-06x86: most VBROADCAST{F,I}{32,64}x* only accept memory operandsJan Beulich1-8/+8
2020-07-06x86: drop EVEX table entries that can be made served by VEX onesJan Beulich1-30/+30
2020-07-06x86: AVX512 VPERM{D,Q,PS,PD} insns need to honor EVEX.L'LJan Beulich1-2/+2
2020-07-06x86: AVX512 extract/insert insns need to honor EVEX.L'LJan Beulich1-1/+1
2020-07-06x86: honor VEX.W for VCVT{PH2PS,PS2PH}Jan Beulich1-4/+0
2020-07-06x86: drop EVEX table entries that can be served by VEX onesJan Beulich1-34/+0
2020-07-06x86: replace EXqScalarS by EXqVexScalarSJan Beulich1-1/+1
2020-07-06x86: replace EX{d,q}Scalar by EXxmm_m{d,q}Jan Beulich1-2/+2
2020-06-09x86: utilize X macro in EVEX decodingJan Beulich1-234/+0
2019-07-01x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}Jan Beulich1-26/+8
2019-06-27i386: Check vector length for scatter/gather prefetch instructionsH.J. Lu1-8/+8
2019-06-25x86: drop dqa_modeJan Beulich1-12/+2
2019-06-21i386: Break i386-dis-evex.h into small filesH.J. Lu1-0/+1138