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path: root/opcodes/i386-dis-evex-mod.h
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2021-03-10x86: re-arrange order of decode for various EVEX opcodesJan Beulich1-52/+12
The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2020-07-14x86: drop Rdq, Rd, and MaskRJan Beulich1-0/+35
Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where MOD matters but hasn't been decoded yet it needs to be anyway. (The case of converting to Rm is temporary until a subsequent change.)
2020-07-14x86: simplify decode of opcodes valid with (embedded) 66 prefix onlyJan Beulich1-24/+24
The only valid (embedded or explicit) prefix being the data size one (which is a fairly common pattern), avoid going through prefix_table[]. Instead extend the "required prefix" logic to also handle PREFIX_DATA alone in a table entry, now used to identify this case. This requires moving the (adjusted) ->prefix_requirement logic ahead of the printing of stray prefixes, as the latter needs to observe the new setting of PREFIX_DATA in used_prefixes. Also add PREFIX_OPCODE on related entries when previously there was mistakenly no decode step through prefix_table[].
2020-07-06x86: most VBROADCAST{F,I}{32,64}x* only accept memory operandsJan Beulich1-0/+32
VBROADCAST{F,I}32x2 are the only exceptions here.
2020-06-09x86: utilize X macro in EVEX decodingJan Beulich1-2/+22
For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2019-07-01x86: remove ModRM.mod decoding layer from AVX512F VMOVS{S,D}Jan Beulich1-20/+0
Just like their AVX counterparts they can utilize XMVexScalar / EXdVexScalarS / EXqVexScalarS taking care of dropping the middle operand for their memory forms.
2019-06-21i386: Break i386-dis-evex.h into small filesH.J. Lu1-0/+62
Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.