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2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-06-04opcodes: discriminate endianness and insn-endianness in CGEN portsJose E. Marchesi1-1/+1
The CGEN support code in opcodes accesses instruction contents using a couple of functions defined in cgen-opc.c: cgen_get_insn_value and cgen_put_insn_value. These functions use the "instruction endianness" in the CPU description to order the read/written bytes. The process of writing an instruction to the object file is: a) cgen_put_insn_value ;; Writes out the opcodes. b) ARCH_cgen_insert_operand insert_normal insert_1 cgen_put_insn_value ;; Writes out the bytes of the ;; operand. Likewise, the process of reading an instruction from the object file is: a) cgen_get_insn_value ;; Reads the opcodes. b) ARCH_cgen_extract_operand extract_normal extract_1 cgen_get_insn_value ;; Reads in the bytes of the ;; operand. As can be seen above, cgen_{get,put}_insn_value are used to both process the instruction opcodes (the constant fields conforming the base instruction) and also the values of the instruction operands, such as immediates. This is problematic for architectures in which the endianness of instructions is different to the endianness of data. An example is BPF, where instructions are always encoded big-endian but the data may be either big or little. This patch changes the cgen_{get,put}_insn_value functions in order to get an extra argument with the endianness to use, and adapts the existin callers to these functions in order to provide cd->endian or cd->insn_endian, whatever appropriate. Callers like extract_1 and insert_1 pass cd->endian (since they are reading/writing operand values) while callers reading/writing the base instruction pass cd->insn_endian instead. A few little adjustments have been needed in some existing CGEN based ports: * The BPF assembler uses cgen_put_insn_value. It has been adapted to pass the new endian argument. * The mep port has code in mep.opc that uses cgen_{get,put}_insn_value. It has been adapted to pass the new endianargument. Ditto for a call in the assembler. Tested with --enable-targets=all. Regested in all supported targets. No regressions. include/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/cgen.h: Get an `endian' argument in both cgen_get_insn_value and cgen_put_insn_value. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument. (cgen_put_insn_value): Likewise. (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value. * cgen-dis.in (print_insn): Likewise. * cgen-ibld.in (insert_1): Likewise. (insert_1): Likewise. (insert_insn_normal): Likewise. (extract_1): Likewise. * bpf-dis.c: Regenerate. * bpf-ibld.c: Likewise. * bpf-ibld.c: Likewise. * cgen-dis.in: Likewise. * cgen-ibld.in: Likewise. * cgen-opc.c: Likewise. * epiphany-dis.c: Likewise. * epiphany-ibld.c: Likewise. * fr30-dis.c: Likewise. * fr30-ibld.c: Likewise. * frv-dis.c: Likewise. * frv-ibld.c: Likewise. * ip2k-dis.c: Likewise. * ip2k-ibld.c: Likewise. * iq2000-dis.c: Likewise. * iq2000-ibld.c: Likewise. * lm32-dis.c: Likewise. * lm32-ibld.c: Likewise. * m32c-dis.c: Likewise. * m32c-ibld.c: Likewise. * m32r-dis.c: Likewise. * m32r-ibld.c: Likewise. * mep-dis.c: Likewise. * mep-ibld.c: Likewise. * mt-dis.c: Likewise. * mt-ibld.c: Likewise. * or1k-dis.c: Likewise. * or1k-ibld.c: Likewise. * xc16x-dis.c: Likewise. * xc16x-ibld.c: Likewise. * xstormy16-dis.c: Likewise. * xstormy16-ibld.c: Likewise. gas/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * cgen.c (gas_cgen_finish_insn): Pass the endianness to cgen_put_insn_value. (gas_cgen_md_apply_fix): Likewise. (gas_cgen_md_apply_fix): Likewise. * config/tc-bpf.c (md_apply_fix): Pass data endianness to cgen_put_insn_value. * config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to cgen_put_insn_value. cpu/ChangeLog: 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> * mep.opc (print_slot_insn): Pass the insn endianness to cgen_get_insn_value.
2020-06-04opcodes: support insn endianness in cgen_cpu_openJose E. Marchesi1-0/+7
This patch adds support for a new CGEN_OPEN_INSN_ENDIAN argument for @arch@_cgen_cpu_open. This is useful for architectures in which the endianness of the instruction words is not the same than the endianness used for data. An accompanying patch has been sent to the CGEN mailing list that adds support for this argument on the CGEN side [1]. Its been already pre-approved [2], and will be applied simultaneously with this binutils series. [1] https://sourceware.org/pipermail/cgen/2020q2/002733.html [2] https://sourceware.org/pipermail/cgen/2020q2/002737.html include/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * opcode/cgen.h (enum cgen_cpu_open_arg): New value CGEN_CPU_OPEN_INSN_ENDIAN. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jemarch@gnu.org> * cgen-dis.in (cpu_desc_list): New field `insn_endian'. (print_insn_): Handle instruction endian. * bpf-dis.c: Regenerate. * bpf-desc.c: Regenerate. * epiphany-dis.c: Likewise. * epiphany-desc.c: Likewise. * fr30-dis.c: Likewise. * fr30-desc.c: Likewise. * frv-dis.c: Likewise. * frv-desc.c: Likewise. * ip2k-dis.c: Likewise. * ip2k-desc.c: Likewise. * iq2000-dis.c: Likewise. * iq2000-desc.c: Likewise. * lm32-dis.c: Likewise. * lm32-desc.c: Likewise. * m32c-dis.c: Likewise. * m32c-desc.c: Likewise. * m32r-dis.c: Likewise. * m32r-desc.c: Likewise. * mep-dis.c: Likewise. * mep-desc.c: Likewise. * mt-dis.c: Likewise. * mt-desc.c: Likewise. * or1k-dis.c: Likewise. * or1k-desc.c: Likewise. * xc16x-dis.c: Likewise. * xc16x-desc.c: Likewise. * xstormy16-dis.c: Likewise. * xstormy16-desc.c: Likewise. binutils/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * objdump.c (disassemble_data): Set disasm_info.endian_code to disasm_info.endian after the latter is initialized to the endianness reported by BFD.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-10Use disassemble_info.private_data in place of insn_setsAlan Modra1-1/+1
No cgen target uses private_data. This patch removes a disassemble_info field that is only used by cgen, and instead uses private_data. It also removes a macro that is no longer used. include/ * dis-asm.h (struct disassemble_info): Delete insn_sets. (INIT_DISASSEMBLE_INFO_NO_ARCH): Don't define. opcodes/ * cgen-dis.in (print_insn_@arch@): Replace insn_sets with private_data. * disassemble.c (disassemble_init_for_target): Likewise. * bpf-dis.c: Regenerate. * epiphany-dis.c: Regenerate. * fr30-dis.c: Regenerate. * frv-dis.c: Regenerate. * ip2k-dis.c: Regenerate. * iq2000-dis.c: Regenerate. * lm32-dis.c: Regenerate. * m32c-dis.c: Regenerate. * m32r-dis.c: Regenerate. * mep-dis.c: Regenerate. * mt-dis.c: Regenerate. * or1k-dis.c: Regenerate. * xc16x-dis.c: Regenerate. * xstormy16-dis.c: Regenerate.
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-03-03opcodes error messagesAlan Modra1-3/+4
Another patch aimed at making binutils comply with the GNU coding standard. The generated files require https://sourceware.org/ml/cgen/2018-q1/msg00004.html cpu/ * frv.opc: Include opintl.h. (add_next_to_vliw): Use opcodes_error_handler to print error. Standardize error message. (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. opcodes/ * sysdep.h (opcodes_error_handler): Define. (_bfd_error_handler): Declare. * Makefile.am: Remove stray #. * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT EDIT" comment. * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c, * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c, * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use opcodes_error_handler to print errors. Standardize error messages. * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise, and include opintl.h. * nds32-asm.c: Likewise, and include sysdep.h and opintl.h. * i386-gen.c: Standardize error messages. * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate. * Makefile.in: Regenerate. * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c, * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c, * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c, * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c, * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c, * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c, * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c, * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c, * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c, * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c, * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c, * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-07-11Mark generated cgen files read-onlyAlan Modra1-0/+1
* cgen.sh: Mark generated files read-only. * epiphany-asm.c: Regenerate. * epiphany-desc.c: Regenerate. * epiphany-desc.h: Regenerate. * epiphany-dis.c: Regenerate. * epiphany-ibld.c: Regenerate. * epiphany-opc.c: Regenerate. * epiphany-opc.h: Regenerate. * fr30-asm.c: Regenerate. * fr30-desc.c: Regenerate. * fr30-desc.h: Regenerate. * fr30-dis.c: Regenerate. * fr30-ibld.c: Regenerate. * fr30-opc.c: Regenerate. * fr30-opc.h: Regenerate. * frv-asm.c: Regenerate. * frv-desc.c: Regenerate. * frv-desc.h: Regenerate. * frv-dis.c: Regenerate. * frv-ibld.c: Regenerate. * frv-opc.c: Regenerate. * frv-opc.h: Regenerate. * ip2k-asm.c: Regenerate. * ip2k-desc.c: Regenerate. * ip2k-desc.h: Regenerate. * ip2k-dis.c: Regenerate. * ip2k-ibld.c: Regenerate. * ip2k-opc.c: Regenerate. * ip2k-opc.h: Regenerate. * iq2000-asm.c: Regenerate. * iq2000-desc.c: Regenerate. * iq2000-desc.h: Regenerate. * iq2000-dis.c: Regenerate. * iq2000-ibld.c: Regenerate. * iq2000-opc.c: Regenerate. * iq2000-opc.h: Regenerate. * lm32-asm.c: Regenerate. * lm32-desc.c: Regenerate. * lm32-desc.h: Regenerate. * lm32-dis.c: Regenerate. * lm32-ibld.c: Regenerate. * lm32-opc.c: Regenerate. * lm32-opc.h: Regenerate. * lm32-opinst.c: Regenerate. * m32c-asm.c: Regenerate. * m32c-desc.c: Regenerate. * m32c-desc.h: Regenerate. * m32c-dis.c: Regenerate. * m32c-ibld.c: Regenerate. * m32c-opc.c: Regenerate. * m32c-opc.h: Regenerate. * m32r-asm.c: Regenerate. * m32r-desc.c: Regenerate. * m32r-desc.h: Regenerate. * m32r-dis.c: Regenerate. * m32r-ibld.c: Regenerate. * m32r-opc.c: Regenerate. * m32r-opc.h: Regenerate. * m32r-opinst.c: Regenerate. * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-desc.h: Regenerate. * mep-dis.c: Regenerate. * mep-ibld.c: Regenerate. * mep-opc.c: Regenerate. * mep-opc.h: Regenerate. * mt-asm.c: Regenerate. * mt-desc.c: Regenerate. * mt-desc.h: Regenerate. * mt-dis.c: Regenerate. * mt-ibld.c: Regenerate. * mt-opc.c: Regenerate. * mt-opc.h: Regenerate. * or1k-asm.c: Regenerate. * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-dis.c: Regenerate. * or1k-ibld.c: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. * xc16x-asm.c: Regenerate. * xc16x-desc.c: Regenerate. * xc16x-desc.h: Regenerate. * xc16x-dis.c: Regenerate. * xc16x-ibld.c: Regenerate. * xc16x-opc.c: Regenerate. * xc16x-opc.h: Regenerate. * xstormy16-asm.c: Regenerate. * xstormy16-desc.c: Regenerate. * xstormy16-desc.h: Regenerate. * xstormy16-dis.c: Regenerate. * xstormy16-ibld.c: Regenerate. * xstormy16-opc.c: Regenerate. * xstormy16-opc.h: Regenerate.
2017-05-24Move print_insn_XXX to an opcodes internal headerYao Qi1-1/+1
With the changes done in previous patches, print_insn_XXX functions don't have to be external visible out of opcodes, because both gdb and objdump select disassemblers through a single interface. This patch moves these print_insn_XXX declarations from include/dis-asm.h to opcodes/disassemble.h, which is a new header added by this patch. include: 2017-05-24 Yao Qi <yao.qi@linaro.org> * dis-asm.h: Move some function declarations to opcodes/disassemble.h. opcodes: 2017-05-24 Yao Qi <yao.qi@linaro.org> * alpha-dis.c: Include disassemble.h, don't include dis-asm.h. * avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise. * crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise. * disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise. * fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise. * hppa-dis.c, i370-dis.c, i386-dis.c: Likewise. * i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise. * iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise. * m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise. * m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise. * metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise. * moxie-dis.c, msp430-dis.c, mt-dis.c: * nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise. * or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise. * ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise. * rl78-dis.c, s390-dis.c, score-dis.c: Likewise. * sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise. * tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise. * tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise. * v850-dis.c, vax-dis.c, visium-dis.c: Likewise. * w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise. * xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise. * z80-dis.c, z8k-dis.c: Likewise. * disassemble.h: New file.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-6/+6
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-2/+1
2010-02-12 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.Doug Evans1-8/+0
(print_address): Delete CGEN_PRINT_ADDRESS. * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c, * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c, * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
2010-01-02 * cgen-asm.in: Update copyright year.Doug Evans1-1/+1
* cgen-dis.in: Update copyright year. * cgen-ibld.in: Update copyright year. * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c, * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c, * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h, * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c, * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c, * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c, * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c, * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h, * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h, * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c, * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c, * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c, * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h, * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c, * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c, * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c, * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c, * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c, * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c, * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2009-01-20Regenerate for copyright date update.Alan Modra1-2/+2
2007-07-05Change source files over to GPLv3.Nick Clifton1-8/+8
2005-10-282005-10-28 Dave Brolley <brolley@redhat.com>Dave Brolley1-9/+19
* All CGEN-generated sources: Regenerate. Contribute the following changes: 2005-09-19 Dave Brolley <brolley@redhat.com> * disassemble.c (disassemble_init_for_target): Add 'break' to case for bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for bfd_arch_m32c case. 2005-02-16 Dave Brolley <brolley@redhat.com> * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename cgen_isa_mask_* to cgen_bitset_*. * cgen-opc.c: Likewise. 2003-11-28 Richard Sandiford <rsandifo@redhat.com> * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas. * *-dis.c: Regenerate. 2003-06-05 DJ Delorie <dj@redhat.com> * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign it, as it may point to a reused buffer. Set prev_isas when we change cpus. 2002-12-13 Dave Brolley <brolley@redhat.com> * cgen-opc.c (cgen_isa_mask_create): New support function for CGEN_ISA_MASK. (cgen_isa_mask_init): Ditto. (cgen_isa_mask_clear): Ditto. (cgen_isa_mask_add): Ditto. (cgen_isa_mask_set): Ditto. (cgen_isa_supported): Ditto. (cgen_isa_mask_compare): Ditto. (cgen_isa_mask_intersection): Ditto. (cgen_isa_mask_copy): Ditto. (cgen_isa_mask_combine): Ditto. * cgen-dis.in (libiberty.h): #include it. (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *). (print_insn_@arch@): Use CGEN_ISA_MASK and support functions. * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm. * Makefile.in: Regenerated.
2005-07-01Update function declarations to ISO C90 formattingNick Clifton1-69/+56
2005-05-07Update the address and phone number of the FSFNick Clifton1-1/+1
2005-02-23Fix compile time warnings generated by gcc 4.0Nick Clifton1-6/+6
2005-02-15Fix compile time warning messagesNick Clifton1-4/+4
2005-02-11Regenerate frv-dis.c in order to fix a compile time warning.Nick Clifton1-1/+1
2005-01-25bfd/ChangeLog:Alexandre Oliva1-0/+22
2004-12-10 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (elf32_frv_relocate_section): Force local binding for TLSMOFF. * reloc.c: Add R_FRV_TLSMOFF. * elf32-frv.c (elf32_frv_howto_table): Likewise. (frv_reloc_map, frv_reloc_type_lookup): Map it. (elf32_frv_relocate_section): Handle it. (elf32_frv_check_relocs): Likewise. * libbfd.h, bfd-in2.h: Rebuilt. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * elf32-frv.c (_frvfdpic_emit_got_relocs_plt_entries): Don't crash when given an undefweak TLS symbol. Fix constant TLS PLT entries such that they return the constant in gr9. (_frvfdpic_relax_tls_entries): Don't crash for undefweak TLS symbols. (_frvfdpic_size_got_plt): Set _cooked_size of dynamic sections. too, such that they shrink on relaxation. (elf32_frvfdpic_finish_dynamic_sections): Check __ROFIXUP_END__ as marking the position right past the _GLOBAL_OFFSET_TABLE_ value. (_frvfdpic_assign_plt_entries): Shrink constant TLS PLT entries if we can guarantee the use of 16-bit constants. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> Introduce TLS support for FR-V FDPIC. * reloc.c: Add TLS relocations. * elf32-frv.c (elf32_frv_howto_table): Add TLS relocations. (elf32_frv_rel_tlsdesc_value_howto): New. (elf32_frv_rel_tlsoff_howto): New. (frv_reloc_map): Add new mappings. (struct frvfdpic_elf_link_hash_table): Add pointer to summary reloc information. (frvfdpic_dynamic_got_plt_info): New. (frvfdpic_plt_tls_ret_offset): New. (ELF_DYNAMIC_INTERPRETER, DEFAULT_STACK_SIZE): Move earlier. (struct _frvfdpic_dynamic_got_info): Likewise. Add TLS members. (struct _frvfdpic_dynamic_got_plt_info): Likewise. (FRVFDPIC_SYM_LOCAL): Regard symbols defined in the absolute section as local. (struct frvfdpic_relocs_info): Add TLS fields. (frvfdpic_relocs_info_hash): Warning clean up. (frvfdpic_relocs_info_find): Initialize tlsplt_entry. (frvfdpic_pic_merge_early_relocs_info): Merge TLS fields. (FRVFDPIC_TLS_BIAS): Define. (tls_biased_base): New. (_frvfdpic_emit_got_relocs_plt_entries): Deal with TLS relocations. (frv_reloc_type_lookup): Likewise. (frvfdpic_info_to_howto_rel): Likewise. (elf32_frv_relocate_section): Likewise. (_frv_create_got_section): Create the PLT section here. (elf32_frvfdpic_create_dynamic_sections): Not here. (_frvfdpic_count_nontls_entries): Move out of... (_frvfdpic_count_got_plt_entries): ... here. (_frvfdpic_count_tls_entries): Likewise. Add TLS support. (_frvfdpic_count_relocs_fixups): Likewise. Add relaxation support. (_frvfdpic_relax_tls_entries): New. (_frvfdpic_compute_got_alloc_data): Add TLS support. (_frvfdpic_get_tlsdesc_entry): New. (_frvfdpic_assign_got_entries): Add TLS support. (_frvfdpic_assign_plt_entries): Likewise. (_frvfdpic_reset_got_plt_entries): New. (_frvfdpic_size_got_plt): Move out of... (elf32_frvfdpic_size_dynamic_sections): ... here. (_frvfdpic_relax_got_plt_entries): New. (elf32_frvfdpic_relax_section): New. (elf32_frvfdpic_finish_dynamic_sections): Add TLS sanity check. (elf32_frv_check_relocs): Add TLS support. (bfd_elf32_bfd_relax_section): Define for FDPIC. * libbfd.h, bfd-in2.h: Rebuilt. cpu/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.cpu: Add support for TLS annotations in loads and calll. * frv.opc (parse_symbolic_address): New. (parse_ldd_annotation): New. (parse_call_annotation): New. (parse_ld_annotation): New. (parse_ulo16, parse_uslo16): Use parse_symbolic_address. Introduce TLS relocations. (parse_d12, parse_s12, parse_u12): Likewise. (parse_uhi16): Likewise. Fix constant checking on 64-bit host. (parse_call_label, print_at): New. gas/ChangeLog: * config/tc-frv.c (md_apply_fix3): Mark TLS symbols as such. 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (frv_pic_ptr): Add tlsmoff support. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.c (gas_cgen_parse_operand): Handle CGEN_PARSE_OPERAND_SYMBOLIC. * config/tc-frv.c (md_cgen_lookup_reloc): Handle TLS relocations. (frv_force_relocation): Likewise. Fix handling of PIC relocations. (md_apply_fix3): Likewise. include/elf/ChangeLog: 2004-12-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add R_FRV_TLSMOFF. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv.h: Add TLS relocations. include/opcode/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * cgen.h (enum cgen_parse_operand_type): Add CGEN_PARSE_OPERAND_SYMBOLIC. ld/testsuite/ChangeLog: * ld-frv/fdpic.exp: Add -mfdpic to ASFLAGS. * ld-frv/tls.exp: Likewise. 2004-11-26 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-3.s: New. * ld-frv/tls-static-3.d: New. * ld-frv/tls-dynamic-3.d: New. * ld-frv/tls-pie-3.d: New. * ld-frv/tls-shared-3.d: New. * ld-frv/tls-relax-static-3.d: New. * ld-frv/tls-relax-dynamic-3.d: New. * ld-frv/tls-relax-pie-3.d: New. * ld-frv/tls-relax-shared-3.d: New. * ld-frv/tls.exp: Run the new tests. * ld-frv/tls-dynamic-2.d: Adjust for improved relaxation. * ld-frv/tls-relax-dynamic-2.d: Likewise. * ld-frv/tls-relax-initial-shared-2.d: Likewise. 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * ld-frv/tls-1-dep.s: New. * ld-frv/tls-1-shared.lds: New. * ld-frv/tls-1.s: New. * ld-frv/tls-2.s: New. * ld-frv/tls-dynamic-1.d: New. * ld-frv/tls-dynamic-2.d: New. * ld-frv/tls-initial-shared-2.d: New. * ld-frv/tls-pie-1.d: New. * ld-frv/tls-relax-dynamic-1.d: New. * ld-frv/tls-relax-dynamic-2.d: New. * ld-frv/tls-relax-initial-shared-2.d: New. * ld-frv/tls-relax-pie-1.d: New. * ld-frv/tls-relax-shared-1.d: New. * ld-frv/tls-relax-shared-2.d: New. * ld-frv/tls-relax-static-1.d: New. * ld-frv/tls-shared-1-fail.d: New. * ld-frv/tls-shared-1.d: New. * ld-frv/tls-shared-2.d: New. * ld-frv/tls-static-1.d: New. * ld-frv/tls.exp: New. * ld-frv/fdpic-pie-1.d: Adjust for 64-bit host. * ld-frv/fdpic-pie-2.d: Likewise. * ld-frv/fdpic-pie-6.d: Likewise. * ld-frv/fdpic-pie-7.d: Likewise. * ld-frv/fdpic-pie-8.d: Likewise. * ld-frv/fdpic-shared-1.d: Likewise. * ld-frv/fdpic-shared-2.d: Likewise. * ld-frv/fdpic-shared-3.d: Likewise. * ld-frv/fdpic-shared-4.d: Likewise. * ld-frv/fdpic-shared-5.d: Likewise. * ld-frv/fdpic-shared-6.d: Likewise. * ld-frv/fdpic-shared-7.d: Likewise. * ld-frv/fdpic-shared-8.d: Likewise. * ld-frv/fdpic-shared-local-2.d: Likewise. * ld-frv/fdpic-shared-local-8.d: Likewise. * ld-frv/fdpic-static-1.d: Likewise. * ld-frv/fdpic-static-2.d: Likewise. * ld-frv/fdpic-static-6.d: Likewise. * ld-frv/fdpic-static-7.d: Likewise. * ld-frv/fdpic-static-8.d: Likewise. opcodes/ChangeLog: 2004-11-10 Alexandre Oliva <aoliva@redhat.com> * frv-asm.c: Rebuilt. * frv-desc.c: Rebuilt. * frv-desc.h: Rebuilt. * frv-dis.c: Rebuilt. * frv-ibld.c: Rebuilt. * frv-opc.c: Rebuilt. * frv-opc.h: Rebuilt.
2004-03-01Add fr450 support.Richard Sandiford1-0/+15
2003-09-032003-09-03 Dave Brolley <brolley@redhat.com>Dave Brolley1-2/+5
* frv-*: Regenerated.
2003-08-09regenerate cgen files after prototype fixMichael Meissner1-58/+46
2003-06-05Add code to handle even-numbered only register operandsNick Clifton1-0/+9
2002-12-02 * cgen-dis.in: Include libiberty.h.Alan Modra1-1/+3
* fr30-desc.c: Regenerate. * fr30-dis.c: Regenerate. * frv-desc.c: Regenerate. * frv-dis.c: Regenerate. * ip2k-asm.c: Regenerate. * ip2k-desc.c: Regenerate. * ip2k-dis.c: Regenerate. * ip2k-opc.c: Regenerate. * ip2k-opc.h: Regenerate. * m32r-desc.c: Regenerate. * m32r-dis.c: Regenerate. * openrisc-desc.c: Regenerate. * openrisc-dis.c: Regenerate. * xstormy16-asm.c: Regenerate. * xstormy16-desc.c: Regenerate. * xstormy16-dis.c: Regenerate.
2002-06-182002-06-18 Dave Brolley <brolley@redhat.com>Dave Brolley1-0/+789
* po/POTFILES.in: Add frv-*.[ch]. * disassemble.c (ARCH_frv): New macro. (disassembler): Handle bfd_arch_frv. * configure.in: Support frv_bfd_arch. * Makefile.am (HFILES): Add frv-*.h. (CFILES): Add frv-*.c (ALL_MACHINES): Add frv-*.lo. (CLEANFILES): Add stamp-frv. (FRV_DEPS): New variable. (stamp-frv): New target. (frv-asm.lo): New target. (frv-desc.lo): New target. (frv-dis.lo): New target. (frv-ibld.lo): New target. (frv-opc.lo): New target. (frv-*.[ch]): New files.
generated by cgit v1.1 at 2024-11-25 14:55:34 +0000