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path: root/opcodes/disassemble.c
AgeCommit message (Expand)AuthorFilesLines
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-12-06opcodes/riscv: Hide '.L0 ' fake symbolsAndrew Burgess1-0/+5
2018-09-20Andes Technology has good news for you, we plan to update the nds32 port of b...Nick Clifton1-0/+5
2018-09-08S12Z: Make disassebler work for --enable-targets=all config.John Darrington1-0/+1
2018-07-30Add support for the C_SKY series of processors.Andrew Jenner1-0/+14
2018-05-18Add support for the Freescale s12z processor.John Darrington1-0/+5
2018-04-30This patch adds support to objdump for disassembly of NFP (Netronome Flow Pro...Francois H. Theron1-0/+9
2018-04-16Remove sh5 and sh64 supportAlan Modra1-1/+0
2018-04-16Remove w65 supportAlan Modra1-6/+0
2018-04-16Remove m88k supportAlan Modra1-6/+0
2018-04-16Remove i370 supportAlan Modra1-6/+0
2018-04-16Remove h8500 supportAlan Modra1-6/+0
2018-04-11Remove i860, i960, bout and aout-adobe targetsAlan Modra1-12/+0
2018-03-07XCOFF disassemblerAlan Modra1-8/+5
2018-02-22RISC-V: Make disassebler work for --enable-targets=all config.Jim Wilson1-0/+1
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-12-15Fix disassembly for PowerPCDimitar Dimitrov1-3/+3
2017-12-13This patch enables disassembler_needs_relocs for PRU. It is needed to print c...Dimitar Dimitrov1-0/+5
2017-08-07Mark big and mach with ATTRIBUTE_UNUSEDH.J. Lu1-1/+3
2017-08-07GDB/opcodes: Remove arch/mach/endian disassembler assertionsMaciej W. Rozycki1-12/+1
2017-05-24Move print_insn_XXX to an opcodes internal headerYao Qi1-1/+1
2017-05-24Refactor disassembler selectionYao Qi1-15/+26
2017-04-06Add support for disassembling WebAssembly opcodes.Pip Cet1-0/+14
2017-02-28GDB: Add support for the new set/show disassembler-options commands.Peter Bergner1-0/+70
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-31Fix riscv breakageAlan Modra1-0/+1
2016-12-31PRU Opcode PortDimitar Dimitrov1-1/+6
2016-11-01Add support for RISC-V architecture.Nick Clifton1-0/+8
2016-07-20Add support to the ARC disassembler for selecting instruction classes.Claudiu Zissulescu1-0/+3
2016-04-20update many old style function definitionsTrevor Saunders1-4/+2
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-05-11Add Intel MCU support to opcodesH.J. Lu1-0/+1
2015-04-30Make RL78 disassembler and simulator respect ISA for mul/divDJ Delorie1-1/+1
2015-01-28FT32 initial supportAlan Modra1-0/+6
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-12-06Add Visium support to opcodesEric Botcazou1-0/+6
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson1-13/+4
2014-03-05Update copyright yearsAlan Modra1-3/+1
2013-12-13Add support for Andes NDS32:Kuan-Lin Chen1-0/+6
2013-02-062013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore1-0/+9
2013-01-10 * common.h: Fix case of "Meta".Nick Clifton1-0/+11
2012-11-092012-11-09 Nick Clifton <nickc@redhat.com>Nick Clifton1-0/+1
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+15
2012-05-15 * config/tc-m68hc11.c: Add S12X and XGATE co-processor support.Nick Clifton1-1/+8
2012-05-03Add support for Motorola XGATE embedded CPUNick Clifton1-0/+6
2012-03-15include/Alan Modra1-1/+12
2011-11-02[.]DJ Delorie1-0/+6
2011-10-26gas:Joern Rennecke1-1/+1
2011-10-25bfd:Nick Clifton1-0/+6
2011-07-22Add initial Intel K1OM support.H.J. Lu1-0/+1
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