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2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-09-02ubsan: *-ibld.cAlan Modra1-4/+4
bfin-dis.c:160 shift exponent 32 is too large for 32-bit type 'long unsigned int' bpf-ibld.c:196 left shift of 1 by 31 places cannot be represented in type 'long int' bpf-ibld.c:196 negation of -2147483648 cannot be represented in type 'long int'; cast to an unsigned type to negate this itself bpf-ibld.c:197 left shift of 1 by 31 places cannot be represented in type 'long int' bpf-ibld.c:197 signed integer overflow: -2147483648 - 1 cannot be represented in type 'long int' bpf-ibld.c:501 left shift of 1 by 31 places cannot be represented in type 'long int' * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift. * bpf-ibld.c: Regenerate. * epiphany-ibld.c: Regenerate. * fr30-ibld.c: Regenerate. * frv-ibld.c: Regenerate. * ip2k-ibld.c: Regenerate. * iq2000-ibld.c: Regenerate. * lm32-ibld.c: Regenerate. * m32c-ibld.c: Regenerate. * m32r-ibld.c: Regenerate. * mep-ibld.c: Regenerate. * mt-ibld.c: Regenerate. * or1k-ibld.c: Regenerate. * xc16x-ibld.c: Regenerate. * xstormy16-ibld.c: Regenerate.
2020-08-28PR26449, PR26450 UBSAN: frv-ibld.c:135 left shiftAlan Modra1-6/+8
Eh well, I guess the code didn't quite live up to the comment. PR 26449 PR 26450 * cgen-ibld.in (insert_1): Use 1UL in forming mask. (extract_normal): Likewise. (insert_normal): Likewise, and move past zero length test. (put_insn_int_value): Handle mask for zero length, use 1UL. * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2020-06-04opcodes: discriminate endianness and insn-endianness in CGEN portsJose E. Marchesi1-5/+5
The CGEN support code in opcodes accesses instruction contents using a couple of functions defined in cgen-opc.c: cgen_get_insn_value and cgen_put_insn_value. These functions use the "instruction endianness" in the CPU description to order the read/written bytes. The process of writing an instruction to the object file is: a) cgen_put_insn_value ;; Writes out the opcodes. b) ARCH_cgen_insert_operand insert_normal insert_1 cgen_put_insn_value ;; Writes out the bytes of the ;; operand. Likewise, the process of reading an instruction from the object file is: a) cgen_get_insn_value ;; Reads the opcodes. b) ARCH_cgen_extract_operand extract_normal extract_1 cgen_get_insn_value ;; Reads in the bytes of the ;; operand. As can be seen above, cgen_{get,put}_insn_value are used to both process the instruction opcodes (the constant fields conforming the base instruction) and also the values of the instruction operands, such as immediates. This is problematic for architectures in which the endianness of instructions is different to the endianness of data. An example is BPF, where instructions are always encoded big-endian but the data may be either big or little. This patch changes the cgen_{get,put}_insn_value functions in order to get an extra argument with the endianness to use, and adapts the existin callers to these functions in order to provide cd->endian or cd->insn_endian, whatever appropriate. Callers like extract_1 and insert_1 pass cd->endian (since they are reading/writing operand values) while callers reading/writing the base instruction pass cd->insn_endian instead. A few little adjustments have been needed in some existing CGEN based ports: * The BPF assembler uses cgen_put_insn_value. It has been adapted to pass the new endian argument. * The mep port has code in mep.opc that uses cgen_{get,put}_insn_value. It has been adapted to pass the new endianargument. Ditto for a call in the assembler. Tested with --enable-targets=all. Regested in all supported targets. No regressions. include/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/cgen.h: Get an `endian' argument in both cgen_get_insn_value and cgen_put_insn_value. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument. (cgen_put_insn_value): Likewise. (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value. * cgen-dis.in (print_insn): Likewise. * cgen-ibld.in (insert_1): Likewise. (insert_1): Likewise. (insert_insn_normal): Likewise. (extract_1): Likewise. * bpf-dis.c: Regenerate. * bpf-ibld.c: Likewise. * bpf-ibld.c: Likewise. * cgen-dis.in: Likewise. * cgen-ibld.in: Likewise. * cgen-opc.c: Likewise. * epiphany-dis.c: Likewise. * epiphany-ibld.c: Likewise. * fr30-dis.c: Likewise. * fr30-ibld.c: Likewise. * frv-dis.c: Likewise. * frv-ibld.c: Likewise. * ip2k-dis.c: Likewise. * ip2k-ibld.c: Likewise. * iq2000-dis.c: Likewise. * iq2000-ibld.c: Likewise. * lm32-dis.c: Likewise. * lm32-ibld.c: Likewise. * m32c-dis.c: Likewise. * m32c-ibld.c: Likewise. * m32r-dis.c: Likewise. * m32r-ibld.c: Likewise. * mep-dis.c: Likewise. * mep-ibld.c: Likewise. * mt-dis.c: Likewise. * mt-ibld.c: Likewise. * or1k-dis.c: Likewise. * or1k-ibld.c: Likewise. * xc16x-dis.c: Likewise. * xc16x-ibld.c: Likewise. * xstormy16-dis.c: Likewise. * xstormy16-ibld.c: Likewise. gas/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * cgen.c (gas_cgen_finish_insn): Pass the endianness to cgen_put_insn_value. (gas_cgen_md_apply_fix): Likewise. (gas_cgen_md_apply_fix): Likewise. * config/tc-bpf.c (md_apply_fix): Pass data endianness to cgen_put_insn_value. * config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to cgen_put_insn_value. cpu/ChangeLog: 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> * mep.opc (print_slot_insn): Pass the insn endianness to cgen_get_insn_value.
2020-02-11Ensure *valuep always written by extract_normal returnAlan Modra1-1/+4
* cgen-ibld.in (extract_normal): Set *valuep on all return paths. * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-02-02opcodes/cgen: Rework calculation of shift when inserting fieldsAndrew Burgess1-3/+10
The calculation of the shift amount, used to insert fields into the instruction buffer, is not correct when the following conditions are all true: - CGEN_INT_INSN_P is defined, and true. - CGEN_INSN_LSB0_P is true - Total instruction length is greater than the length of a single instruction word (the instruction is made of multiple words) - The word offset is non-zero (the field is outside the first word) When the above conditions are all true, the calculated shift fails to take account of the total instruction length. After this commit the calculation of the shift amount is split into two parts, first we calculate the shift required to get to BIT0 of the word in which the field lives, then we calculate the shift required to place the field within the instruction word. The change in this commit only effects the CGEN_INT_INSN_P defined true case, but changes the code for both CGEN_INSN_LSB0_P true, and false. In the case of CGEN_INSN_LSB0_P being false, the code used to say: shift = total_length - (word_offset + start + length); Now it says: shift_to_word = total_length - (word_offset + word_length); shift_within_word = word_length - start - length; shift = shift_to_word + shift_within_word; From which we can see that in all cases the computed shift value should be unchanged. In the case of CGEN_INSN_LSB0_P being true, the code used to say: shift = (word_offset + start + 1) - length; Now it says: shift_to_word = total_length - (word_offset + word_length); shift_within_word = start + 1 - length; shift = shift_to_word + shift_within_word; In the case where 'total_length == word_length' AND 'word_offset == 0' (which indicates an instruction of a single word), we see that the computed shift value will be unchanged. However, when the total_length and word_length are different, and the word_offset is non-zero then the computed shift value will be different (and correct). opcodes/ChangeLog: * cgen-ibld.in (insert_normal): Rework calculation of shift. * epiphany-ibld.c: Regenerate. * fr30-ibld.c: Regenerate. * frv-ibld.c: Regenerate. * ip2k-ibld.c: Regenerate. * iq2000-ibld.c: Regenerate. * lm32-ibld.c: Regenerate. * m32c-ibld.c: Regenerate. * m32r-ibld.c: Regenerate. * mep-ibld.c: Regenerate. * mt-ibld.c: Regenerate. * or1k-ibld.c: Regenerate. * xc16x-ibld.c: Regenerate. * xstormy16-ibld.c: Regenerate.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-2/+2
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-2/+1
2010-01-07 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.Doug Evans1-3/+3
* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2010-01-06 cpu/Doug Evans1-0/+1
* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. (f-dsp-40-u20, f-dsp-40-u24): Ditto. opcodes/ * cgen-ibld.in: #include "cgen/basic-modes.h". * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2010-01-02 * cgen-asm.in: Update copyright year.Doug Evans1-1/+1
* cgen-dis.in: Update copyright year. * cgen-ibld.in: Update copyright year. * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c, * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c, * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h, * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c, * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c, * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c, * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c, * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h, * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h, * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c, * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c, * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c, * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h, * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c, * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c, * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c, * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c, * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c, * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c, * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2008-12-23Add LM32 port.Nick Clifton1-2/+2
2007-07-05Change source files over to GPLv3.Nick Clifton1-8/+8
2006-03-05* cgen-ibld.in (insert_normal): Cope with attempts to insert a signed 32-bitNick Clifton1-4/+12
value into an unsigned 32-bit field when the host is a 64-bit machine.
2006-01-03* cgen-ibld.in (extract_normal): Avoid memory range errors.DJ Delorie1-4/+3
* m32c-ibld.c: Regenerated.
2005-07-01Update function declarations to ISO C90 formattingNick Clifton1-34/+22
2005-05-07Update the address and phone number of the FSFNick Clifton1-1/+1
2003-08-08Fix typos in last changeMichael Meissner1-3/+6
2003-08-08Convert cgen to C-90Michael Meissner1-67/+66
2001-11-09Fix badly placed #if 0...Nick Clifton1-2/+2
2001-10-13Use safe-ctype.h not ctype.hNick Clifton1-1/+1
2001-10-09Fix compile time warnings in cgen-generated filesNick Clifton1-10/+21
2001-09-302001-09-30 John Healy <jhealy@redhat.com>John Healy1-3/+3
* cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits calls to cgen_get_insn_value and cgen_put_insn_value calls. (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call.
2001-08-12 * cgen-ibld.in (extract_normal): Match type of VALUE and MASKRichard Henderson1-1/+1
to *VALUEP. Regenerate all cgen files.
2001-07-01 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT.Geoffrey Keating1-1/+16
2001-05-07* cgen asm/disasmFrank Ch. Eigler1-2/+2
[opcodes/ChangeLog] 2001-05-07 Frank Ch. Eigler <fche@redhat.com> * cgen-dis.in (default_print_insn): Tolerate min<base instructions even at end of a section. * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions by ignoring precariously-unpacked insn_value in favor of raw buffer. [cgen/ChangeLog] 2001-05-07 Frank Ch. Eigler <fche@redhat.com> * iformat.scm (compute-insn-base-mask-length): Rewrite to tolerate various-base-length instruction sets.
2001-03-27* Comment tweak.Ben Elliston1-4/+4
2001-03-222001-03-22 Ben Elliston <bje@redhat.com>Ben Elliston1-1/+1
* cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional. * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused to allay a compiler warning.
2001-03-13Fix typos in ChangeLogs; fix dates in copyright noticesNick Clifton1-1/+1
2001-01-092001-01-09 Jeff Johnston <jjohnstn@redhat.com>Jeff Johnston1-4/+4
* cgen-asm.in (parse_insn_normal): Changed syn to be CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn as character to use CGEN_SYNTAX_CHAR macro and all comparisons to '\0' to use 0 instead. * cgen-dis.in (print_insn_normal): Ditto. * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto.
2001-01-02* generalizationFrank Ch. Eigler1-103/+15
2001-01-02 Richard Sandiford <rsandifo@redhat.com> * cgen-dis.c (hash_insn_array): Use bfd_put_bits(). (hash_insn_list): Likewise * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits(). (extract_1): Use bfd_get_bits(). (extract_normal): Apply sign extension to both extraction methods. * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits() (cgen_put_insn_value): Use bfd_put_bits()
2000-08-282000-08-28 Dave Brolley <brolley@redhat.com>Dave Brolley1-6/+38
* cgen-ibld.in (cgen_put_insn_int_value): New function. (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P. (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P. (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P. * cgen-dis.in (read_insn): New static function. (print_insn): Use read_insn to read the insn into the buffer and set up for disassembly. (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is in the buffer. * fr30-asm.c: Regenerated. * fr30-desc.c: Regenerated. * fr30-desc.h Regenerated. * fr30-dis.c: Regenerated. * fr30-ibld.c: Regenerated. * fr30-opc.c: Regenerated. * fr30-opc.h Regenerated. * m32r-asm.c: Regenerated. * m32r-desc.c: Regenerated. * m32r-desc.h Regenerated. * m32r-dis.c: Regenerated. * m32r-ibld.c: Regenerated. * m32r-opc.c: Regenerated.
2000-08-042000-08-04 Ben Elliston <bje@redhat.com>Ben Elliston1-0/+570
* cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files. * cgen.sh: Likewise.
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