Age | Commit message (Collapse) | Author | Files | Lines |
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gas/
* config/tc-arm.c (parse_operands): Accept generic coprocessor regs
for OP_RVC.
(reg_names): Add fpinst, pfinst2, mvfr0 and mvfr1.
gas/testsuite/
* gas/arm/vfp1xD.d: Add new fmrx/fmxr tests.
* gas/arm/vfp1xD.s: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
* gas/arm/vfp1xD_t2.s: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1.
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gas/
* config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes.
gas/testsuite/
* gas/arm/thumb32.d: Add writeback addressing mode tests.
* gas/arm/thumb32.s: Update expected output.
opcodes/
* arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses.
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(thumb_opcodes): Add missing white space in adr.
(arm_decode_shift): New parameter, print_shift. Only decode the
shift parameter if set. Adjust callers.
(print_insn_arm): Support for operand type q with no shift decode.
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being disassembled.
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opcodes/
* arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??).
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opcodes/
* arm-dis.c (coprocessor_opcodes): Remove superfluous 0x.
(print_insn_coprocessor): Handle %<bitfield>x.
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Mark Shinwell <shinwell@codesourcery.com>
gas/
* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
(parse_operands): Don't expect comma if first operand missing.
Handle OP_oRRw.
(do_srs): Encode register number, checking it is r13. Update comment.
(insns): Update SRS entries to take a register.
gas/testsuite/
* gas/arm/archv6.s: Add new SRS tests.
* gas/arm/archv6.d: Update expected output.
* gas/arm/thumb32.s: Add new SRS tests.
* gas/arm/thumb32.d: Update expected output.
* gas/arm/srs-t2.d: New.
* gas/arm/srs-t2.l: New.
* gas/arm/srs-t2.s: New.
* gas/arm/srs-arm.d: New.
* gas/arm/srs-arm.l: New.
* gas/arm/srs-arm.s: New.
opcodes/
* arm-dis.c (arm_opcodes): Print SRS base register.
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gas/
* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
gas/testsuite/
* gas/arm/archv6.s: Add more cpsie tests.
* gas/arm/archv6.d: Ditto.
opcodes/
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
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vqrshl instructions.
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gas/
* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
encoding.
gas/testsuite/
* gas/arm/vfpv3-const-conv.s: Improve test coverage.
* gas/arm/vfpv3-const-conv.d: Adjust expected output.
* gas/arm/vfp-neon-syntax_t2.d: Ditto.
* gas/arm/vfp-neon-syntax.d: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
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* arm-dis.c (last_is_thumb): Delete.
(enum map_type, last_type): New.
(print_insn_data): New.
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
the right symbol. Handle $d.
(print_insn): Check for mapping symbols even without a normal
symbol. Adjust searching. If $d is found see how much data
to print. Handle data.
gas/
* config/tc-arm.h (md_cons_align): Define.
(mapping_state): New prototype.
* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
gas/arm/tls.d: Update for $d support.
* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
* gas/elf/section2.e-armeabi: Update.
* gas/elf/section2.e-armelf: New file.
* gas/elf/elf.exp: Use it.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
for $d support.
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binutils/
* objdump.c (disassemble_section): Set info->symtab_pos.
(disassemble_data): Set info->symtab and info->symtab_size.
include/
* dis-asm.h (disassemble_info): Add symtab, symtab_pos and
symtab_size.
opcodes/
* arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
(get_sym_code_type): New function.
(print_insn): Search for mapping symbols.
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2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
(arch_info_struct, bfd_arm_update_notes): Likewise.
(architectures): Likewise.
(bfd_arm_merge_machines): Check for iWMMXt2.
* bfd-in2.h: Rebuild.
gas/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* config/tc-arm.c (arm_cext_iwmmxt2): New.
(enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
include/opcode/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.
opcodes/
2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
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argument and emits the string followed by a comma and then the length of
the string.
(CONST_STRNEQ): New macro. Checks to see if a variable string has a constant
string as its initial characters.
(CONST_STRNCPY): New macro. Copies a constant string to the start of a
variable string.
* bfd-in2.h: Regenerate.
* <remainign files>: Make use of the new macros.
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gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
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gas/
* config/tc-arm.c (insns): Fix rbit Arm opcode.
gas/testsuite/
* gas/arm/archv6t2.d: Adjust expected output for rbit.
opcodes/
* armd-dis.c (arm_opcodes): Fix rbit opcode.
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on 64-bit hosts.
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opcodes/
* arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
instructions.
(neon_opcodes): Add conditional execution specifiers.
(thumb_opcodes): Ditto.
(thumb32_opcodes): Ditto.
(arm_conditional): Change 0xe to "al" and add "" to end.
(ifthen_state, ifthen_next_state, ifthen_address): New.
(IFTHEN_COND): Define.
(print_insn_coprocessor, print_insn_neon): Print thumb conditions.
(print_insn_arm): Change %c to use new values of arm_conditional.
(print_insn_thumb16): Print thumb conditions. Add %I.
(print_insn_thumb32): Print thumb conditions.
(find_ifthen_state): New function.
(print_insn): Track IT block state.
gas/testsuite/
* gas/arm/thumb2_bcond.d: Update expected output.
* gas/arm/thumb32.d: Ditto.
* gas/arm/vfp1_t2.d: Ditto.
* gas/arm/vfp1xD_t2.d: Ditto.
binutils/testsuite/
* binutils-all/arm/objdump.exp: New file.
* binutils-all/arm/thumb2-cond.s: New test.
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vldm/vstm.
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VMOV.
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%<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
Add unified load/store instruction names.
(neon_opcode_table): New.
(arm_opcodes): Expand meaning of %<bitfield>['`?].
(arm_decode_bitfield): New.
(print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
(print_insn_neon): New.
(print_insn_arm): Adjust print_insn_coprocessor call. Call
print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
(print_insn_thumb32): Likewise.
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gas/
* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
* gas/arm/svc.d: New test.
* gas/arm/svc.s: New test.
* gas/arm/inst.d: Accept svc mnemonic.
* gas/arm/thumb.d: Ditto.
* gas/arm/wince_inst.d: Ditto.
opcodes/
* arm-dis.c (arm_opcodes): Rename swi to svc.
(thumb_opcodes): Ditto.
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gas/
* config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
(struct asm_barrier_opt): Define.
(arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
(parse_psr): Accept V7M psr names.
(parse_barrier): New function.
(enum operand_parse_code): Add OP_oBARRIER.
(parse_operands): Implement OP_oBARRIER.
(do_barrier): New function.
(do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
(do_t_cpsi): Add V7M restrictions.
(do_t_mrs, do_t_msr): Validate V7M variants.
(md_assemble): Check for NULL variants.
(v7m_psrs, barrier_opt_names): New tables.
(insns): Add V7 instructions. Mark V6 instructions absent from V7M.
(md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
(arm_cpu_option_table): Add Cortex-M3, R4 and A8.
(arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
(struct cpu_arch_ver_table): Define.
(cpu_arch_ver): New.
(aeabi_set_public_attributes): Use cpu_arch_ver. Set
Tag_CPU_arch_profile.
* doc/c-arm.texi: Document new cpu and arch options.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected msr and mrs output.
* gas/arm/arch7.d: New test.
* gas/arm/arch7.s: New test.
* gas/arm/arch7m-bad.l: New test.
* gas/arm/arch7m-bad.d: New test.
* gas/arm/arch7m-bad.s: New test.
include/opcode/
* arm.h: Add V7 feature bits.
opcodes/
* arm-dis.c (arm_opcodes): Add V7 instructions.
(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
(print_arm_address): New function.
(print_insn_arm): Use it. Add 'P' and 'U' cases.
(psr_name): New function.
(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
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* arm-dis.c (print_insn_thumb32): Word align blx target address.
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gas/
* config/tc-arm.c (insns): Correct "sel" entry.
gas/testsuite/
* gas/arm/archv6.d: Adjust expected output.
opcodes/
* arm-dis.c (arm_opcodes): Correct "sel" entry.
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* arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
operations.
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bfd/
* reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
opcodes/
* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
gas/
* config/tc-arm.c (do_smi, do_t_smi): Rename ...
(do_smc, do_t_smc): ... to this.
(insns): Remane smi to smc.
(md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
BFD_RELOC_ARM_SMC.
gas/testsuite/
* gas/arm/arch6zk.d: Rename smi to smc.
* gas/arm/arch6zk.s: Ditto.
* gas/arm/thumb32.d: Ditto.
* gas/arm/thumb32.s: Ditto.
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* arm-dis.c (coprocessor_opcodes): Add null terminator.
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bfd/
* libbdf.h: Regenerate.
* bfd-in2.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
* config/tc-arm.c (encode_arm_cp_address): Use
BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
mode.
(md_assemble): Only allow coprocessor instructions when Thumb-2 is
available.
(cCE, cC3): Define.
(insns): Use them for coprocessor instructions.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
(get_thumb32_insn): New function.
(put_thumb32_insn): New function.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
* arm-dis.c (coprocessor_opcodes): New.
(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
(print_insn_coprocessor): New function.
(print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
format characters.
(print_insn_thumb32): Use print_insn_coprocessor.
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opcodes/
* arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
gas/testsuite/
* gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn".
* gas/arm/thumb32.d: Ditto.
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bfd/
* reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
pop.
(do_t_addr): Implement 32-bit variant.
(do_t_push_pop): Make some errors warnings. Handle single register
32-bit case.
(insns): Use tCE for adr.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
(md_apply_fix): Ditto.
gas/testsuite/
* gas/arm/thumb32.d: Fix expected output for writeback addressing
modes. Add single high reg push/pop test.
* gas/asm/thumb32.s: Add single high reg push/pop test.
opcodes/
* arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
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bfd/
* reloc.c (BFD_RELOC_ARM_T32_IMM12): Add.
* bfd-in2.h: Regeenrate.
* libbfd.h: Regenerate.
gas/
* config/tc-arm.c (parse_tb): New function.
(enum operand_parse_code): Add OP_TB.
(parse_operands): Handle OP_TB.
(do_t_add_sub_w, do_t_tb): New functions.
(insns): Add entries for addw, subw, tbb and tbh.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
gas/testsuite/
* gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh.
* gas/arm/thumb32.d: Ditto.
opcodes/
* arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
(print_insn_thumb32): Fix decoding of thumb2 'I' operands.
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bfd:
* elf32-xtensa.c (vsprint_msg): Add format attribute. Fix
format bugs.
* vms.h (_bfd_vms_debug): Add format attribute.
(_bfd_vms_debug, _bfd_hexdump): Fix typos.
binutils:
* bucomm.h (report): Add format attribute.
* dlltool.c (inform): Likewise.
* dllwrap.c (display, inform, warn): Likewise.
* objdump.c (objdump_sprintf): Likewise.
* readelf.c (error, warn): Likewise. Fix format bugs.
gas:
* config/tc-tic30.c (debug): Add format attribute. Fix format
bugs.
include:
* dis-asm.h (fprintf_ftype): Add format attribute.
opcodes:
* arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
v850-dis.c: Fix format bugs.
* ia64-gen.c (fail, warn): Add format attribute.
* or32-opc.c (debug): Likewise.
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pattern.
vfp1xD.d: Adjust expected fadds disassemblies now that the dissassembler has
been fixed.
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* arm-opc.h: Delete; fold contents into ...
* arm-dis.c: ... here. Move includes of internal COFF headers
next to includes of internal ELF headers.
(streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
(struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
(struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
(arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
(iwmmxt_wwnames, iwmmxt_wwssnames):
Make const.
(regnames): Remove iWMMXt coprocessor register sets.
(iwmmxt_regnames, iwmmxt_cregnames): New statics.
(get_arm_regnames): Adjust fourth argument to match above changes.
(set_iwmmxt_regnames): Delete.
(print_insn_arm): Constify 'c'. Use ISO syntax for function
pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
and iwmmxt_cregnames, not set_iwmmxt_regnames.
(print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
ISO syntax for function pointer calls.
include:
* dis-asm.h (get_arm_regnames): Update prototype.
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that the ARM and 16-bit Thumb opcode tables each have comments
preceding them that describe all the codes, and only the codes,
valid in those tables. (32-bit Thumb table is already like this.)
Reorder the lists in all three comments to match the order in
which the codes are implemented.
Remove all forward declarations of static functions. Convert all
function definitions to ISO C format.
(print_insn_arm, print_insn_thumb16, print_insn_thumb32):
Return nothing.
(print_insn_thumb16): Remove unused case 'I'.
(print_insn): Update for changed calling convention of subroutines.
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* arm.h: Import complete list of official relocation names
and numbers from AAELF. Define FAKE_RELOCs for old names.
Remove a few old names no longer used anywhere.
bfd:
* elf32-arm.c: Wherever possible, use official reloc names
from AAELF.
(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
Add many new relocations from AAELF.
(elf32_arm_howto_from_type): Update to match.
(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
(elf32_arm_final_link_relocate): Add support for
R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
case entries redundant with default.
* reloc.c: Reorganize ARM relocations. Add Thumb
assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
* bfd-in2.h, libbfd.h: Regenerate.
opcodes:
* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
instructions. Adjust disassembly of some opcodes to match
unified syntax.
(thumb32_opcodes): New table.
(print_insn_thumb): Rename print_insn_thumb16; don't handle
two-halfword branches here.
(print_insn_thumb32): New function.
(print_insn): Choose among print_insn_arm, print_insn_thumb16,
and print_insn_thumb32. Be consistent about order of
halfwords when printing 32-bit instructions.
gas:
* hash.c (hash_lookup): Add len parameter. All callers changed.
(hash_find_n): New interface.
* hash.h: Prototype hash_find_n.
* sb.c: Include as.h.
(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
(sb_scrub_and_add_sb): New interface.
* sb.h: Prototype sb_scrub_and_add_sb.
* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
reference to BFD_RELOC_ARM_GOT12 which is never generated.
* config/tc-arm.c: Rewrite, adding Thumb-2 support.
gas/testsuite:
* gas/arm/arm.exp: Convert all existing "gas_test" tests to
"run_dump_test" tests. Run more tests unconditionally. Run new tests.
* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
Adjust to work as a dump test.
* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
New files.
* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
diagnostics that don't happen in the first pass anymore.
* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
* gas/arm/vfp-bad.l:
Update expected diagnostics.
* gas/arm/pic.d: Update expected reloc name.
* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
* gas/arm/r15-bad.s: Avoid two-argument mul.
* gas/arm/req.s: Adjust comments.
* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
use of PC.
* gas/arm/macro-1.d, gas/arm/macro1.s
* gas/arm/t16-bad.l, gas/arm/t16-bad.s
* gas/arm/tcompat.d, gas/arm/tcompat.s
* gas/arm/tcompat2.d, gas/arm/tcompat2.s
* gas/arm/thumb32.d, gas/arm/thumb32.s
New test pair.
ld/testsuite:
* ld-arm/mixed-app.d: Adjust expected disassembly a little.
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* config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe,
wfi, yield.
opcodes:
* arm-dis.c (thumb_opcodes): Add ARMv6K instructions nop, sev,
wfe, wfi, yield.
gas/testsuite:
* gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test.
* gas/arm/arm.exp: Run it.
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* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T.
Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2,
and ARM_ARCH_V6ZKT2.
opcodes:
* arm-dis.c (arm_opcodes): Document %E and %V.
Add entries for v6T2 ARM instructions:
bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
(print_insn_arm): Add support for %E and %V.
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architecuture defining the insn.
(arm_opcodes, thumb_opcodes): Delete. Move to ...
* arm-dis.c (arm_opcodes, thumb_opcodes): Here.
Also include opcode/arm.h.
* Makefile.am (arm-dis.lo): Update dependency list.
* Makefile.in: Regenerate.
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* elf32-arm.c (PLT_THUMB_STUB_SIZE): Define.
(elf32_arm_plt_thumb_stub): New.
(struct elf32_arm_link_hash_entry): Add plt_thumb_refcount
and plt_got_offset.
(elf32_arm_link_hash_traverse): Fix typo.
(elf32_arm_link_hash_table): Add obfd.
(elf32_arm_link_hash_newfunc): Initialize new fields.
(elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount.
(elf32_arm_link_hash_table_create): Initialize obfd.
(record_arm_to_thumb_glue): Mark the glue as a local ARM function.
(record_thumb_to_arm_glue): Mark the glue as a local Thumb function.
(bfd_elf32_arm_get_bfd_for_interworking): Verify that the
interworking BFD is not dynamic.
(bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32. Do
not emit glue for PLT references.
(elf32_arm_final_link_relocate): Handle Thumb functions. Do not
emit glue for PLT references. Support the Thumb PLT prefix.
(elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and
plt_thumb_refcount.
(elf32_arm_check_relocs): Likewise.
(elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and
plt_thumb_refcount.
(allocate_dynrelocs): Handle Thumb PLT references.
(elf32_arm_finish_dynamic_symbol): Likewise.
(elf32_arm_symbol_processing): New function.
(elf_backend_symbol_processing): Define.
opcodes/
* arm-dis.c (WORD_ADDRESS): Define.
(print_insn): Use it. Correct big-endian end-of-section handling.
gas/testsuite/
* gas/arm/mapping.d: Expect F markers for Thumb code.
* gas/arm/unwind.d: Update big-endian pattern.
ld/
* emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use
a dynamic object for stubs.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s,
ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r,
ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld,
ld-arm/arm-lib.ld: New files.
* ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d,
ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r,
ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d,
ld-arm/arm-static-app.r: Update for big-endian.
* ld-arm/arm-elf.exp: Run the new tests.
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