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path: root/opcodes/arm-dis.c
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2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+8
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira1-0/+18
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira1-0/+2
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+18
2019-04-15[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M MainlineAndre Vieira1-0/+9
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira1-0/+5
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM...Andre Vieira1-0/+18
2019-04-15[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo...Andre Vieira1-0/+8
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira1-0/+1
2019-04-07PR24421, Wrong brackets in opcodes/arm-dis.cAlan Modra1-213/+213
2019-03-25Arm: Fix Arm disassembler mapping symbol search.Tamar Christina1-148/+101
2019-02-07Arm: Backport hlt to all architectures.Tamar Christina1-1/+2
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-12-18Include bfd_stdint.h in bfd.hAlan Modra1-0/+1
2018-11-06[BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros.Sudakshina Das1-5/+5
2018-10-19Arm: Fix disassembler crashing on -b binary when thumb file and thumb not for...Tamar Christina1-3/+8
2018-10-05[Arm, 2/3] Add instruction SB for AArch32Sudakshina Das1-0/+6
2018-07-11Adds the speculation barrier instructions to the ARM assembler and disassembler.Sudakshina Das1-6/+10
2018-07-02GDB PR tdep/8282: MIPS: Wire in `set disassembler-options'Maciej W. Rozycki1-5/+11
2018-07-02[ARM] Update bfd's Tag_CPU_arch knowledgeThomas Preud'homme1-21/+50
2018-03-03opcodes error messagesAlan Modra1-2/+5
2018-02-27[ARM] Remove ARM_FEATURE_COPY macroThomas Preud'homme1-2/+2
2018-02-19[ARM] Fix bxns maskThomas Preud'homme1-1/+1
2018-01-09[Arm] Add CSDB instructionJames Greenhalgh1-0/+6
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-11-08Adds command line support for Armv8.4-A, via the new command line option -mar...Jiong Wang1-0/+18
2017-08-09[ARM] Don't warn on REG_SP when used in CRC32 instructionsJiong Wang1-11/+6
2017-07-04[Patch ARM] Support MVFR2 VFP Coprocessor register for ARMv8-ARamana Radhakrishnan1-0/+4
2017-06-28[ARM] Assembler and disassembler support Dot Product ExtensionJiong Wang1-0/+6
2017-06-14Don't use print_insn_XXX in GDBYao Qi1-1/+1
2017-06-14[opcodes][arm] Remove bogus entry added by accident in former patchAndre Vieira1-2/+0
2017-05-02Fix value in comment of disassembled ARM type A opcodes.Bernd Edlinger1-2/+2
2017-04-05-Wwrite-strings: Constify struct disassemble_info's disassembler_options fieldPedro Alves1-2/+2
2017-02-28GDB: Add support for the new set/show disassembler-options commands.Peter Bergner1-95/+74
2017-01-18[ARM] Fix the decoding of indexed element VCMLA instructionSzabolcs Nagy1-4/+4
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-12-16Fix compile time warning building arm-dis.cNick Clifton1-2/+2
2016-12-05[ARM] Add ARMv8.3 VCMLA and VCADD instructionsSzabolcs Nagy1-0/+28
2016-12-05[ARM] Add ARMv8.3 VJCVT instructionSzabolcs Nagy1-0/+4
2016-10-06-Wimplicit-fallthrough warning fixesAlan Modra1-0/+1
2016-08-26Add missing ARMv8-M special registersThomas Preud'homme1-14/+23
2016-06-30Fix typo in commentYao Qi1-1/+1
2016-06-07[ARM] Add command line option for RAS extension.Matthew Wahab1-2/+2
2016-05-10Use getters/setters to access ARM branch typeThomas Preud'homme1-4/+5
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme1-1/+18
2016-04-05[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang1-6/+18
2016-03-16[ARM] Support ARMv8.2 FP16 simd instructionsJiong Wang1-23/+81
2016-02-24[OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.Renlin Li1-4/+87
2016-02-24[OPCODES][ARM]Fix mask for a few coprocessor opcodes.Renlin Li1-8/+8
2016-02-24[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2,...Renlin Li1-0/+23