Age | Commit message (Collapse) | Author | Files | Lines |
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* gas/arm/archv6.d: New file.
* gas/arm/archv6.s: Likewise.
* gas/arm/thumbv6.d: Likewise.
* gas/arm/thumbv6.s: Likewise.
Add V6 support.
* config/tc-arm.c (ARM_EXT_V6): New macro.
(ARM_ARCH_V6): Likewise.
(SHIFT_IMMEDIATE): Likewise.
(SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise.
(SHIFT_ASR_IMMEDIATE): Likewise.
(SHIFT_LSL_IMMMEDIATE): Likewise.
(do_cps): New function.
(do_cpsi): Likewise.
(do_ldrex): Likewise.
(do_pkhbt): Likewise.
(do_pkhtb): Likewise.
(do_qadd16): Likewise.
(do_rev): Likewise.
(do_rfe): Likewise.
(do_sxtah): Likewise.
(do_sxth): Likewise.
(do_setend): Likewise.
(do_smlad): Likewise.
(do_smlald): Likewise.
(do_smmul): Likewise.
(do_ssat): Likewise.
(do_usat): Likewise.
(do_srs): Likewise.
(do_ssat16): Likewise.
(do_usat16): Likewise.
(do_strex): Likewise.
(do_umaal): Likewise.
(do_cps_mode): Likewise.
(do_cps_flags): Likewise.
(do_endian_specifier): Likewise.
(do_pkh_core): Likewise.
(do_sat): Likewise.
(do_sat16): Likewise.
(insns): Add V6 instructions.
(do_t_cps): New function.
(do_t_cpy): Likewise.
(do_t_setend): Likewise.
(THUMB_CPY): New macro.
(tinsns): Add V6 instructions.
(decode_shift): Handle V6 restricted-shift options.
(thumb_mov_compare): Support CPY.
(arm_cores): Add arm1136js and arm1136jfs.
(arm_archs): Add armv6.
(arm_fpus): Add arm1136jfs.
* doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and
armv6 options.
* gas/arm/arm.exp: Add archv6 and thumbv6.
* gas/arm/archv6.d: New file.
* gas/arm/archv6.s: Likewise.
* gas/arm/thumbv6.d: Likewise.
* gas/arm/thumbv6.s: Likewise.
* arm-dis.c (print_arm_insn): Add 'W' macro.
* arm-opc.h (arm_opcodes): Add V6 instructions.
(thumb_opcodes): Likewise.
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skip displaying arm elf mapping symbols in disassembly output.
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* doc/binutils.texi: Document that multiple -M switches are accepted and that
a single -M switch can contain comma separated options.
* arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be
NUL terminated.
(parse_disassembler_options): Allow options to be space or comma separated.
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(print_insn_thumb): Likewise.
* h8500-dis.c (print_insn_h8500): Constify "opcode".
* mcore-dis.c (print_insn_mcore): Constify "op". Formatting.
* ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid
type-punned pointer warnings.
<case 'L'>: Likewise. Fix error message too.
* pdp11-dis.c (print_reg): Warning fix.
* sh-dis.c (print_movxy): Constify "op" param.
(print_insn_ddt): Constify sh_opcode_info vars.
(print_insn_ppi): Likewise.
(print_insn_sh): Likewise.
* tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid
type-punned pointer warnings.
* w65-dis.c (print_insn_w65): Constify "op".
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comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
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ARM ARM.
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* arm-dis.c (print_insn_arm): Don't handle 'h' case.
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* arm-dis.c (print_insn_arm): Support new disassembly qualifiers for
VFP bitfields.
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* opcodes/arm-dis.c (print_insn_arm): Add 'I' case.
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* arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
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* arm-dis.c (regnames): Add an additional register set to match
the set used by GCC. Make it the default.
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* arm-dis.c: Change flavor name from atpcs-special to
special-atpcs to prevent name conflict in gdb.
(get_arm_regname_num_options, set_arm_regname_option,
get_arm_regnames): New functions. API to access the several
flavor of register names. Note: Used by gdb.
(print_insn_thumb): Use the register name entry from the currently
selected flavor for LR and PC.
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to be exported.
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Document ARM disassembler options.
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bounded by non-function labels.
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* arm-dis.c: Include "sysdep.h".
* tic30-dis.c: Don't include <stdlib.h> or <string.h>. Include
"sysdep.h".
* Makefile.am: Rebuild dependencies.
* Makefile.in: Rebuild.
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disassembler
Add support for register name set selection ot ARM disassembler.
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