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path: root/opcodes/arm-dis.c
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2013-10-15Fix neon vshll disassembly.Ramana Radhakrishnan1-3/+3
opcodes/ 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * arm-dis.c (neon_opcodes): Adjust print string for vshll. gas/testsuite/ 2013-10-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * gas/arm/neon-cov.d: Adjust output.
2013-09-04 PR gas/15914Nick Clifton1-3/+16
* config/tc-arm.c (T16_32_TAB): Add _udf. (do_t_udf): New function. (insns): Add "udf". * gas/arm/udf-bad.s: New file. * gas/arm/udf-bad.d: New file. * gas/arm/udf-bad.l: New file. * gas/arm/udf.s: New file. * gas/arm/udf.d: New file. * gas/arm/udf.l: New file. * arm-dis.c (arm_opcodes): Add udf. (thumb_opcodes): Use "udf" mnemonic rather than UNDEFINED_INSTRUCTION. (thumb32_opcodes): Add udf.w. (print_insn_thumb32): Handle %H as the thumb32_opcodes comment says.
2013-03-11Add support for AArch32 CRC instruction in ARMv8.Kyrylo Tkachov1-1/+21
gas/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/tc-arm.c (crc_ext_armv8): New feature set. (UNPRED_REG): New macro. (do_crc32_1): New function. (do_crc32b, do_crc32h, do_crc32w, do_crc32cb, do_crc32ch, do_crc32cw): Likewise. (TUEc): New macro. (insns): Add entries for crc32 mnemonics. (arm_extensions): Add entry for crc. include/opcode/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * arm.h (CRC_EXT_ARMV8): New constant. (ARCH_CRC_ARMV8): New macro. opcodes/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * arm-dis.c (arm_opcodes): Add entries for CRC instructions. (thumb32_opcodes): Likewise. (print_insn_thumb32): Handle 'S' control char. gas/testsuite/ChangeLog 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gas/arm/crc32-bad.d: New file. * gas/arm/crc32-bad.l: Likewise. * gas/arm/crc32-bad.s: Likewise. * gas/arm/crc32.d: Likewise. * gas/arm/crc32.s: Likewise.
2013-02-112013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw1-2/+2
* arm-dis.c: Update strht pattern. * gas/arm/archv6t2.s: Add strht and ldrht tests. * gas/arm/archv6t2.d: Add disassembly patterns for the above.
2012-10-112012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw1-5/+5
* arm-dis.c: Use preferred form of vrint instruction variants for disassembly. 2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gas/arm/armv8-a+fp.d: Use preferred form of vrint instruction variants for disassembly. * gas/arm/armv8-a+fp.s: Likewise. * gas/arm/armv8-a+simd.d: Likewise. * gas/arm/armv8-a+simd.s: Likewise.
2012-09-182012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw1-28/+28
opcodes: * arm-dis.c: Changed ldra and strl-form mnemonics to lda and stl-form. gas: * config/tc-arm.c: Changed ldra and strl-form mnemonics to lda and stl-form for armv8. gas/testsuite: * gas/arm/armv8-a-bad.l: Updated for changed mnemonics. * gas/arm/armv8-a-bad.s: Likewise. * gas/arm/armv8-a.d: Likewise. * gas/arm/armv8-a.s: Likewise. * gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt. * gas/arm/inst.d: Updated.
2012-08-24 * gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.Matthew Gretton-Dann1-0/+3
(do_sha1h): New function. (do_sha1su1): Likewise. (do_sha256su0): Likewise. (insns): Add 2 operand SHA instructions. * gas/testsuite/gas/arm/armv8-a+crypto.s: Update testcase. * gas/testsuite/gas/arm/armv8-a+crypto.d: Likewise. * opcodes/arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
2012-08-24 * gas/config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.Matthew Gretton-Dann1-0/+7
(do_crypto_3op_1): New function. (do_sha1c): Likewise. (do_sha1p): Likewise. (do_sha1m): Likewise. (do_sha1su0): Likewise. (do_sha256h): Likewise. (do_sha256h2): Likewise. (do_sha256su1): Likewise. (insns): Add SHA 3 operand instructions. * gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase. * gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise. * opcodes/arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
2012-08-24 * gas/config/tc-arm.c (neon_type_mask): Add P64 type.Matthew Gretton-Dann1-0/+1
(type_chk_of_el_type): Handle P64 type. (el_type_of_type_chk): Likewise. (do_neon_vmull): Handle VMULL.P64. * gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase. * gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise. * opcodes/arm-dis.c (neon_opcodes): Handle VMULL.P64.
2012-08-24 * gas/config/tc-arm.c (NEON_ENC_TAB): Add aes entry.Matthew Gretton-Dann1-0/+4
(neon_type_mask): Add N_UNT. (neon_check_type): Don't always decay typed to untyped sizes. (do_crypto_2op_1): New function. (do_aese): Likewise. (do_aesd): Likewise. (do_aesmc.8): Likewise. (do_aesimc.8): Likewise. (insns): Add AES instructions. * gas/testsuite/gas/arm/armv8-a+crypto.d: New testcase. * gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise. * opcodes/arm-dis.c (neon_opcodes): Add support for AES instructions.
2012-08-24 * gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bitMatthew Gretton-Dann1-0/+2
floating point types. (do_neon_cvttb_2): New function. (do_neon_cvttb_1): Likewise. (do_neon_cvtb): Refactor to use do_neon_cvttb_1. (do_neon_cvtt): Likewise. * gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase. * gas/testsuite/gas/arm/armv8-a+fp.s: Likewise. * gas/testsuite/gas/arm/half-prec-vfpv3.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add support for HP/DP conversions.
2012-08-24 * gas/config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.Matthew Gretton-Dann1-0/+5
(neon_cvt_mode): Add neon_cvt_mode_r. (do_vrint_1): New function. (do_vrint_x): Likewise. (do_vrint_z): Likewise. (do_vrint_r): Likewise. (do_vrint_a): Likewise. (do_vrint_n): Likewise. (do_vrint_p): Likewise. (do_vrint_m): Likewise. (insns): Add VRINT instructions. * gas/testsuite/gas/arm/armv8-a+fpv5.d: Update testcase. * gas/testsuite/gas/arm/armv8-a+fpv5.s: Likewise. * gas/testsuite/gas/arm/armv8-a+simdv3.d: Likewise. * gas/testsuite/gas/arm/armv8-a+simdv3.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add VRINT. (neon_opcodes): Likewise.
2012-08-24 * gas/config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.Matthew Gretton-Dann1-1/+4
(neon_cvt_mode): New enumeration. (do_vfp_nsyn_cvt_fpv8): New function. (do_neon_cvt_1): Add support for new conversions. (do_neon_cvtr): Use neon_cvt_mode enumerator. (do_neon_cvt): Likewise. (do_neon_cvta): New function. (do_neon_cvtn): Likewise. (do_neon_cvtp): Likewise. (do_neon_cvtm): Likewise. (insns): Add new VCVT instructions. * gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase. * gas/testsuite/gas/arm/armv8-a+fp.s: Likewise. * gas/testsuite/gas/arm/armv8-a+simd.d: Likewise. * gas/testsuite/gas/arm/armv8-a+simd.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add support for new VCVT variants. (neon_opcodes): Likewise.
2012-08-24 * gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.Matthew Gretton-Dann1-0/+6
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator. (vfp_or_neon_is_neon): Add check for SIMD for ARMv8. (do_maxnm): New function. (insns): Add vmaxnm, vminnm entries. * gas/testsuite/gas/testsuite/gas/armv8-a+fp.d: Update testcase. * gas/testsuite/gas/testsuite/gas/armv8-a+fp.s: Likewise. * gas/testsuite/gas/testsuite/gas/armv8-a+simd.d: New testcase. * gas/testsuite/gas/testsuite/gas/armv8-a+simd.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM. (neon_opcodes): Likewise.
2012-08-24 * gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.Matthew Gretton-Dann1-0/+30
(NEON_ENC_FPV8_): New define. (do_vfp_nsyn_fpv8): New function. (do_vsel): Likewise. (insns): Add VSEL instructions. * gas/testsuite/gas/arm/armv8-a+fp.d: New testcase. * gas/testsuite/gas/arm/armv8-a+fp.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL. (print_insn_coprocessor): Add new %<>c bitfield format specifier.
2012-08-24 * gas/config/tc-arm.c (do_rm_rn): New function.Matthew Gretton-Dann1-1/+34
(do_strlex): Likewise. (do_t_strlex): Likewise. (insns): Add support for LDRA/STRL instructions. * gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add LDRA/STRL instructions. (thumb32_opcodes): Likewise. (print_arm_insn): Add support for %<>T formatter.
2012-08-24 * gas/config/tc-arm.c (do_t_bkpt_hlt1): New function.Matthew Gretton-Dann1-0/+3
(do_t_hlt): New function. (do_t_bkpt): Use do_t_bkpt_hlt1. (insns): Add HLT. * gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add HLT. (thumb_opcodes): Likewise.
2012-08-24 * gas/config/tc-arm.c (insns): Add DCPS instruction.Matthew Gretton-Dann1-0/+1
* gas/testsuite/gas/arm/armv8-a.d: Update. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
2012-08-24 * gas/config/tc-arm.c (T16_32_TAB): Add _sevl.Matthew Gretton-Dann1-0/+9
(insns): Add SEVL. * gas/testsuite/gas/arm/armv8-a.s: New testcase. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add SEVL. (thumb_opcodes): Likewise. (thumb32_opcodes): Likewise.
2012-08-24 * gas/config/tc-arm.c (asm_barrier_opt): Add arch field.Matthew Gretton-Dann1-27/+35
(mark_feature_used): New function. (parse_barrier): Check specified option is valid for the specified architecture. (UL_BARRIER): New macro. (barrier_opt_names): Update for new barrier options. * gas/testsuite/gas/arm/armv8-a-barrier.s: New testcase. * gas/testsuite/gas/arm/armv8-a-barrier-arm.d: Likewise. * gas/testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise. * opcodes/arm-dis.c (data_barrier_option): New function. (print_insn_arm): Use data_barrier_option. (print_insn_thumb32): Use data_barrier_option.
2012-08-24 * opcodes/arm-dis.c (COND_UNCOND): New constant.Matthew Gretton-Dann1-4/+24
(print_insn_coprocessor): Add support for %u format specifier. (print_insn_neon): Likewise.
2012-07-24 PR binutils/13135Nick Clifton1-28/+29
* arm-dis.c: Add necessary casts for printing integer values. Use %s when printing string values. * hppa-dis.c: Likewise. * m68k-dis.c: Likewise. * microblaze-dis.c: Likewise. * mips-dis.c: Likewise. * ppc-dis.c: Likewise. * sparc-dis.c: Likewise. * dis-asm.h (fprintf_ftype): Add ATTRIBUTE_FPTR_PRINTF_2.
2012-05-16 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}Nick Clifton1-0/+34
to PUSH/POP {reg}. * binutils-all/arm/objdump.exp: STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer. * gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer. Some new test cases have been added as well. * gas/arm/stm-ldm.s: Likewise.
2012-05-11 PR binutils/14006Nick Clifton1-3/+13
* arm-dis.c (print_insn): Fix detection of instruction mode in files containing multiple executable sections.
2011-10-18 Jie Zhang <jie@codesourcery.com>Julian Brown1-6/+16
Julian Brown <julian@codesourcery.com> gas/ * config/tc-arm.c (parse_shifter_operand): Fix handling of explicit rotation. (encode_arm_shifter_operand): Likewise. gas/testsuite/ * gas/arm/adrl.d: Adjust. * gas/arm/immed2.d: New test. * gas/arm/immed2.s: New test. ld/testsuite/ * ld-arm/cortex-a8-fix-b-plt.d: Adjust. * ld-arm/cortex-a8-fix-bcc-plt.d: Adjust. * ld-arm/cortex-a8-fix-bl-plt.d: Adjust. * ld-arm/cortex-a8-fix-bl-rel-plt.d: Adjust. * ld-arm/cortex-a8-fix-blx-plt.d: Adjust. * ld-arm/ifunc-1.dd: Adjust. * ld-arm/ifunc-2.dd: Adjust. * ld-arm/ifunc-3.dd: Adjust. * ld-arm/ifunc-4.dd: Adjust. * ld-arm/ifunc-5.dd: Adjust. * ld-arm/ifunc-6.dd: Adjust. * ld-arm/ifunc-7.dd: Adjust. * ld-arm/ifunc-8.dd: Adjust. * ld-arm/ifunc-9.dd: Adjust. * ld-arm/ifunc-10.dd: Adjust. * ld-arm/ifunc-14.dd: Adjust. * ld-arm/ifunc-15.dd: Adjust. * ld-arm/ifunc-16.dd: Adjust. opcodes/ * arm-dis.c (print_insn_arm): Explicitly specify rotation if needed.
2011-07-12 * arm-dis.c (print_insn_arm): Revert previous, undocumented,Nick Clifton1-3/+0
accidental change.
2011-07-01 PR binutils/12329Nick Clifton1-0/+3
* avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM insns using post-increment addressing. * avr.h (AVR_ISA_AVR6): Fix typo, adding AVR_ISA_SPMX.
2011-06-03 PR binutils/12752Nick Clifton1-8/+8
* arm-dis.c (print_insn_coprocessor): Use bfd_vma type for computing address offsets. (print_arm_address): Likewise. (print_insn_arm): Likewise. (print_insn_thumb16): Likewise. (print_insn_thumb32): Likewise.
2011-06-02 gas/Nathan Sidwell1-37/+46
* config/tc-arm.c (parse_address_main): Handle -0 offsets. (encode_arm_addr_mode_2): Set default sign of zero here ... (encode_arm_addr_mode_3): ... and here. (encode_arm_cp_address): ... and here. (md_apply_fix): Use default sign of zero here. gas/testsuite/ * gas/arm/inst.d: Adjust for signed zero offsets. * gas/arm/ldst-offset0.d: New test. * gas/arm/ldst-offset0.s: New test. * gas/arm/offset-1.d: New test. * gas/arm/offset-1.s: New test. ld/testsuite/ Adjust tests for zero offset formatting. * ld-arm/cortex-a8-fix-bcc-plt.d: Adjust. * ld-arm/farcall-arm-arm-pic-veneer.d: Adjust. * ld-arm/farcall-arm-thumb.d: Adjust. * ld-arm/farcall-group-size2.d: Adjust. * ld-arm/farcall-group.d: Adjust. * ld-arm/farcall-mix.d: Adjust. * ld-arm/farcall-mix2.d: Adjust. * ld-arm/farcall-mixed-lib-v4t.d: Adjust. * ld-arm/farcall-mixed-lib.d: Adjust. * ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust. * ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust. * ld-arm/farcall-thumb-thumb.d: Adjust. * ld-arm/ifunc-10.dd: Adjust. * ld-arm/ifunc-3.dd: Adjust. * ld-arm/ifunc-4.dd: Adjust. * ld-arm/ifunc-5.dd: Adjust. * ld-arm/ifunc-6.dd: Adjust. * ld-arm/ifunc-7.dd: Adjust. * ld-arm/ifunc-8.dd: Adjust. * ld-arm/jump-reloc-veneers-long.d: Adjust. * ld-arm/tls-longplt-lib.d: Adjust. * ld-arm/tls-thumb1.d: Adjust. opcodes/ * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 as address offset. (print_arm_address): Likewise. Elide positive #0 appropriately. (print_insn_arm): Likewise.
2011-06-02Fix spelling mistakes.Nick Clifton1-3/+3
2011-04-19 * config/tc-arm.c (v7m_psrs): Revert previous delta.Nick Clifton1-1/+1
* gas/arm/mrs-msr-thumb-v7e-m.s: Restore name of basepri_max register. * gas/arm/mrs-msr-thumb-v7e-m.d: Likewise. * gas/arm/arch7.d: Likewise. * gas/arm/arch7.s: Likewise. * arm-dis.c: Revert previous reversion.
2011-04-19 * gas/arm/arch7.s: Fix typo basepri_max should be basepri_mask.Nick Clifton1-10/+1
* gas/arm/mrs-msr-thumb-v7e-m.s: Likewise. * gas/arm/arch7.d: Update expected disassembly. * gas/arm/attr-march-armv7.d: Remove Microcontroller tag. * gas/arm/blx-bad.d: Only run for ELF based targets. * gas/arm/mrs-msr-thumb-v6t2.d: Likewise. * gas/arm/vldm-arm.d: Likewise. * gas/arm/mrs-msr-thumb-v7-m.d: Likewise. Remove qualifiers from PSR and IAPSR regsiter names. * gas/arm/mrs-msr-thumb-v7e-m.d: Likewise. * gas/arm/thumb2_bcond.d: Update expected disassembly to allow for relaxing of branch insns. * gas/arm/thumb32.d: Fix whitespace problems in disassembly. * config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to detect M-profile targets. (do_t_swi): Exclude v7 and higher variants from arm_ext_os test. (v7m_psrs): Fix typo: basepri_max should be basepri_mask. * arm-dis.c (psr_name): Revert previous delta. * arm.h (ARM_AEXT_V7_ARM): Remove ARM_EXT_OS from bitmask.
2011-04-12 PR binutils/12534Nick Clifton1-4/+20
* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn patterns. (print_insn_thumb32): Handle %L. * gas/arm/thumb32.s: Add PC relative LDRD and STRD insns. * gas/arm/thumb32.l: Update expected output. * gas/arm/thumb32.d: Update expected disassembly.
2011-04-11 gas/Julian Brown1-1/+10
* config/tc-arm.c (parse_psr): Add LHS argument. Improve support for *APSR bitmasks. (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR. Remove OP_RVC_PSR. (parse_operands): Likewise. (do_mrs): Tweak error message for constraint. (do_t_mrs): Update constraints for changes to APSR support. (do_t_msr): Likewise. Don't set PSR_f flag here. (psrs): Remove "g", "nzcvq", "nzcvqg". (insns): Tweak entries for msr and mrs instructions. opcodes/ * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. (print_insn_thumb32): Add APSR bitmask support. gas/testsuite/ * gas/arm/mrs-msr-thumb-v7-m.s: New. * gas/arm/mrs-msr-thumb-v7-m.d: New. * gas/arm/mrs-msr-thumb-v7-m-bad.d: New. * gas/arm/mrs-msr-thumb-v7-m-bad.l: New. * gas/arm/mrs-msr-thumb-v7-m-bad.s: New. * gas/arm/mrs-msr-thumb-v7e-m.d: New. * gas/arm/mrs-msr-thumb-v7e-m.s: New. * gas/arm/mrs-msr-arm-v7-a-bad.d: New. * gas/arm/mrs-msr-arm-v7-a-bad.l: New. * gas/arm/mrs-msr-arm-v7-a-bad.s: New. * gas/arm/mrs-msr-arm-v7-a.d: New. * gas/arm/mrs-msr-arm-v7-a.s: New. * gas/arm/mrs-msr-arm-v6.d: New. * gas/arm/mrs-msr-arm-v6.s: New. * gas/arm/mrs-msr-thumb-v6t2.d: New. * gas/arm/mrs-msr-thumb-v6t2.s: New. * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX, bitmasks for IAPSR etc. * gas/arm/arch7.s: Specify bitmask for APSR writes. * gas/arm/archv6m.s: Likewise. * msr-imm-bad.l: Tweak expected disassembly in error message. * msr-reg-bad.l: Likewise. * msr-imm.d: Tweak expected disassembly. * msr-reg.d: Likewise. * msr-reg-thumb.d: Likewise. * msr-imm.s: Specify bitmask on APSR writes. * msr-reg.s: Add comment about deprecated usage.
2011-04-082011-04-07 Paul Carroll<pcarroll@codesourcery.com>Paul Brook1-18/+23
opcodes/ * arm-dis.c (print_insn): init vars moved into private_data structure. binutils/testsuite/ * binutils-all/arm/simple.s: Demo issue with objdump with multiple input files * binutils-all/arm/objdump.exp: added new ARM test case code
2011-03-14include/elf/Richard Sandiford1-1/+1
* arm.h (R_ARM_IRELATIVE): New relocation. bfd/ * reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation. * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE entry. (elf32_arm_howto_from_type): Update accordingly. (elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE. (elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3. (arm_plt_info): New structure, split out from elf32_arm_link_hash_entry with an extra noncall_refcount field. (arm_local_iplt_info): New structure. (elf_arm_obj_tdata): Add local_iplt. (elf32_arm_local_iplt): New accessor macro. (elf32_arm_link_hash_entry): Replace plt_thumb_refcount, plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info. Change tls_type to a bitfield and add is_iplt. (elf32_arm_link_hash_newfunc): Update accordingly. (elf32_arm_allocate_local_sym_info): New function. (elf32_arm_create_local_iplt): Likewise. (elf32_arm_get_plt_info): Likewise. (elf32_arm_plt_needs_thumb_stub_p): Likewise. (elf32_arm_get_local_dynreloc_list): Likewise. (create_ifunc_sections): Likewise. (elf32_arm_copy_indirect_symbol): Update after the changes to elf32_arm_link_hash_entry. Assert the is_iplt has not yet been set. (arm_type_of_stub): Add an st_type argument. Use elf32_arm_get_plt_info to get PLT information. Assert that all STT_GNU_IFUNC references are turned into PLT references. (arm_build_one_stub): Pass the symbol type to elf32_arm_final_link_relocate. (elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub. (elf32_arm_allocate_irelocs): New function. (elf32_arm_add_dynreloc): In static objects, use .rel.iplt for all R_ARM_IRELATIVE. (elf32_arm_allocate_plt_entry): New function. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_final_link_relocate): Add an st_type parameter. Set srelgot to null for static objects. Use separate variables to record which st_value and st_type should be used when generating a dynamic relocation. Use elf32_arm_get_plt_info to find the symbol's PLT information, setting has_iplt_entry, splt, plt_offset and gotplt_offset accordingly. Check whether STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change the relocation target accordingly. Broaden assert to include .iplts. Don't set sreloc for static relocations. Assert that we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32 and R_ARM_ABS32_NOI. Generate R_ARM_IRELATIVE relocations instead of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC symbol. Pass the symbol type to arm_type_of_stub. Conditionally resolve GOT references to the .igot.plt entry. (elf32_arm_relocate_section): Update the call to elf32_arm_final_link_relocate. (elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_check_relocs): Always create ifunc sections. Set isym at the same time as setting h. Use elf32_arm_allocate_local_sym_info to allocate local symbol information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Record PLT information for local STT_GNU_IFUNC functions as well as global functions. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols. Don't remove STT_GNU_IFUNC PLTs unless all references have been removed. Update after the changes to elf32_arm_link_hash_entry. (allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT entries should live in .plt or .iplt. Check whether the .igot.plt and .got entries can be combined. Use elf32_arm_allocate_plt_entry to allocate .plt and .(i)got.plt entries. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Likewise other non-.got dynamic relocations. (elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt and dynamic relocations for local STT_GNU_IFUNC symbols. Check whether the .igot.plt and .got entries can be combined. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Use stashed section pointers intead of strcmp checks. Handle iplt and igotplt. (elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry to fill in .plt, .got.plt and .rel(a).plt entries. Point STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations resolve to it. (elf32_arm_output_plt_map_1): New function, split out from elf32_arm_output_plt_map. Handle .iplt entries. Use elf32_arm_plt_needs_thumb_stub_p. (elf32_arm_output_plt_map): Call it. (elf32_arm_output_arch_local_syms): Add mapping symbols for local .iplt entries. (elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols. (elf32_arm_swap_symbol_out): Likewise. (elf32_arm_add_symbol_hook): New function. (elf_backend_add_symbol_hook): Define for all targets. opcodes/ * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. gas/ * config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to determine whether a relocation is needed. (md_apply_fix, arm_apply_sym_value): Likewise. ld/testsuite/ * ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd, ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd, ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s, ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd, ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd, ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd, ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s, ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd, ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd, ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd, ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s, ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd, ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd, ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd, ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s, ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd, ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd, ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd, ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s, ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd, ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd, ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld, ld-arm/ifunc-static.ld: New tests. * ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d, ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update for new stub hashes. * ld-arm/arm-elf.exp: Run them.
2011-03-14include/elf/Richard Sandiford1-3/+8
* internal.h (elf_internal_sym): Add st_target_internal. * arm.h (arm_st_branch_type): New enum. (ARM_SYM_BRANCH_TYPE): New macro. bfd/ * elf-bfd.h (elf_link_hash_entry): Add target_internal. * elf.c (swap_out_syms): Set st_target_internal for each Elf_Internal_Sym. * elfcode.h (elf_swap_symbol_in): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-sh-symbian.c (sh_symbian_relocate_section): Likewise. * elf64-sparc.c (elf64_sparc_output_arch_syms): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise. * elflink.c (elf_link_output_extsym): Likewise. (bfd_elf_final_link): Likewise. (elf_link_add_object_symbols): Copy st_target_internal to the hash table if we see a definition. (_bfd_elf_copy_link_hash_symbol_type): Copy target_internal. * elf32-arm.c (elf32_arm_stub_hash_entry): Replace st_type with a branch_type field. (a8_erratum_fix, a8_erratum_reloc): Likewise. (arm_type_of_stub): Replace actual_st_type with an actual_branch_type parameter. (arm_build_one_stub): Use branch types rather than st_types to determine the type of branch. (cortex_a8_erratum_scan): Likewise. (elf32_arm_size_stubs): Likewise. (bfd_elf32_arm_process_before_allocation): Likewise. (allocate_dynrelocs_for_symbol): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_final_link_relocate): Replace sym_flags parameter with a branch_type parameter. (elf32_arm_relocate_section): Update call accordingly. (elf32_arm_adjust_dynamic_symbol): Don't check STT_ARM_TFUNC. (elf32_arm_output_map_sym): Initialize st_target_internal. (elf32_arm_output_stub_sym): Likewise. (elf32_arm_symbol_processing): Delete. (elf32_arm_swap_symbol_in): Convert STT_ARM_TFUNCs into STT_FUNCs. Use st_target_internal to record the branch type. (elf32_arm_swap_symbol_out): Use st_target_internal to test for Thumb functions. (elf32_arm_is_function_type): Delete. (elf_backend_symbol_processing): Likewise. (elf_backend_is_function_type): Likewise. gas/ * config/tc-arm.c (arm_adjust_symtab): Set the branch type for Thumb symbols. ld/ * emultempl/armelf.em (gld${EMULATION_NAME}_finish): Check eh->target_internal. opcodes/ * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. Use branch types instead. (print_insn): Likewise.
2011-01-06 gas/testsuite/Nathan Sidwell1-1/+1
* gas/arm/blx-bad.s: New. * gas/arm/blx-bad.d: New. opcodes/ * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
2010-09-272010-09-27 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann1-2/+6
* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative VSTR, issue an error in THUMB mode. * opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment correction to unaligned PCs while printing comment. * gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment. * gas/testsuite/gas/arm/vldr.d: Likewise. * gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR. * gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise. * gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise. * gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise. * gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
2010-09-23 * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.Matthew Gretton-Dann1-16/+143
* gas/config/tc-arm.c (arm_ext_virt): New variable. (arm_reg_type): Add REG_TYPE_RNB for banked registers. (reg_entry): Allow registers to be larger than a byte. (reg_alias): Fix type warning. (parse_operands): Parse banked registers when appropriate. (do_mrs): Add support for Virtualization Extensions. (do_hvc): New function. (do_t_mrs): Add support for Virtualization Extensions. (do_t_msr): Likewise. (do_t_hvc): New function. (SPLRBANK): New define. (reg_names): Add banked registers. (insns): Add support for Virtualization Extensions. (md_apply_fixup): Likewise. (arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions. (arm_extensions): Add 'virt' extension. (aeabi_set_public_attributes): Add support for Virtualization Extensions. * gas/doc/c-arm.texi: Document 'virt' extension. * gas/testsuite/gas/arm/armv7-a+virt.d: New test. * gas/testsuite/gas/arm/armv7-a+virt.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions. * gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test. * gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * include/opcode/arm.h (ARM_EXT_VIRT): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Rename... (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization Extensions. * opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support. (thumb32_opcodes): Likewise. (banked_regname): New function. (print_insn_arm): Add Virtualization Extensions support. (print_insn_thumb32): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_adiv): New variable.Matthew Gretton-Dann1-0/+4
(do_div): New function. (insns): Accept UDIV and SDIV in ARM state. (arm_cpus): The cortex-a15 option has all current v7-A extensions. (arm_extensions): Add 'idiv' extension. (aeabi_set_public_attributes): Update Tag_DIV_use values for the Integer Divide extension. * gas/doc/c-arm.texi: Document the idiv extension. * gas/testsuite/gas/arm/armv7-a+idiv.d: New test. * gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension. * gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test. * include/opcode/arm.h (ARM_AEXT_ADIV): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise. * opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in ARM state.
2010-09-23 * gas/config/tc-arm.c (arm_ext_v6z): Remove.Matthew Gretton-Dann1-3/+5
(arm_ext_sec): New variable. (do_t_smc): In Thumb state SMC requires v7-A. (insns): Make SMC depend on Security Extensions. (arm_cpus): All -mcpu=cortex-a* options have the Security Extensions. (arm_extensions): Add 'sec' extension. (cpu_arch_ver): Reorder. (aeabi_set_public_attributes): Emit Tag_Virtualization_use as appropriate. * gas/doc/c-arm.texi: Document Security Extensions. * gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions.. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test. * gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test. * gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions. * gas/testsuite/gas/arm/thumb32.d: Likewise. * gas/testsuite/gas/arm/thumb32.s: Likewise. * include/opcode/arm.h (ARM_EXT_V6Z): Remove. (ARM_EXT_SEC): New define. (ARM_AEXT_V6Z): Use Security Extensions. (ARM_AEXT_V6ZK): Likeiwse. (ARM_AEXT_V6ZT2): Likewise. (ARM_AEXT_V6ZKT2): Likewise. (ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions. (ARM_ARCH_V7A_SEC): New define. (ARM_ARCH_V7A_MP): Rename... (ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions. * ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_mp): Add.Matthew Gretton-Dann1-0/+6
(do_pld): Update comment. (insns): Add support for pldw. (arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support MP extension. (arm_extensions): Add 'mp' extension. (aeabi_set_public_attributes): Emit correct build attribute when MP extension is enabled. * gas/doc/c-arm.texi: Update for MP extensions. * gas/testsuite/gas/arm/arch7a-mp.d: Add. * gas/testsuite/gas/arm/arch7ar-mp.s: Likewise. * gas/testsuite/gas/arm/arch7r-mp.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add. * gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * include/opcode/arm.h (ARM_EXT_MP): Add. (ARM_ARCH_V7A_MP): Likewise. * opcodes/arm-dis.c (arm_opcodes): Add support for pldw. (thumb32_opcodes): Likewise.
2010-09-172010-09-17 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann1-0/+1
* config/tc-arm.c (insns): Change MRC entry to accept APSR_RR instead of just RR. 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * gas/arm/copro.s: Add test for APSR_nzcv as a MRC operand. * gas/arm/copro.d: Change pc in MRC to disassemble as APSR_nzcv. Also add disassembly for test added in copro.s 2010-09-17 Tejas Belagod <tejas.belagod@arm.com> * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
2010-07-082010-07-08 Tejas Belagod <tejas.belagod@arm.com>Richard Earnshaw1-16/+50
gas/testsuite * gas/arm/barrier.s: New file. * gas/arm/barrier.d: New file. * gas/arm/barrier-thumb.s: New file. * gas/arm/barrier-thumb.d: New file. * gas/arm/barrier-bad.s: New file. * gas/arm/barrier-bad.d: New file. * gas/arm/barrier-bad.l: New file. * gas/arm/barrier-bad-thumb.s: New file. * gas/arm/barrier-bad-thumb.d: New file. * gas/arm/barrier-bad-thumb.l: New file. gas/config * tc-arm.c (OP_oBARRIER): Remove. (OP_oBARRIER_I15): Add. (po_barrier_or_imm): Add macro. (parse_operands): Improve OP_oBARRIER_I15 operand parsing. (do_barrier): Check correct immediate range. (do_t_barrier): Likewise. (barrier_opt_names): Add entries for more symbolic operands. (insns): Replace OP_oBARRIER with OP_oBARRIER_I15 for barriers. opcodes/ * arm-dis.c (print_insn_arm): Add cases for printing more symbolic operands. (print_insn_thumb32): Likewise.
2010-06-28 * gas/config/tc-arm.c (parse_neon_alignment): New function.Matthew Gretton-Dann1-4/+4
(parse_address_main): Fix Neon load/store alignment parsing. * gas/testsuite/gas/arm/neon-ldst-align-bad.l: Update for Neon alignment syntax fix. * gas/testsuite/gas/arm/neon-ldst-align-bad.s: Likewise. * gas/testsuite/gas/arm/neon-ldst-es.d: Likewise. * gas/testsuite/gas/arm/neon-ldst-es.s: Likewise. * opcodes/arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
2010-06-07 * gas/testsuite/gas/arm/thumb-eabi.d: Add case for divided syntax encoding ↵Matthew Gretton-Dann1-0/+1
of movs. * gas/testsuite/gas/arm/thumb.d: Likewise. * gas/testsuite/gas/arm/thumb.s: Likewise. * gas/testsuite/gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly. * gas/testsuite/gas/arm/thumb2_it_auto.d: Liekwise. * gas/testsuite/gas/arm/thumb32.d: Likewise. * ld/testsuite/ld-arm/arm-call.d: Handle change in lsls/movs disassembly. * ld/testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-m.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise. * ld/testsuite/ld-arm/farcall-thumb-thumb.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d: Likewise. * ld/testsuite/ld-arm/thumb2-bl-bad.d: Likewise. * opcodes/arm-dis.c (thumb-opcodes): Add disassembly for movs.
2010-05-28 * opcodes/arm-dis.c (print_insn_neon): Ensure disassembly of NeonMatthew Gretton-Dann1-1/+2
constants is the same on 32-bit and 64-bit hosts.
2010-05-112010-05-10 Andrew Stubbs <ams@codesourcery.com>Nick Clifton1-1/+10
gas/ * config/tc-arm.c (aeabi_set_public_attributes): Set Tag_DIV_use. gas/testsuite/ * gas/arm/attr-cpu-directive.d: Add Tag_DIV_use. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-marvell-f.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/eabi_attr_1.d: Likewise. ld/testsuite/ * ld-arm/attr-merge-2.attr: Add Tag_DIV_use. * ld-arm/attr-merge-2a.s: Likewise. * ld-arm/attr-merge-2b.s: Likewise. * ld-arm/attr-merge-3a.s: Likewise. * ld-arm/attr-merge-3b.s: Likewise. * ld-arm/attr-merge-4.attr: Likewise. * ld-arm/attr-merge-5.attr: Likewise. * ld-arm/attr-merge-6.attr: Likewise. * ld-arm/attr-merge-7.attr: Likewise. * ld-arm/attr-merge-arch-1.attr: Likewise. * ld-arm/attr-merge-arch-2.attr: Likewise. * ld-arm/attr-merge-unknown-2.d: Likewise. * ld-arm/attr-merge-unknown-2r.d: Likewise. * ld-arm/attr-merge-unknown-3.d: Likewise. * ld-arm/attr-merge-vfp-1.d: Likewise. * ld-arm/attr-merge-vfp-1r.d: Likewise. * ld-arm/attr-merge-vfp-2.d: Likewise. * ld-arm/attr-merge-vfp-2r.d: Likewise. * ld-arm/attr-merge-vfp-3.d: Likewise. * ld-arm/attr-merge-vfp-3r.d: Likewise. * ld-arm/attr-merge-vfp-4.d: Likewise. * ld-arm/attr-merge-vfp-4r.d: Likewise. * ld-arm/attr-merge-vfp-5.d: Likewise. * ld-arm/attr-merge-vfp-5r.d: Likewise. * ld-arm/attr-merge-wchar-00-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-00.d: Likewise. * ld-arm/attr-merge-wchar-02-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-02.d: Likewise. * ld-arm/attr-merge-wchar-04-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-04.d: Likewise. * ld-arm/attr-merge-wchar-20-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-20.d: Likewise. * ld-arm/attr-merge-wchar-22-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-22.d: Likewise. * ld-arm/attr-merge-wchar-24-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-40-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-40.d: Likewise. * ld-arm/attr-merge-wchar-42-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-44-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-44.d: Likewise. * ld-arm/attr-merge.attr: Likewise. 2010-04-07 Jie Zhang <jie@codesourcery.com> gas/ * config/tc-arm.c (aeabi_set_public_attributes): Set Tag_ABI_HardFP_use to 1 if a single precision FPU is selected. gas/testsuite/ * gas/arm/attr-mfpu-vfpxd.d: New test. bfd/ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Merge Tag_ABI_HardFP_use correctly. ld/testsuite/ * ld-arm/attr-merge-vfp-6.d: New test. * ld-arm/attr-merge-vfp-6r.d: New test. * ld-arm/attr-merge-vfpv3xd.s: New test. * ld-arm/arm-elf.exp: Add attr-merge-vfp-6 and attr-merge-vfp-6r. 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W format. (print_insn_thumb16): Add support for new %W format. * gas/arm/thumb32.d: Fix expected disassembly of ldmia instruction.
2010-02-24 PR binutils/6773Nick Clifton1-25/+25
* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with <prefix>asx. Replace <prefix>subaddx with <prefix>sax. (thumb32_opcodes): Likewise. * gas/arm/arch7em.d: Replace expected disassembly of <prefix>addsubx with <prefix>asx. Also replace <prefix>subaddx with <prefix>sax. * gas/arm/archv6.d: Likewise. * gas/arm/thumb32.d: Likewise.
generated by cgit v1.1 at 2024-12-22 10:43:56 +0000