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2005-11-022005-11-02 Paul Brook <paul@codesourcery.com>Paul Brook1-1/+6
* arm-dis.c (print_insn_thumb32): Word align blx target address.
2005-10-31 * arm-dis.c (print_insn): Warning fix.Alan Modra1-5/+5
2005-10-262005-10-26 Paul Brook <paul@codesourcery.com>Paul Brook1-1/+1
gas/ * config/tc-arm.c (insns): Correct "sel" entry. gas/testsuite/ * gas/arm/archv6.d: Adjust expected output. opcodes/ * arm-dis.c (arm_opcodes): Correct "sel" entry.
2005-10-082005-10-08 James Lemke <jim@wasabisystems.com>Richard Earnshaw1-6/+6
* arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP operations.
2005-09-082005-09-08 Paul Brook <paul@codesourcery.com>Paul Brook1-2/+2
bfd/ * reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. opcodes/ * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc. gas/ * config/tc-arm.c (do_smi, do_t_smi): Rename ... (do_smc, do_t_smc): ... to this. (insns): Remane smi to smc. (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC. gas/testsuite/ * gas/arm/arch6zk.d: Rename smi to smc. * gas/arm/arch6zk.s: Ditto. * gas/arm/thumb32.d: Ditto. * gas/arm/thumb32.s: Ditto.
2005-09-022005-09-02 Paul Brook <paul@codesourcery.com>Paul Brook1-1/+1
* arm-dis.c (coprocessor_opcodes): Add null terminator.
2005-09-022005-09-02 Paul Brook <paul@codesourcery.com>Paul Brook1-539/+734
bfd/ * libbdf.h: Regenerate. * bfd-in2.h: Regenerate. * reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2. gas/ * config/tc-arm.c (encode_arm_cp_address): Use BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode. (do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb mode. (md_assemble): Only allow coprocessor instructions when Thumb-2 is available. (cCE, cC3): Define. (insns): Use them for coprocessor instructions. (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM. (get_thumb32_insn): New function. (put_thumb32_insn): New function. (md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2. gas/testsuite/ * gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s, gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d, gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files. opcodes/ * arm-dis.c (coprocessor_opcodes): New. (arm_opcodes, thumb32_opcodes): Remove coprocessor insns. (print_insn_coprocessor): New function. (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor format characters. (print_insn_thumb32): Use print_insn_coprocessor.
2005-08-302005-08-30 Paul Brook <paul@codesourcery.com>Paul Brook1-2/+2
opcodes/ * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs. gas/testsuite/ * gas/arm/thumb.d: Change "sub rn, rn, rn" to "subs rn, rn, rn". * gas/arm/thumb32.d: Ditto.
2005-07-292005-07-29 Paul Brook <paul@codesourcery.com>Paul Brook1-4/+4
bfd/ * reloc.c: Add BFD_RELOC_ARM_T32_ADD_PC12. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and pop. (do_t_addr): Implement 32-bit variant. (do_t_push_pop): Make some errors warnings. Handle single register 32-bit case. (insns): Use tCE for adr. (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12. (md_apply_fix): Ditto. gas/testsuite/ * gas/arm/thumb32.d: Fix expected output for writeback addressing modes. Add single high reg push/pop test. * gas/asm/thumb32.s: Add single high reg push/pop test. opcodes/ * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
2005-07-292005-07-29 Paul Brook <paul@codesourcery.com>Paul Brook1-2/+2
bfd/ * reloc.c (BFD_RELOC_ARM_T32_IMM12): Add. * bfd-in2.h: Regeenrate. * libbfd.h: Regenerate. gas/ * config/tc-arm.c (parse_tb): New function. (enum operand_parse_code): Add OP_TB. (parse_operands): Handle OP_TB. (do_t_add_sub_w, do_t_tb): New functions. (insns): Add entries for addw, subw, tbb and tbh. (md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12. gas/testsuite/ * gas/arm/thumb32.s: Add tests for addw, subw, tbb and tbh. * gas/arm/thumb32.d: Ditto. opcodes/ * arm-dis.c (thumb32_opc): Fix addressing mode for tbh. (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
2005-07-07Kaveh Ghazi's printf format attribute checking patch.Jim Wilson1-10/+10
bfd: * elf32-xtensa.c (vsprint_msg): Add format attribute. Fix format bugs. * vms.h (_bfd_vms_debug): Add format attribute. (_bfd_vms_debug, _bfd_hexdump): Fix typos. binutils: * bucomm.h (report): Add format attribute. * dlltool.c (inform): Likewise. * dllwrap.c (display, inform, warn): Likewise. * objdump.c (objdump_sprintf): Likewise. * readelf.c (error, warn): Likewise. Fix format bugs. gas: * config/tc-tic30.c (debug): Add format attribute. Fix format bugs. include: * dis-asm.h (fprintf_ftype): Add format attribute. opcodes: * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c, d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c, ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c, m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c, ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c, v850-dis.c: Fix format bugs. * ia64-gen.c (fail, warn): Add format attribute. * or32-opc.c (debug): Likewise.
2005-07-07arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction disassemblyNick Clifton1-1/+1
pattern. vfp1xD.d: Adjust expected fadds disassemblies now that the dissassembler has been fixed.
2005-06-08opcodes:Zack Weinberg1-80/+58
* arm-opc.h: Delete; fold contents into ... * arm-dis.c: ... here. Move includes of internal COFF headers next to includes of internal ELF headers. (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused. (struct arm_opcode): Rename struct opcode32. Make 'assembler' const. (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const. (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames) (iwmmxt_wwnames, iwmmxt_wwssnames): Make const. (regnames): Remove iWMMXt coprocessor register sets. (iwmmxt_regnames, iwmmxt_cregnames): New statics. (get_arm_regnames): Adjust fourth argument to match above changes. (set_iwmmxt_regnames): Delete. (print_insn_arm): Constify 'c'. Use ISO syntax for function pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames and iwmmxt_cregnames, not set_iwmmxt_regnames. (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use ISO syntax for function pointer calls. include: * dis-asm.h (get_arm_regnames): Update prototype.
2005-06-07 * arm-dis.c: Split up the comments describing the format codes, soZack Weinberg1-139/+103
that the ARM and 16-bit Thumb opcode tables each have comments preceding them that describe all the codes, and only the codes, valid in those tables. (32-bit Thumb table is already like this.) Reorder the lists in all three comments to match the order in which the codes are implemented. Remove all forward declarations of static functions. Convert all function definitions to ISO C format. (print_insn_arm, print_insn_thumb16, print_insn_thumb32): Return nothing. (print_insn_thumb16): Remove unused case 'I'. (print_insn): Update for changed calling convention of subroutines.
2005-05-18include/elf:Zack Weinberg1-337/+971
* arm.h: Import complete list of official relocation names and numbers from AAELF. Define FAKE_RELOCs for old names. Remove a few old names no longer used anywhere. bfd: * elf32-arm.c: Wherever possible, use official reloc names from AAELF. (elf32_arm_howto_table, elf32_arm_tls_gd32_howto) (elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto) (elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto) (elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto) (elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel) (elf32_arm_r_howto): Replace with elf32_arm_howto_table_1, elf32_arm_howto_table_2, and elf32_arm_howto_table_3. Add many new relocations from AAELF. (elf32_arm_howto_from_type): Update to match. (elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24, R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8, R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY. (elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type. (elf32_arm_final_link_relocate): Add support for R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove case entries redundant with default. * reloc.c: Reorganize ARM relocations. Add Thumb assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8, BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE. Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7, BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25. Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY. * bfd-in2.h, libbfd.h: Regenerate. opcodes: * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit instructions. Adjust disassembly of some opcodes to match unified syntax. (thumb32_opcodes): New table. (print_insn_thumb): Rename print_insn_thumb16; don't handle two-halfword branches here. (print_insn_thumb32): New function. (print_insn): Choose among print_insn_arm, print_insn_thumb16, and print_insn_thumb32. Be consistent about order of halfwords when printing 32-bit instructions. gas: * hash.c (hash_lookup): Add len parameter. All callers changed. (hash_find_n): New interface. * hash.h: Prototype hash_find_n. * sb.c: Include as.h. (scrub_from_sb, sb_to_scrub, scrub_position): New statics. (sb_scrub_and_add_sb): New interface. * sb.h: Prototype sb_scrub_and_add_sb. * input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb. * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove reference to BFD_RELOC_ARM_GOT12 which is never generated. * config/tc-arm.c: Rewrite, adding Thumb-2 support. gas/testsuite: * gas/arm/arm.exp: Convert all existing "gas_test" tests to "run_dump_test" tests. Run more tests unconditionally. Run new tests. * gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s * gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s * gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s: Adjust to work as a dump test. * gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d * gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d * gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d: New files. * gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for diagnostics that don't happen in the first pass anymore. * gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l * gas/arm/vfp-bad.l: Update expected diagnostics. * gas/arm/pic.d: Update expected reloc name. * gas/arm/thumbv6.d: CPY no longer appears in disassembly. * gas/arm/r15-bad.s: Avoid two-argument mul. * gas/arm/req.s: Adjust comments. * gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate use of PC. * gas/arm/macro-1.d, gas/arm/macro1.s * gas/arm/t16-bad.l, gas/arm/t16-bad.s * gas/arm/tcompat.d, gas/arm/tcompat.s * gas/arm/tcompat2.d, gas/arm/tcompat2.s * gas/arm/thumb32.d, gas/arm/thumb32.s New test pair. ld/testsuite: * ld-arm/mixed-app.d: Adjust expected disassembly a little.
2005-05-07Update the address and phone number of the FSFNick Clifton1-1/+1
2005-03-12gas:Zack Weinberg1-0/+7
* config/tc-arm.c (tinsns): Add ARMv6K instructions sev, wfe, wfi, yield. opcodes: * arm-dis.c (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield. gas/testsuite: * gas/arm/thumbv6k.d, gas/arm/thumbv6k.s: New dump test. * gas/arm/arm.exp: Run it.
2005-03-12Revert accidental commit of V6K opsZack Weinberg1-7/+0
2005-03-12include:Zack Weinberg1-1/+53
* opcode/arm.h: Adjust comments for ARM_EXT_V4T and ARM_EXT_V5T. Add ARM_EXT_V6T2, ARM_ARCH_V6T2, ARM_ARCH_V6KT2, ARM_ARCH_V6ZT2, and ARM_ARCH_V6ZKT2. opcodes: * arm-dis.c (arm_opcodes): Document %E and %V. Add entries for v6T2 ARM instructions: bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx. (print_insn_arm): Add support for %E and %V.
2004-11-29* arm-dis.c: Correct top-level comment.Richard Earnshaw1-1/+1
2004-11-27* arm-opc.h (arm_opcode, thumb_opcode): Add extra field for theRichard Earnshaw1-1/+703
architecuture defining the insn. (arm_opcodes, thumb_opcodes): Delete. Move to ... * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Also include opcode/arm.h. * Makefile.am (arm-dis.lo): Update dependency list. * Makefile.in: Regenerate.
2004-11-17bfd/Daniel Jacobowitz1-10/+16
* elf32-arm.c (PLT_THUMB_STUB_SIZE): Define. (elf32_arm_plt_thumb_stub): New. (struct elf32_arm_link_hash_entry): Add plt_thumb_refcount and plt_got_offset. (elf32_arm_link_hash_traverse): Fix typo. (elf32_arm_link_hash_table): Add obfd. (elf32_arm_link_hash_newfunc): Initialize new fields. (elf32_arm_copy_indirect_symbol): Copy plt_thumb_refcount. (elf32_arm_link_hash_table_create): Initialize obfd. (record_arm_to_thumb_glue): Mark the glue as a local ARM function. (record_thumb_to_arm_glue): Mark the glue as a local Thumb function. (bfd_elf32_arm_get_bfd_for_interworking): Verify that the interworking BFD is not dynamic. (bfd_elf32_arm_process_before_allocation): Handle R_ARM_PLT32. Do not emit glue for PLT references. (elf32_arm_final_link_relocate): Handle Thumb functions. Do not emit glue for PLT references. Support the Thumb PLT prefix. (elf32_arm_gc_sweep_hook): Handle R_ARM_THM_PC22 and plt_thumb_refcount. (elf32_arm_check_relocs): Likewise. (elf32_arm_adjust_dynamic_symbol): Handle Thumb functions and plt_thumb_refcount. (allocate_dynrelocs): Handle Thumb PLT references. (elf32_arm_finish_dynamic_symbol): Likewise. (elf32_arm_symbol_processing): New function. (elf_backend_symbol_processing): Define. opcodes/ * arm-dis.c (WORD_ADDRESS): Define. (print_insn): Use it. Correct big-endian end-of-section handling. gas/testsuite/ * gas/arm/mapping.d: Expect F markers for Thumb code. * gas/arm/unwind.d: Update big-endian pattern. ld/ * emultempl/armelf.em (arm_elf_set_bfd_for_interworking): Don't use a dynamic object for stubs. ld/testsuite/ * ld-arm/mixed-app.d, ld-arm/mixed-app.r, ld-arm/mixed-app.s, ld-arm/mixed-app.sym, ld-arm/mixed-lib.d, ld-arm/mixed-lib.r, ld-arm/mixed-lib.s, ld-arm/mixed-lib.sym, ld-arm/arm-dyn.ld, ld-arm/arm-lib.ld: New files. * ld-arm/arm-app-abs32.d, ld-arm/arm-app-abs32.r, ld-arm/arm-app.d, ld-arm/arm-app.r, ld-arm/arm-lib-plt32.d, ld-arm/arm-lib-plt32.r, ld-arm/arm-lib.d, ld-arm/arm-lib.r, ld-arm/arm-static-app.d, ld-arm/arm-static-app.r: Update for big-endian. * ld-arm/arm-elf.exp: Run the new tests.
2004-09-30Apply Paul Brook's patch to implement armv6k instructionsNick Clifton1-1/+10
2003-12-06 * gas/arm/arm.exp: Add archv6 and thumbv6.Mark Mitchell1-0/+10
* gas/arm/archv6.d: New file. * gas/arm/archv6.s: Likewise. * gas/arm/thumbv6.d: Likewise. * gas/arm/thumbv6.s: Likewise. Add V6 support. * config/tc-arm.c (ARM_EXT_V6): New macro. (ARM_ARCH_V6): Likewise. (SHIFT_IMMEDIATE): Likewise. (SHIFT_LSL_OR_ASR_IMMEDIATE): Likewise. (SHIFT_ASR_IMMEDIATE): Likewise. (SHIFT_LSL_IMMMEDIATE): Likewise. (do_cps): New function. (do_cpsi): Likewise. (do_ldrex): Likewise. (do_pkhbt): Likewise. (do_pkhtb): Likewise. (do_qadd16): Likewise. (do_rev): Likewise. (do_rfe): Likewise. (do_sxtah): Likewise. (do_sxth): Likewise. (do_setend): Likewise. (do_smlad): Likewise. (do_smlald): Likewise. (do_smmul): Likewise. (do_ssat): Likewise. (do_usat): Likewise. (do_srs): Likewise. (do_ssat16): Likewise. (do_usat16): Likewise. (do_strex): Likewise. (do_umaal): Likewise. (do_cps_mode): Likewise. (do_cps_flags): Likewise. (do_endian_specifier): Likewise. (do_pkh_core): Likewise. (do_sat): Likewise. (do_sat16): Likewise. (insns): Add V6 instructions. (do_t_cps): New function. (do_t_cpy): Likewise. (do_t_setend): Likewise. (THUMB_CPY): New macro. (tinsns): Add V6 instructions. (decode_shift): Handle V6 restricted-shift options. (thumb_mov_compare): Support CPY. (arm_cores): Add arm1136js and arm1136jfs. (arm_archs): Add armv6. (arm_fpus): Add arm1136jfs. * doc/c-arm.texi (ARM Options): Mention arm1136js, arm1136jfs, and armv6 options. * gas/arm/arm.exp: Add archv6 and thumbv6. * gas/arm/archv6.d: New file. * gas/arm/archv6.s: Likewise. * gas/arm/thumbv6.d: Likewise. * gas/arm/thumbv6.s: Likewise. * arm-dis.c (print_arm_insn): Add 'W' macro. * arm-opc.h (arm_opcodes): Add V6 instructions. (thumb_opcodes): Likewise.
2003-11-14Add new field to disassemble_info structure: symbol_is_valid() and use it toNick Clifton1-0/+17
skip displaying arm elf mapping symbols in disassembly output.
2003-11-03 * arm-dis.c (print_arm_insn): Print "-" after "#".Daniel Jacobowitz1-8/+8
2003-08-19Add support for unindexed form of Addressing Mode 5Nick Clifton1-6/+14
2003-07-18* objdump.c (main) :Accept multiple -M switch.Nick Clifton1-19/+17
* doc/binutils.texi: Document that multiple -M switches are accepted and that a single -M switch can contain comma separated options. * arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be NUL terminated. (parse_disassembler_options): Allow options to be space or comma separated.
2003-04-01Fixes for iWMMXt contribution.Nick Clifton1-2/+2
2003-03-25Add iWMMXt supportNick Clifton1-19/+166
2002-12-02 * arm-dis.c (print_insn_arm): Constify "insn". Formatting.Alan Modra1-12/+12
(print_insn_thumb): Likewise. * h8500-dis.c (print_insn_h8500): Constify "opcode". * mcore-dis.c (print_insn_mcore): Constify "op". Formatting. * ns32k-dis.c (print_insn_arg <case 'F'>): Use a union to avoid type-punned pointer warnings. <case 'L'>: Likewise. Fix error message too. * pdp11-dis.c (print_reg): Warning fix. * sh-dis.c (print_movxy): Constify "op" param. (print_insn_ddt): Constify sh_opcode_info vars. (print_insn_ppi): Likewise. (print_insn_sh): Likewise. * tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid type-punned pointer warnings. * w65-dis.c (print_insn_w65): Constify "op".
2002-11-30s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. SimplifyAlan Modra1-86/+91
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-05-23Fix handling of BLX instruction to conform to Operations definition in theNick Clifton1-23/+23
ARM ARM.
2002-01-19* arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h.Richard Earnshaw1-7/+0
* arm-dis.c (print_insn_arm): Don't handle 'h' case.
2002-01-15* arm-opc.h (arm_opcodes): Add patterns for VFP instructions.Richard Earnshaw1-1/+79
* arm-dis.c (print_insn_arm): Support new disassembly qualifiers for VFP bitfields.
2001-10-08 * opcodess/arm-opc.h (arm_opcodes): Add cirrus insns.Aldy Hernandez1-0/+19
* opcodes/arm-dis.c (print_insn_arm): Add 'I' case.
2001-09-19Fix compile time warning messagesNick Clifton1-1/+1
2001-07-162001-07-13 Philip Blundell <philb@gnu.org>Phil Blundell1-3/+3
* arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR.
2001-03-13Fix typos in ChangeLogs; fix dates in copyright noticesNick Clifton1-1/+2
2001-03-06Fix BLX(1) for ThumbNick Clifton1-4/+21
2001-01-09Fix disassembly of arm-elf instructions with relocs associated with them.Nick Clifton1-0/+8
2000-11-25Add ARM v5t, v5te and XScale supportNick Clifton1-0/+26
2000-07-04* arm-dis.c (print_insn_arm): Output combinations of PSR flags.Alexandre Oliva1-21/+9
2000-06-262000-06-26 Scott Bambrough <scottb@netwinder.org>Scott Bambrough1-1/+3
* arm-dis.c (regnames): Add an additional register set to match the set used by GCC. Make it the default.
2000-05-15Add support for _x and _s flags to MSR instructionNick Clifton1-3/+9
2000-02-142000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>Fernando Nasser1-3/+33
* arm-dis.c: Change flavor name from atpcs-special to special-atpcs to prevent name conflict in gdb. (get_arm_regname_num_options, set_arm_regname_option, get_arm_regnames): New functions. API to access the several flavor of register names. Note: Used by gdb. (print_insn_thumb): Use the register name entry from the currently selected flavor for LR and PC.
2000-02-07Rename parse_disassembler_option (again)Nick Clifton1-5/+6
2000-01-28Rename parse_disassembler_option to parse_arm_disassembler_option and allow itNick Clifton1-1/+0
to be exported.
2000-01-27Add ATPCS support to ARM disassembler.Nick Clifton1-155/+171
Document ARM disassembler options.
2000-01-27Apply Thoams de Lellis's patch to fic disassembly of Thumb instructions whenNick Clifton1-10/+14
bounded by non-function labels.
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