aboutsummaryrefslogtreecommitdiff
path: root/opcodes/arc-opc.c
AgeCommit message (Expand)AuthorFilesLines
2020-07-07arc: Update vector instructions.Claudiu Zissulescu1-2/+20
2020-01-13[ARC][committed] Code cleanup and improvements.Claudiu Zissulescu1-1/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-07-24[ARC] Update ARC opcode tableClaudiu Zissulescu1-1/+3
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-07-23[ARC] Fix decoding of w6 signed short immediate.Claudiu Zissulescu1-1/+5
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-11-22[ARC] Fix handling of ARCv2 H-register class.claziss1-0/+2
2017-11-21[ARC] Improve printing of pc-relative instructions.claziss1-1/+1
2017-07-25Fix typos in error and option messages in OPCODES library.Nick Clifton1-35/+35
2017-07-19[ARC] Add SJLI instruction.Claudiu Zissulescu1-1/+17
2017-07-19[ARC] Add JLI support.John Eric Martin1-1/+7
2017-04-25[ARC] Enhance enter/leave mnemonics.Claudiu Zissulescu1-1/+19
2017-03-27Implement ARC NPS-400 Ultra Ip and Miscellaneous instructions.Rinat Zelig1-350/+530
2017-03-21arc/nps400: Add cp16/cp32 instructions to opcodes libraryRinat Zelig1-3/+79
2017-02-15[ARC] Fix assembler relaxation.Claudiu Zissulescu1-34/+59
2017-02-06[ARC] Provide an interface to decode ARC instructions.Claudiu Zissulescu1-5/+52
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-11-29[ARC] Add checking for LP_COUNT reg usage, improve error reporting.Claudiu Zissulescu1-27/+56
2016-11-04arc/nps400: Validate address type operands correctlyAndrew Burgess1-2/+6
2016-11-03arc: Implement NPS-400 dcmac instructionGraham Markall1-1/+46
2016-11-03arc: Change max instruction length to 64-bitsAndrew Burgess1-482/+300
2016-11-03arc: Replace ARC_SHORT macro with arc_opcode_len functionGraham Markall1-0/+10
2016-09-26[ARC] ISA alignment.Claudiu Zissulescu1-2/+8
2016-07-27Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall1-15/+116
2016-06-23[ARC] Misc minor edits/fixesGraham Markall1-3/+1
2016-06-21Arc assembler: Convert nps400 from a machine type to an extension.Graham Markall1-14/+14
2016-06-15opcodes/arc: Fix extract for some add_s instructionsAndrew Burgess1-1/+1
2016-06-14[ARC] Add ldbit for npsGraham Markall1-0/+36
2016-06-14[ARC] Add deep packet inspection instructions for npsGraham Markall1-15/+82
2016-06-14[ARC] Add arithmetic and logic instructions for npsGraham Markall1-1/+92
2016-06-02Add support for 48 and 64 bit ARC instructions.Andrew Burgess1-1/+297
2016-05-23[ARC] Update instruction type and delay slot info.Claudiu Zissulescu1-1/+1
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu1-0/+4
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess1-23/+185
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess1-0/+22
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu1-8/+9
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu1-2/+40
2016-04-07arc/nps400: Add new instructionsAndrew Burgess1-0/+50
2016-04-07gas/arc: Handle multiple arc_opcode chains for same mnemonicAndrew Burgess1-1/+31
2016-04-05arc/nps400: Add additional instructionsAndrew Burgess1-2/+117
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu1-5/+5
2016-03-31opcodes/arc/nps: Fix some operand flagsAndrew Burgess1-2/+2
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu1-0/+1
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess1-0/+147
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess1-25/+26
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess1-3/+0
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu1-0/+126
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-12-04Fix failures in the GAS testsuite for the ARC architecture.Claudiu Zissulescu1-28/+42
generated by cgit v1.1 at 2024-11-23 01:27:08 +0000