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path: root/opcodes/aarch64-opc.c
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2020-11-09aarch64: Update LS64 feature with system registerPrzemyslaw Wirkus1-0/+2
2020-11-09aarch64: Limit Rt register number for LS64 load/store instructionsPrzemyslaw Wirkus1-0/+1
2020-11-04aarch64: Update feature RAS system registersPrzemyslaw Wirkus1-0/+5
2020-10-28aarch64: Add CSR PDEC instructionPrzemyslaw Wirkus1-0/+4
2020-10-28aarch64: Add DSB instruction Armv8.7-a variantPrzemyslaw Wirkus1-0/+10
2020-10-22[PATCH][GAS][AArch64] Define BRBE system registersPrzemyslaw Wirkus1-0/+106
2020-10-22aarch64: Define CSRE system registersPrzemyslaw Wirkus1-0/+13
2020-09-28This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for t...Przemyslaw Wirkus1-0/+216
2020-09-28This patch introduces ETE (Embedded Trace Extension) system registers for the...Przemyslaw Wirkus1-0/+6
2020-09-28This patch introduces TRBE (Trace Buffer Extension) system registers for the ...Przemyslaw Wirkus1-0/+8
2020-09-08aarch64: Add support for Armv8-R system registersAlex Coplan1-9/+70
2020-08-12aarch64: Add support for MPAM system registersAlex Coplan1-0/+17
2020-08-10[aarch64] GAS doesn't validate the architecture version for any tlbi register...Przemyslaw Wirkus1-102/+96
2020-06-11[PATCH]: aarch64: Refactor representation of system registersAlex Coplan1-623/+448
2020-04-30AArch64: add GAS support for UDF instructionAlex Coplan1-0/+3
2020-04-20[AArch64, Binutils] Add missing TSB instructionSudakshina Das1-0/+3
2020-02-26Indent labelsAlan Modra1-1/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-12-17ubsan: aarch64: left shift cannot be represented in type 'int64_t'Alan Modra1-12/+11
2019-11-11Arm64: fix build with old glibcJan Beulich1-10/+7
2019-11-07[binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson1-0/+2
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson1-0/+1
2019-10-30Modify the ARNM assembler to accept the omission of the immediate argument fo...Delia Burduv1-1/+6
2019-08-22[AArch64][gas] Update MTE system register encodingsKyrylo Tkachov1-10/+10
2019-07-23[AArch64] Add support for GMID_EL1 register for +memtagKyrylo Tkachov1-1/+3
2019-07-02[AArch64] Fix bogus MOVPRFX warning for GPR form of CPYRichard Sandiford1-5/+0
2019-05-09[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.Matthew Malcomson1-0/+2
2019-05-09[binutils][aarch64] New SVE_Zm4_11_INDEX operand.Matthew Malcomson1-0/+3
2019-05-09[binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson1-6/+12
2019-05-09[binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] New SVE_ADDR_ZX operand.Matthew Malcomson1-0/+18
2019-05-09[binutils][aarch64] New SVE_Zm3_11_INDEX operand.Matthew Malcomson1-0/+4
2019-05-09[binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson1-0/+1
2019-05-09[binutils][aarch64] Introduce SVE_IMM_ROT3 operand.Matthew Malcomson1-0/+3
2019-05-09[binutils][aarch64] Allow movprfx for SVE2 instructions.Matthew Malcomson1-1/+3
2019-05-01[BINUTILS, AArch64] Enable Transactional Memory ExtensionSudakshina Das1-0/+2
2019-04-11[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructionsSudakshina Das1-0/+2
2019-02-07AArch64: Add verifier for By elem Single and Double sized instructions.Tamar Christina1-0/+24
2019-01-25AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das1-6/+0
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-12-18Include bfd_stdint.h in bfd.hAlan Modra1-1/+1
2018-11-12[BINUTILS, AARCH64, 8/8] Add data cache instructions for Memory Tagging Exten...Sudakshina Das1-0/+40
2018-11-12[BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging ExtensionSudakshina Das1-0/+26
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das1-0/+6
2018-11-12[BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das1-0/+35
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das1-0/+19
2018-10-16AArch64: Fix error checking for SIMD udot (by element)Matthew Malcomson1-1/+2
2018-10-09[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRSSudakshina Das1-0/+14
2018-10-09[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registersSudakshina Das1-0/+20
2018-10-09[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das1-3/+10