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2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-2/+2
2017-07-24[AArch64] Fix the bit pattern order in the comments in auto-generated fileJiong Wang1-3/+6
The bit pattern comment in "aarch64_opcode_lookup_1" is reversed. This patch fixed this. opcode/ * aarch64-gen.c (print_decision_tree_1): Reverse the index of PATTERN to correct the print. * aarch64-dis-2.c: Regenerated.
2017-05-18Don't compare boolean values against TRUE or FALSEAlan Modra1-3/+3
bfd/ * arc-got.h: Don't compare boolean values against TRUE or FALSE. * elf-m10300.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-bfin.c: Likewise. * elf32-m68k.c: Likewise. * elf32-nds32.c: Likewise. * elf32-tilepro.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-tilegx.c: Likewise. * mach-o.c: Likewise. * peXXigen.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. opcodes/ * aarch64-asm.c: Don't compare boolean values against TRUE or FALSE. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. binutils/ * strings.c: Don't compare boolean values against TRUE or FALSE. gas/ * config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE. * config/tc-hppa.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-score7.c: Likewise. ld/ * emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-2/+2
2016-11-11[AArch64] Increase max_num_aliases in aarch64-genSzabolcs Nagy1-2/+2
Some ARMv8.3 pointer authentication instructions are encoded as HINT aliases, so to allow more instruction aliases in the generator, max_num_aliases is increased from 16 to 32. opcodes/ 2016-11-11 Szabolcs Nagy <szabolcs.nagy@arm.com> * aarch64-gen.c (find_alias_opcode): Increase max_num_aliases to 32.
2016-09-21[AArch64][SVE 02/32] Avoid hard-coded limit in indented_printRichard Sandiford1-5/+1
The maximum indentation needed by aarch64-gen.c grows as more instructions are added to aarch64-tbl.h. Rather than having to increase the indentation limit to a higher value, it seemed better to replace it with "%*s". opcodes/ * aarch64-gen.c (indented_print): Avoid hard-coded indentation limit.
2016-05-03Fix generation of AArhc64 instruction table.Szabolcs Nagy1-0/+1
* aarch64-gen.c (VERIFIER): Define. * aarch64-opc.c (VERIFIER): Define. (verify_ldpsw): Use static linkage. * aarch64-opc.h (verify_ldpsw): Remove. * aarch64-tbl.h: Use VERIFIER for verifiers.
2016-01-01Copyright update for binutilsAlan Modra1-2/+2
2015-12-11[AArch64][Patch 3/5] Adjust maximum number of instruction aliases.Matthew Wahab1-2/+2
The Statistical Profile Extension adds the instruction PSB CSYNC as an alias for the HINT #17 instruction. The HINT instruction currently has 8 aliases, which is the maximum number allowed. This patch raises to 16 the limit on the number of aliases an instruction can have. opcodes/ 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64-gen.c (find_alias_opcode): Set max_num_aliases to 16. Change-Id: I131044bf6e0fe0940a9e7478d9bf52137748907d
2015-11-27[AArch64] Let aliased instructions be their preferred form.Matthew Wahab1-1/+3
Although the AArch64 backend supports aliased instructions, the aliasing forms are always preferred over the real instruction. This makes it awkward to handle instructions which have aliases but which are their own preferred form. This patch includes the instruction being aliased in the list of alternatives which is searched when considering which form to use. opcodes/ 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-dis.c: Weaken assert. * aarch64-gen.c: Include the instruction in the list of its possible aliases. Change-Id: I1f23eb25fccef76a64d3d732d58761bd25fad94e
2015-08-12Remove trailing spaces in opcodesH.J. Lu1-1/+1
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-2/+2
2014-03-05Update copyright yearsAlan Modra1-2/+2
2013-01-30include/opcode/Yufeng Zhang1-2/+2
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h (aarch64_op): Add OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2. opcodes/ 2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-tbl.h (aarch64_opcode_table): Flag sshll, sshll2, ushll and ushll2 with F_HAS_ALIAS. Add entries for sxtl, sxtl2, uxtl and uxtl2. * aarch64-asm.c (convert_xtl_to_shll): New function. (convert_to_real): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by calling convert_xtl_to_shll. * aarch64-dis.c (convert_shll_to_xtl): New function. (convert_to_alias): Handle OP_SXTL, OP_SXTL2, OP_UXTL and OP_UXTL2 by calling convert_shll_to_xtl. * aarch64-gen.c: Update copyright year. * aarch64-asm-2.c: Re-generate. * aarch64-dis-2.c: Re-generate. * aarch64-opc-2.c: Re-generate. gas/testsuite/ 2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/alias.s: Add new tests. * gas/aarch64/alias.d: Update. * gas/aarch64/no-aliases.d: Update.
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton1-0/+1317
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